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Fri, 12 Sep 2025 08:03:25 -0700 (PDT) Date: Fri, 12 Sep 2025 18:03:22 +0300 From: Dan Carpenter To: Shawn Guo Cc: Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4] arm64: dts: s32g: Add device tree information for the OCOTP driver Message-ID: <6ea7fede9642dad10a6270a07e052f7a726f9bd6.1757689031.git.dan.carpenter@linaro.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the device tree information for the S32G On Chip One-Time Programmable Controller (OCOTP) chip. Signed-off-by: Dan Carpenter --- The other patches in this patch set were applied but this one needed to be rebased. v4: rebase on imx/dt64 v3: Add the device tree entry in the correct location based on the 0x400a4000 address. v2: change "ocotp: ocotp@400a4000 {" to "ocotp: nvmem@400a4000 {" arch/arm64/boot/dts/freescale/s32g2.dtsi | 7 +++++++ arch/arm64/boot/dts/freescale/s32g3.dtsi | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts= /freescale/s32g2.dtsi index 3ff3b2ff09be..d167624d1f0c 100644 --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -325,6 +325,13 @@ usdhc0-200mhz-grp4 { }; }; =20 + ocotp: nvmem@400a4000 { + compatible =3D "nxp,s32g2-ocotp"; + reg =3D <0x400a4000 0x400>; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + swt0: watchdog@40100000 { compatible =3D "nxp,s32g2-swt"; reg =3D <0x40100000 0x1000>; diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts= /freescale/s32g3.dtsi index 6292ae99883a..be3a582ebc1b 100644 --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi @@ -383,6 +383,13 @@ usdhc0-200mhz-grp4 { }; }; =20 + ocotp: nvmem@400a4000 { + compatible =3D "nxp,s32g3-ocotp", "nxp,s32g2-ocotp"; + reg =3D <0x400a4000 0x400>; + #address-cells =3D <1>; + #size-cells =3D <1>; + }; + swt0: watchdog@40100000 { compatible =3D "nxp,s32g3-swt", "nxp,s32g2-swt"; reg =3D <0x40100000 0x1000>; --=20 2.51.0