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Sun, 12 Oct 2025 17:05:39 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v1 05/20] iommu/amd: Implement test_dev callbacks to domain ops Date: Sun, 12 Oct 2025 17:05:02 -0700 Message-ID: <6ce261ebacddec3a528c5b303a40476aad422dd5.1760312725.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3C:EE_|IA1PR12MB6356:EE_ X-MS-Office365-Filtering-Correlation-Id: d1bcd165-1730-4bbc-92dc-08de09ec4c53 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?eDA+kHHwXpdFp5fVxnAtbpYocYPc8iElsE7BHAt6bLWDY92qqEr400j231jw?= =?us-ascii?Q?uRtEhpZRyQ5mIXhRm0bnbwlddyg34IaO5GS23HtpaJmnpWijp7Pg8IeQdGZW?= =?us-ascii?Q?fGSQUNYVxC25Hjj0Mv1EqCi3qZcazq113AoEveLTSmSAF/FWT2WYqbQTnK17?= =?us-ascii?Q?e46z9pva7tDsA9q5izgqbQYVWf91g3JrBBTVdLDcW3WrcAlhVXdat8b0bGtx?= =?us-ascii?Q?QCWQWDRcNRTOUEBxxpvjfsoDDjirIsUCRsaLopUwzJuXx+6xN6NisF48N3N4?= =?us-ascii?Q?NerN2JrUxMpo5fyz1jGWtMnCLS0D2byfjLB9I29ZbNidtRpHS6k83gTvi316?= =?us-ascii?Q?ZdwPLlpUxb/xy4ZTtZF4XxgFN9pjf7n0VfQiRwHmCxe9vklONNFO7W9uyr/F?= =?us-ascii?Q?fp4Kp8rQBTHuIrhiHqc5AolFYqLAQJREVh8BQn9JlwzNOLiLHIkCV5KOVlPc?= =?us-ascii?Q?5eBo9hFGdFnBY1NfGM4WCMh9DXzqLg2WX7ZO6jnUTx1oJnqMHKbaw2ts9vLt?= =?us-ascii?Q?5+T9MvPG9Ki+YDhcAqSQdrN3FpjYjW3KJxVWHpNqKvHloVNsw3obiKjbJ8PG?= =?us-ascii?Q?TF800DL7dYLS652EikHDHhUgdhIvqUdnPqXtvWP9+QMAI2O58AoJ4jb5jC9v?= =?us-ascii?Q?QvbJ0YH0B93HQGF/zEBVYUVUGoe0FJVSdH8ItFL8CNlc3Tf3IApEUam9OYIu?= =?us-ascii?Q?LeJfTFj2o/s/iAY/mmcjNvJtM1bywti4j/w5nHKaNSbHm0Sd5J21XQpzAzo5?= =?us-ascii?Q?dtXUTV8hFB60jMRiS/iklwtm0Ju07Dn7AV3i6M7BXO2tNxgit8wxZioWZa/2?= =?us-ascii?Q?fM16eFhZ+Q1dfN5DuV0Ek6f7IVkVLyMluZrCcKglqKohuWIx7Lx8p/DlqN38?= =?us-ascii?Q?kOzjPU0yHguaDI6d863c/k3bdAxB5ZYciwMicOPlH3Qh4pygxeLs06v2cEgX?= =?us-ascii?Q?Ur9IAMx/UEFX9leKVAtTrHpmmECqfljQoLJ6Ej0rA53O5pSMssN3t87VLqrQ?= =?us-ascii?Q?nCxtgp1B/Sx1oFXcV35jcbGPYDHogAt2g9xO+NWTM2i2hQD8hX/wPCHhPiBA?= =?us-ascii?Q?LD+lysCbLnGn4jhEbZd24kxgY+6/WGEoSjXAFvoSjHBN1S5tXvh9Hnb+JqZG?= =?us-ascii?Q?b4bmi8D8p72JQwikzyNkGzmZZHt72SUcO0rHmDJnjImH3V56Bc6d9CPVgl3t?= =?us-ascii?Q?FNcPygD0TJ5uJmmgUDqUTdTlvFcNKJzQQ7bEBddbyQ+MrGwF7hamnVf1C1Pq?= =?us-ascii?Q?3nnRUAG6I4dbaoldGOEnsTgesHrabTLi2jpeGQ2YC9agNNMXerwkcnwqA+/Z?= =?us-ascii?Q?weaSyW8GF8hJ/Lj77wA68A1w53KBfBpOPn3KPPR+3Z1CjTitAlBrNiruAuXs?= =?us-ascii?Q?VwznAbqAhJZ9r3oGtzRWe892ETHCvRrxKxO8XyKfOW5theO89i1J/KqzuXhd?= =?us-ascii?Q?1z41vHLHMOWE4DCm4VfAnzQkPhRiEE2bSXVFwZAuBJCqJdTP5ziYkwuxn9E9?= =?us-ascii?Q?klRFeocA/1HtluvFfxuOVTgcTbdG/oOG7Hn1GAkYeO0tdM4mRfT+1sCuBtrY?= =?us-ascii?Q?10ik2dFguqcGHuvRCQ4=3D?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(82310400026)(376014)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2025 00:06:02.9886 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d1bcd165-1730-4bbc-92dc-08de09ec4c53 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3C.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6356 Content-Type: text/plain; charset="utf-8" Move sanity and compatibility tests from the attach_dev callbacks to the new test_dev callback functions. The IOMMU core makes sure an attach_dev call must be invoked after a successful test_dev call. Correct the errno upon malloc failure. Also, drop the function prototype of iommu_sva_set_dev_pasid() from the header and make it static, as only pasid.c uses it. Signed-off-by: Nicolin Chen --- drivers/iommu/amd/amd_iommu.h | 3 --- drivers/iommu/amd/iommu.c | 27 +++++++++++++++++++-------- drivers/iommu/amd/pasid.c | 29 +++++++++++++++++++---------- 3 files changed, 38 insertions(+), 21 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 9b4b589a54b57..f99fa4da34996 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -52,9 +52,6 @@ struct protection_domain *protection_domain_alloc(void); struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev, struct mm_struct *mm); void amd_iommu_domain_free(struct iommu_domain *dom); -int iommu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid, - struct iommu_domain *old); void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid, struct iommu_domain *domain); =20 diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index e16ad510c8c8a..dc0406427dcf8 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -70,6 +70,8 @@ int amd_iommu_max_glx_val =3D -1; */ DEFINE_IDA(pdom_ids); =20 +static int amd_iommu_test_device(struct iommu_domain *dom, struct device *= dev, + ioasid_t pasid, struct iommu_domain *old); static int amd_iommu_attach_device(struct iommu_domain *dom, struct device= *dev, struct iommu_domain *old); =20 @@ -2670,6 +2672,7 @@ static struct iommu_domain blocked_domain =3D { static struct protection_domain identity_domain; =20 static const struct iommu_domain_ops identity_domain_ops =3D { + .test_dev =3D amd_iommu_test_device, .attach_dev =3D amd_iommu_attach_device, }; =20 @@ -2686,12 +2689,26 @@ void amd_iommu_init_identity_domain(void) protection_domain_init(&identity_domain); } =20 +static int amd_iommu_test_device(struct iommu_domain *dom, struct device *= dev, + ioasid_t pasid, struct iommu_domain *old) +{ + struct amd_iommu *iommu =3D get_amd_iommu_from_dev(dev); + + /* + * Restrict to devices with compatible IOMMU hardware support + * when enforcement of dirty tracking is enabled. + */ + if (dom->dirty_ops && !amd_iommu_hd_support(iommu)) + return -EINVAL; + + return 0; +} + static int amd_iommu_attach_device(struct iommu_domain *dom, struct device= *dev, struct iommu_domain *old) { struct iommu_dev_data *dev_data =3D dev_iommu_priv_get(dev); struct protection_domain *domain =3D to_pdomain(dom); - struct amd_iommu *iommu =3D get_amd_iommu_from_dev(dev); int ret; =20 /* @@ -2703,13 +2720,6 @@ static int amd_iommu_attach_device(struct iommu_doma= in *dom, struct device *dev, =20 dev_data->defer_attach =3D false; =20 - /* - * Restrict to devices with compatible IOMMU hardware support - * when enforcement of dirty tracking is enabled. - */ - if (dom->dirty_ops && !amd_iommu_hd_support(iommu)) - return -EINVAL; - if (dev_data->domain) detach_device(dev); =20 @@ -3047,6 +3057,7 @@ const struct iommu_ops amd_iommu_ops =3D { .def_domain_type =3D amd_iommu_def_domain_type, .page_response =3D amd_iommu_page_response, .default_domain_ops =3D &(const struct iommu_domain_ops) { + .test_dev =3D amd_iommu_test_device, .attach_dev =3D amd_iommu_attach_device, .map_pages =3D amd_iommu_map_pages, .unmap_pages =3D amd_iommu_unmap_pages, diff --git a/drivers/iommu/amd/pasid.c b/drivers/iommu/amd/pasid.c index 77c8e9a91cbca..474494a66dd40 100644 --- a/drivers/iommu/amd/pasid.c +++ b/drivers/iommu/amd/pasid.c @@ -99,31 +99,39 @@ static const struct mmu_notifier_ops sva_mn =3D { .release =3D sva_mn_release, }; =20 -int iommu_sva_set_dev_pasid(struct iommu_domain *domain, - struct device *dev, ioasid_t pasid, - struct iommu_domain *old) +static int iommu_sva_test_dev(struct iommu_domain *domain, struct device *= dev, + ioasid_t pasid, struct iommu_domain *old) { - struct pdom_dev_data *pdom_dev_data; - struct protection_domain *sva_pdom =3D to_pdomain(domain); struct iommu_dev_data *dev_data =3D dev_iommu_priv_get(dev); - unsigned long flags; - int ret =3D -EINVAL; =20 if (old) return -EOPNOTSUPP; =20 /* PASID zero is used for requests from the I/O device without PASID */ if (!is_pasid_valid(dev_data, pasid)) - return ret; + return -EINVAL; =20 /* Make sure PASID is enabled */ if (!is_pasid_enabled(dev_data)) - return ret; + return -EINVAL; + + return 0; +} + +static int iommu_sva_set_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid, + struct iommu_domain *old) +{ + struct iommu_dev_data *dev_data =3D dev_iommu_priv_get(dev); + struct protection_domain *sva_pdom =3D to_pdomain(domain); + struct pdom_dev_data *pdom_dev_data; + unsigned long flags; + int ret; =20 /* Add PASID to protection domain pasid list */ pdom_dev_data =3D kzalloc(sizeof(*pdom_dev_data), GFP_KERNEL); if (pdom_dev_data =3D=3D NULL) - return ret; + return -ENOMEM; =20 pdom_dev_data->pasid =3D pasid; pdom_dev_data->dev_data =3D dev_data; @@ -175,6 +183,7 @@ static void iommu_sva_domain_free(struct iommu_domain *= domain) } =20 static const struct iommu_domain_ops amd_sva_domain_ops =3D { + .test_dev =3D iommu_sva_test_dev, .set_dev_pasid =3D iommu_sva_set_dev_pasid, .free =3D iommu_sva_domain_free }; --=20 2.43.0