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client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by SJ1PEPF00001CE8.mail.protection.outlook.com (10.167.242.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9542.4 via Frontend Transport; Wed, 21 Jan 2026 21:13:20 +0000 Received: from bmoger-ubuntu.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Wed, 21 Jan 2026 15:13:19 -0600 From: Babu Moger To: , , , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [RFC PATCH 02/19] x86,fs/resctrl: Add the resource for Global Memory Bandwidth Allocation Date: Wed, 21 Jan 2026 15:12:40 -0600 Message-ID: <6c37e6003e82561070d8737ca8a3b542e70ff832.1769029977.git.babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE8:EE_|DM6PR12MB4329:EE_ X-MS-Office365-Filtering-Correlation-Id: 9630b168-53fa-4efa-ac8a-08de5931e7bc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|36860700013|1800799024|921020; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2026 21:13:20.8258 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9630b168-53fa-4efa-ac8a-08de5931e7bc X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4329 Content-Type: text/plain; charset="utf-8" AMD PQoS Global Bandwidth Enforcementn(GLBE) provides a mechanism for software to specify bandwidth limits for groups of threads that span multiple QoS Domains. Add the resource definition for GLBE in resctrl filesystem. Resource allows users to configure and manage the global memory bandwidth allocation settings for GLBE domain. GLBE domain is set of participating QoS domains that are grouped together for global bandwidth allocation. Signed-off-by: Babu Moger --- arch/x86/include/asm/msr-index.h | 1 + arch/x86/kernel/cpu/resctrl/core.c | 46 ++++++++++++++++++++++++++++-- fs/resctrl/ctrlmondata.c | 3 +- fs/resctrl/rdtgroup.c | 13 +++++++-- include/linux/resctrl.h | 1 + 5 files changed, 58 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-in= dex.h index 43adc38d31d5..e9b21676102c 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -1274,6 +1274,7 @@ #define MSR_IA32_L3_QOS_ABMC_CFG 0xc00003fd #define MSR_IA32_L3_QOS_EXT_CFG 0xc00003ff #define MSR_IA32_EVT_CFG_BASE 0xc0000400 +#define MSR_IA32_GMBA_BW_BASE 0xc0000600 =20 /* AMD-V MSRs */ #define MSR_VM_CR 0xc0010114 diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index 8b3457518ff4..8801dcfb40fb 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -91,6 +91,15 @@ struct rdt_hw_resource rdt_resources_all[RDT_NUM_RESOURC= ES] =3D { .schema_fmt =3D RESCTRL_SCHEMA_RANGE, }, }, + [RDT_RESOURCE_GMBA] =3D + { + .r_resctrl =3D { + .name =3D "GMB", + .ctrl_scope =3D RESCTRL_L3_CACHE, + .ctrl_domains =3D ctrl_domain_init(RDT_RESOURCE_GMBA), + .schema_fmt =3D RESCTRL_SCHEMA_RANGE, + }, + }, [RDT_RESOURCE_SMBA] =3D { .r_resctrl =3D { @@ -239,10 +248,22 @@ static __init bool __rdt_get_mem_config_amd(struct rd= t_resource *r) u32 eax, ebx, ecx, edx, subleaf; =20 /* - * Query CPUID_Fn80000020_EDX_x01 for MBA and - * CPUID_Fn80000020_EDX_x02 for SMBA + * Query CPUID function 0x80000020 to obtain num_closid and max_bw values. + * Use subleaf 1 for MBA, subleaf 2 for SMBA, and subleaf 7 for GMBA. */ - subleaf =3D (r->rid =3D=3D RDT_RESOURCE_SMBA) ? 2 : 1; + switch (r->rid) { + case RDT_RESOURCE_MBA: + subleaf =3D 1; + break; + case RDT_RESOURCE_SMBA: + subleaf =3D 2; + break; + case RDT_RESOURCE_GMBA: + subleaf =3D 7; + break; + default: + return false; + } =20 cpuid_count(0x80000020, subleaf, &eax, &ebx, &ecx, &edx); hw_res->num_closid =3D edx + 1; @@ -909,6 +930,19 @@ static __init bool get_mem_config(void) return false; } =20 +static __init bool get_gmem_config(void) +{ + struct rdt_hw_resource *hw_res =3D &rdt_resources_all[RDT_RESOURCE_GMBA]; + + if (!rdt_cpu_has(X86_FEATURE_GMBA)) + return false; + + if (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD) + return __rdt_get_mem_config_amd(&hw_res->r_resctrl); + + return false; +} + static __init bool get_slow_mem_config(void) { struct rdt_hw_resource *hw_res =3D &rdt_resources_all[RDT_RESOURCE_SMBA]; @@ -954,6 +988,9 @@ static __init bool get_rdt_alloc_resources(void) if (get_mem_config()) ret =3D true; =20 + if (get_gmem_config()) + ret =3D true; + if (get_slow_mem_config()) ret =3D true; =20 @@ -1054,6 +1091,9 @@ static __init void rdt_init_res_defs_amd(void) } else if (r->rid =3D=3D RDT_RESOURCE_MBA) { hw_res->msr_base =3D MSR_IA32_MBA_BW_BASE; hw_res->msr_update =3D mba_wrmsr_amd; + } else if (r->rid =3D=3D RDT_RESOURCE_GMBA) { + hw_res->msr_base =3D MSR_IA32_GMBA_BW_BASE; + hw_res->msr_update =3D mba_wrmsr_amd; } else if (r->rid =3D=3D RDT_RESOURCE_SMBA) { hw_res->msr_base =3D MSR_IA32_SMBA_BW_BASE; hw_res->msr_update =3D mba_wrmsr_amd; diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index cc4237c57cbe..ad7327b90d3f 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -246,7 +246,8 @@ static int parse_line(char *line, struct resctrl_schema= *s, return -EINVAL; =20 if (rdtgrp->mode =3D=3D RDT_MODE_PSEUDO_LOCKSETUP && - (r->rid =3D=3D RDT_RESOURCE_MBA || r->rid =3D=3D RDT_RESOURCE_SMBA)) { + (r->rid =3D=3D RDT_RESOURCE_MBA || r->rid =3D=3D RDT_RESOURCE_GMBA || + r->rid =3D=3D RDT_RESOURCE_SMBA)) { rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n"); return -EINVAL; } diff --git a/fs/resctrl/rdtgroup.c b/fs/resctrl/rdtgroup.c index ba8d503551cd..ae6c515f4c19 100644 --- a/fs/resctrl/rdtgroup.c +++ b/fs/resctrl/rdtgroup.c @@ -1412,7 +1412,8 @@ static bool rdtgroup_mode_test_exclusive(struct rdtgr= oup *rdtgrp) =20 list_for_each_entry(s, &resctrl_schema_all, list) { r =3D s->res; - if (r->rid =3D=3D RDT_RESOURCE_MBA || r->rid =3D=3D RDT_RESOURCE_SMBA) + if (r->rid =3D=3D RDT_RESOURCE_MBA || r->rid =3D=3D RDT_RESOURCE_GMBA || + r->rid =3D=3D RDT_RESOURCE_SMBA) continue; has_cache =3D true; list_for_each_entry(d, &r->ctrl_domains, hdr.list) { @@ -1615,6 +1616,7 @@ static int rdtgroup_size_show(struct kernfs_open_file= *of, closid, type); if (r->rid =3D=3D RDT_RESOURCE_MBA || + r->rid =3D=3D RDT_RESOURCE_GMBA || r->rid =3D=3D RDT_RESOURCE_SMBA) size =3D ctrl; else @@ -2168,13 +2170,18 @@ static struct rftype *rdtgroup_get_rftype_by_name(c= onst char *name) static void thread_throttle_mode_init(void) { enum membw_throttle_mode throttle_mode =3D THREAD_THROTTLE_UNDEFINED; - struct rdt_resource *r_mba, *r_smba; + struct rdt_resource *r_mba, *r_gmba, *r_smba; =20 r_mba =3D resctrl_arch_get_resource(RDT_RESOURCE_MBA); if (r_mba->alloc_capable && r_mba->membw.throttle_mode !=3D THREAD_THROTTLE_UNDEFINED) throttle_mode =3D r_mba->membw.throttle_mode; =20 + r_gmba =3D resctrl_arch_get_resource(RDT_RESOURCE_GMBA); + if (r_gmba->alloc_capable && + r_gmba->membw.throttle_mode !=3D THREAD_THROTTLE_UNDEFINED) + throttle_mode =3D r_gmba->membw.throttle_mode; + r_smba =3D resctrl_arch_get_resource(RDT_RESOURCE_SMBA); if (r_smba->alloc_capable && r_smba->membw.throttle_mode !=3D THREAD_THROTTLE_UNDEFINED) @@ -2394,6 +2401,7 @@ static unsigned long fflags_from_resource(struct rdt_= resource *r) case RDT_RESOURCE_L2: return RFTYPE_RES_CACHE; case RDT_RESOURCE_MBA: + case RDT_RESOURCE_GMBA: case RDT_RESOURCE_SMBA: return RFTYPE_RES_MB; case RDT_RESOURCE_PERF_PKG: @@ -3643,6 +3651,7 @@ static int rdtgroup_init_alloc(struct rdtgroup *rdtgr= p) list_for_each_entry(s, &resctrl_schema_all, list) { r =3D s->res; if (r->rid =3D=3D RDT_RESOURCE_MBA || + r->rid =3D=3D RDT_RESOURCE_GMBA || r->rid =3D=3D RDT_RESOURCE_SMBA) { rdtgroup_init_mba(r, rdtgrp->closid); if (is_mba_sc(r)) diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 006e57fd7ca5..17e12cd3befc 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -52,6 +52,7 @@ enum resctrl_res_level { RDT_RESOURCE_L3, RDT_RESOURCE_L2, RDT_RESOURCE_MBA, + RDT_RESOURCE_GMBA, RDT_RESOURCE_SMBA, RDT_RESOURCE_PERF_PKG, =20 --=20 2.34.1