From nobody Mon Feb 9 16:34:58 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1885D326D50; Fri, 17 Oct 2025 10:54:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698496; cv=none; b=KqFa9I14Ve8e8VLc+Lxk6cgZqlXyPSx8NV4//bXg6bP6VZCQEm3SAH+w9XBzqHRUYF+IixfA9W1oae1aohXmvnpOMtOAplRMBGqUMrLeWa7EepCGu1VQcZcOpB6RNJhe7/0HL1mkxDm5hpKZvnOQDbHKoUMEnL53tzGxt2TvG6s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760698496; c=relaxed/simple; bh=nNXrMtZk3zYnmlXOuCh6SX9nUfQDOAFUF16LDju3VEQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aOS8iJcfvmNu5WddnnTM6M6Qa5+Or6RZ2AIhhFp92tUKaeiiCEbOsVcA71q/qV8qh7+YFTjyPFGzb0ywzQsJaij7yreHQuzAvT4sb+iprr4mb2ewLLoygE/mxMURRLej8EvOsmY3ElGVf7MfjGpUhStbxo1VKKjdnkBJ8gMJ56U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7FB8C4CEE7; Fri, 17 Oct 2025 10:54:46 +0000 (UTC) From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Giovanni Cabiddu , Herbert Xu , David Miller , Linus Walleij , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Crt Mori , Jonathan Cameron , Lars-Peter Clausen , Jacky Huang , Shan-Chun Hung , Yury Norov , Rasmus Villemoes , Jaroslav Kysela , Takashi Iwai , Johannes Berg , Jakub Kicinski , Alex Elder , David Laight , Vincent Mailhol , Jason Baron , Borislav Petkov , Tony Luck , Michael Hennerich , Kim Seer Paller , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Richard Genoud , Cosmin Tanislav , Biju Das , Jianping Shen Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-crypto@vger.kernel.org, linux-edac@vger.kernel.org, qat-linux@intel.com, linux-gpio@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-iio@vger.kernel.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Jonathan Cameron Subject: [PATCH v4 2/4] bitfield: Add non-constant field_{prep,get}() helpers Date: Fri, 17 Oct 2025 12:54:10 +0200 Message-ID: <67c1998f144b3a21399672c8e4d58d3884ae2b3c.1760696560.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The existing FIELD_{GET,PREP}() macros are limited to compile-time constants. However, it is very common to prepare or extract bitfield elements where the bitfield mask is not a compile-time constant. To avoid this limitation, the AT91 clock driver and several other drivers already have their own non-const field_{prep,get}() macros. Make them available for general use by consolidating them in , and improve them slightly: 1. Avoid evaluating macro parameters more than once, 2. Replace "ffs() - 1" by "__ffs()", 3. Support 64-bit use on 32-bit architectures. This is deliberately not merged into the existing FIELD_{GET,PREP}() macros, as people expressed the desire to keep stricter variants for increased safety, or for performance critical paths. Signed-off-by: Geert Uytterhoeven Acked-by: Alexandre Belloni Acked-by: Jonathan Cameron Acked-by: Crt Mori Acked-by: Nuno S=C3=A1 Acked-by: Richard Genoud --- v4: - Add Acked-by, - Rebase on top of commit 7c68005a46108ffa ("crypto: qat - relocate power management debugfs helper APIs") in v6.17-rc1, - Convert more recently introduced upstream copies: - drivers/edac/ie31200_edac.c - drivers/iio/dac/ad3530r.c v3: - Add Acked-by, - Drop underscores from macro parameters, - Use __auto_type where possible, - Correctly cast reg to the mask type, - Introduces __val and __reg intermediates to simplify the actual operation, - Drop unneeded parentheses, - Clarify having both FIELD_{GET,PREP}() and field_{get,prep}(), v2: - Cast val resp. reg to the mask type, - Fix 64-bit use on 32-bit architectures, - Convert new upstream users: - drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c - drivers/gpio/gpio-aspeed.c - drivers/iio/temperature/mlx90614.c - drivers/pinctrl/nuvoton/pinctrl-ma35.c - sound/usb/mixer_quirks.c - Convert new user queued in renesas-devel for v6.15: - drivers/soc/renesas/rz-sysc.c --- drivers/clk/at91/clk-peripheral.c | 1 + drivers/clk/at91/pmc.h | 3 -- .../intel/qat/qat_common/adf_pm_dbgfs_utils.c | 8 +---- drivers/edac/ie31200_edac.c | 4 +-- drivers/gpio/gpio-aspeed.c | 5 +-- drivers/iio/dac/ad3530r.c | 3 -- drivers/iio/temperature/mlx90614.c | 5 +-- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 4 --- drivers/soc/renesas/rz-sysc.c | 3 +- include/linux/bitfield.h | 36 +++++++++++++++++++ sound/usb/mixer_quirks.c | 4 --- 11 files changed, 42 insertions(+), 34 deletions(-) diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-perip= heral.c index e700f40fd87f9327..e7208c47268b6397 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -3,6 +3,7 @@ * Copyright (C) 2013 Boris BREZILLON */ =20 +#include #include #include #include diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 5daa32c4cf2540d7..543d7aee8d248cdb 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -117,9 +117,6 @@ struct at91_clk_pms { unsigned int parent; }; =20 -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - #define ndck(a, s) (a[s - 1].id + 1) #define nck(a) (a[ARRAY_SIZE(a) - 1].id + 1) =20 diff --git a/drivers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c b/dri= vers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c index 69295a9ddf0ac92f..4ccc94ed9493a64c 100644 --- a/drivers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c +++ b/drivers/crypto/intel/qat/qat_common/adf_pm_dbgfs_utils.c @@ -1,18 +1,12 @@ // SPDX-License-Identifier: GPL-2.0-only /* Copyright(c) 2025 Intel Corporation */ +#include #include #include #include =20 #include "adf_pm_dbgfs_utils.h" =20 -/* - * This is needed because a variable is used to index the mask at - * pm_scnprint_table(), making it not compile time constant, so the compile - * asserts from FIELD_GET() or u32_get_bits() won't be fulfilled. - */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - #define PM_INFO_MAX_KEY_LEN 21 =20 static int pm_scnprint_table(char *buff, const struct pm_status_row *table, diff --git a/drivers/edac/ie31200_edac.c b/drivers/edac/ie31200_edac.c index 5a080ab65476dacf..dfc9a9cecd74207d 100644 --- a/drivers/edac/ie31200_edac.c +++ b/drivers/edac/ie31200_edac.c @@ -44,6 +44,7 @@ * but lo_hi_readq() ensures that we are safe across all e3-1200 processor= s. */ =20 +#include #include #include #include @@ -139,9 +140,6 @@ #define IE31200_CAPID0_DDPCD BIT(6) #define IE31200_CAPID0_ECC BIT(1) =20 -/* Non-constant mask variant of FIELD_GET() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - static int nr_channels; static struct pci_dev *mci_pdev; static int ie31200_registered =3D 1; diff --git a/drivers/gpio/gpio-aspeed.c b/drivers/gpio/gpio-aspeed.c index 7953a9c4e36d7550..3da999334971d501 100644 --- a/drivers/gpio/gpio-aspeed.c +++ b/drivers/gpio/gpio-aspeed.c @@ -5,6 +5,7 @@ * Joel Stanley */ =20 +#include #include #include #include @@ -31,10 +32,6 @@ #include #include "gpiolib.h" =20 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - #define GPIO_G7_IRQ_STS_BASE 0x100 #define GPIO_G7_IRQ_STS_OFFSET(x) (GPIO_G7_IRQ_STS_BASE + (x) * 0x4) #define GPIO_G7_CTRL_REG_BASE 0x180 diff --git a/drivers/iio/dac/ad3530r.c b/drivers/iio/dac/ad3530r.c index 6134613777b8e1d4..b97b46090d808ee7 100644 --- a/drivers/iio/dac/ad3530r.c +++ b/drivers/iio/dac/ad3530r.c @@ -53,9 +53,6 @@ #define AD3530R_MAX_CHANNELS 8 #define AD3531R_MAX_CHANNELS 4 =20 -/* Non-constant mask variant of FIELD_PREP() */ -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - enum ad3530r_mode { AD3530R_NORMAL_OP, AD3530R_POWERDOWN_1K, diff --git a/drivers/iio/temperature/mlx90614.c b/drivers/iio/temperature/m= lx90614.c index 8a44a00bfd5ece38..1ad21b73e1b44cb0 100644 --- a/drivers/iio/temperature/mlx90614.c +++ b/drivers/iio/temperature/mlx90614.c @@ -22,6 +22,7 @@ * the "wakeup" GPIO is not given, power management will be disabled. */ =20 +#include #include #include #include @@ -68,10 +69,6 @@ #define MLX90614_CONST_SCALE 20 /* Scale in milliKelvin (0.02 * 1000) */ #define MLX90614_CONST_FIR 0x7 /* Fixed value for FIR part of low pass fil= ter */ =20 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - struct mlx_chip_info { /* EEPROM offsets with 16-bit data, MSB first */ /* emissivity correction coefficient */ diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvot= on/pinctrl-ma35.c index cdad01d68a37e365..8d71dc53cc1de1f8 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -81,10 +81,6 @@ #define MVOLT_1800 0 #define MVOLT_3300 1 =20 -/* Non-constant mask variant of FIELD_GET() and FIELD_PREP() */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - static const char * const gpio_group_name[] =3D { "gpioa", "gpiob", "gpioc", "gpiod", "gpioe", "gpiof", "gpiog", "gpioh", "gpioi", "gpioj", "gpiok", "gpiol", "gpiom", "gpion", diff --git a/drivers/soc/renesas/rz-sysc.c b/drivers/soc/renesas/rz-sysc.c index 9f79e299e6f41641..73eaf8b9d69f7208 100644 --- a/drivers/soc/renesas/rz-sysc.c +++ b/drivers/soc/renesas/rz-sysc.c @@ -5,6 +5,7 @@ * Copyright (C) 2024 Renesas Electronics Corp. */ =20 +#include #include #include #include @@ -16,8 +17,6 @@ =20 #include "rz-sysc.h" =20 -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) - /** * struct rz_sysc - RZ SYSC private data structure * @base: SYSC base address diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index 7ff817bdae19b468..c999fe70076f6684 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -220,4 +220,40 @@ __MAKE_OP(64) #undef __MAKE_OP #undef ____MAKE_OP =20 +/** + * field_prep() - prepare a bitfield element + * @mask: shifted mask defining the field's length and position + * @val: value to put in the field + * + * field_prep() masks and shifts up the value. The result should be + * combined with other fields of the bitfield using logical OR. + * Unlike FIELD_PREP(), @mask is not limited to a compile-time constant. + */ +#define field_prep(mask, val) \ + ({ \ + __auto_type __mask =3D (mask); \ + typeof(mask) __val =3D (val); \ + unsigned int __shift =3D sizeof(mask) <=3D 4 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__val << __shift) & __mask; \ + }) + +/** + * field_get() - extract a bitfield element + * @mask: shifted mask defining the field's length and position + * @reg: value of entire bitfield + * + * field_get() extracts the field specified by @mask from the + * bitfield passed in as @reg by masking and shifting it down. + * Unlike FIELD_GET(), @mask is not limited to a compile-time constant. + */ +#define field_get(mask, reg) \ + ({ \ + __auto_type __mask =3D (mask); \ + typeof(mask) __reg =3D (reg); \ + unsigned int __shift =3D sizeof(mask) <=3D 4 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__reg & __mask) >> __shift; \ + }) + #endif diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c index 828af3095b86ee0a..6eee89cbc0867f2b 100644 --- a/sound/usb/mixer_quirks.c +++ b/sound/usb/mixer_quirks.c @@ -3311,10 +3311,6 @@ static int snd_bbfpro_controls_create(struct usb_mix= er_interface *mixer) #define RME_DIGIFACE_REGISTER(reg, mask) (((reg) << 16) | (mask)) #define RME_DIGIFACE_INVERT BIT(31) =20 -/* Nonconst helpers */ -#define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) -#define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) - static int snd_rme_digiface_write_reg(struct snd_kcontrol *kcontrol, int i= tem, u16 mask, u16 val) { struct usb_mixer_elem_list *list =3D snd_kcontrol_chip(kcontrol); --=20 2.43.0