From nobody Tue Feb 10 11:14:29 2026 Received: from mail-244122.protonmail.ch (mail-244122.protonmail.ch [109.224.244.122]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 237F444B68E for ; Tue, 20 Jan 2026 14:42:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.122 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768920139; cv=none; b=M2iU9eYTxipZdVhPY0mpxVOUFOdCBe6LfSLn9Z+zLeAT9XJry+SlTMpvBY4y77vy504z9rKFVz5p3S8qqBQW9TlUN2kOSJKAaEtcQGzo/cJhA8Qi5N+Hoc9pnhkyEmtpuw38H5nSV8XuRgoKvlH8m+pHKDVubTRMVYMH8Y67BMc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768920139; c=relaxed/simple; bh=YATLu36LR6uRUDikXiEnYhhdz4P7NylXfpSFJdJ0aOU=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=I6q+TcRX0pVqaAPHBZBhRZ7fstlfkkTwy6tYvRZKalBxbx5GChTFs3tW6jw1F0O0J9gLEvHsNZ3DLYOIMyvhAY961qDOakk3OaM0B+0RpXzGZTm9Xp8jRMXKt9Xgr8xtfxOSFR3ZolkJFzzNreV7lJD6K3fCEW3toG8o5OsJSRE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me; spf=pass smtp.mailfrom=pm.me; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b=dX/q0pMG; arc=none smtp.client-ip=109.224.244.122 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=pm.me Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pm.me Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=pm.me header.i=@pm.me header.b="dX/q0pMG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pm.me; s=protonmail3; t=1768920136; x=1769179336; bh=RLok2iNeiZQ0lrk5bEmdsBybOSUb6/T0SAgj8E0E9oA=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=dX/q0pMGjM4th7WuUjhsqNy0MNsX4Sb5zGV9EFnlf3SGbeifm8U++Twe8OBVbweYb JrOkipiDRBhdA3DKn8Bw4IjA0R0pn7Z43xENrIqT3rbqSZXA42vC6L21MkDq13imrm yiHsF/ea8PuycNN0/rbO5yzCa5MJfP4YsS9gxjuPQM9sm5ePr4KXzvL9KIRJypwlU3 uL6LX7iRlbABCiFmsnGQln+CnAe8SIIICfYHJlhdFT2jgFSLcqwSN+GhHZR3geFbzm 9kcidvaDTGzYqxnqz/K1WTunSjT4DKh3wnq9ZOm1eAemUZed2/4Y8OF3WaqcJiqk9J fm1iYjGro82GA== Date: Tue, 20 Jan 2026 14:42:12 +0000 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" From: Maciej Wieczor-Retman Cc: m.wieczorretman@pm.me, Maciej Wieczor-Retman , Andrey Konovalov , linux-kernel@vger.kernel.org Subject: [PATCH v9 11/13] x86: Increase minimal SLAB alignment for KASAN Message-ID: <63901bd29bcda50366296d22013efe3548550518.1768845098.git.m.wieczorretman@pm.me> In-Reply-To: References: Feedback-ID: 164464600:user:proton X-Pm-Message-ID: 9654b2a920595dff2736020e84dbdcd35779ba87 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Maciej Wieczor-Retman 8 byte minimal SLAB alignment interferes with KASAN's granularity of 16 bytes. It causes a lot of out-of-bounds errors for unaligned 8 byte allocations. Compared to a kernel with KASAN disabled, the memory footprint increases because all kmalloc-8 allocations now are realized as kmalloc-16, which has twice the object size. But more meaningfully, when compared to a kernel with generic KASAN enabled, there is no difference. Because of redzones in generic KASAN, kmalloc-8' and kmalloc-16' object size is the same (48 bytes). So changing the minimal SLAB alignment of the tag-based mode doesn't have any negative impact when compared to the other software KASAN mode. Adjust x86 minimal SLAB alignment to match KASAN granularity size. Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Andrey Konovalov --- Changelog v9: - Rename patch title so it fits the tip standards. Changelog v6: - Add Andrey's Reviewed-by tag. Changelog v4: - Extend the patch message with some more context and impact information. Changelog v3: - Fix typo in patch message 4 -> 16. - Change define location to arch/x86/include/asm/cache.c. arch/x86/include/asm/cache.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 69404eae9983..3232583b5487 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -21,4 +21,8 @@ #endif #endif =20 +#ifdef CONFIG_KASAN_SW_TAGS +#define ARCH_SLAB_MINALIGN (1ULL << KASAN_SHADOW_SCALE_SHIFT) +#endif + #endif /* _ASM_X86_CACHE_H */ --=20 2.52.0