From nobody Fri Dec 19 06:07:39 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66A612010EE; Thu, 6 Nov 2025 13:36:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762436207; cv=none; b=CDcQPhiISrkBmnjYtWjUfw3dfPExC8P+xaWMwoI5+QkuS1IQCVU+0sLSTbkt4tNMkxa2Lrt+ko0MfDfR/KWcPaX/tKcqugRqAQfk5B88ud/JqzIpqearTyYW6HHtuGIk86quhC1gSZot9WgbyWHDIGplcIjLdKvgn5gTw1d/6Pg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762436207; c=relaxed/simple; bh=gjqu9tecVqJuGLXjNzJWqdP0H0ejNhLevHydt0XGr+I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=IxZ/J14+g6BLagJZL1rOmdRxhHRK5nDIwnFyCFhOWMaJ03G7DKJnYB+0UvJ1VC6Zikk/3dKJHPLRwjodNrVQL9xezqpd1pkxkKGkrwXtopCKbr/BK5Af8odX47kM3BG7fvY8A5RZYo07QVOd4XBW31+JkJWX+2oAgJZBI4fDlh4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 Received: by smtp.kernel.org (Postfix) with ESMTPSA id 10BC4C4CEF7; Thu, 6 Nov 2025 13:36:36 +0000 (UTC) From: Geert Uytterhoeven To: Yury Norov , Michael Turquette , Stephen Boyd , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Giovanni Cabiddu , Herbert Xu , David Miller , Linus Walleij , Bartosz Golaszewski , Joel Stanley , Andrew Jeffery , Crt Mori , Jonathan Cameron , Lars-Peter Clausen , Jacky Huang , Shan-Chun Hung , Rasmus Villemoes , Jaroslav Kysela , Takashi Iwai , Johannes Berg , Jakub Kicinski , Alex Elder , David Laight , Vincent Mailhol , Jason Baron , Borislav Petkov , Tony Luck , Michael Hennerich , Kim Seer Paller , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Richard Genoud , Cosmin Tanislav , Biju Das , Jianping Shen , Nathan Chancellor , Nick Desaulniers , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-crypto@vger.kernel.org, linux-edac@vger.kernel.org, qat-linux@intel.com, linux-gpio@vger.kernel.org, linux-aspeed@lists.ozlabs.org, linux-iio@vger.kernel.org, linux-sound@vger.kernel.org, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven , Jonathan Cameron , Andy Shevchenko Subject: [PATCH v6 13/26] bitfield: Add non-constant field_{prep,get}() helpers Date: Thu, 6 Nov 2025 14:34:01 +0100 Message-ID: <62a5058e460129155e4e7539e37140bd0f0d4abc.1762435376.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The existing FIELD_{GET,PREP}() macros are limited to compile-time constants. However, it is very common to prepare or extract bitfield elements where the bitfield mask is not a compile-time constant. To avoid this limitation, the AT91 clock driver and several other drivers already have their own non-const field_{prep,get}() macros. Make them available for general use by adding them to , and improve them slightly: 1. Avoid evaluating macro parameters more than once, 2. Replace "ffs() - 1" by "__ffs()", 3. Support 64-bit use on 32-bit architectures, 4. Wire field_{get,prep}() to FIELD_{GET,PREP}() when mask is actually constant. This is deliberately not merged into the existing FIELD_{GET,PREP}() macros, as people expressed the desire to keep stricter variants for increased safety, or for performance critical paths. Signed-off-by: Geert Uytterhoeven Acked-by: Alexandre Belloni Acked-by: Jonathan Cameron Acked-by: Crt Mori Acked-by: Nuno S=C3=A1 Acked-by: Richard Genoud Reviewed-by: Andy Shevchenko Reviewed-by: Yury Norov (NVIDIA) --- v6: - Align \, - Add Return sections to kerneldoc, - Add Reviewed-by, - Document field_{get,prep} in top comment block, - Use less-checking __FIELD_{GET,PREP}() to avoid build issues with clang and W=3D1: https://lore.kernel.org/all/202510281335.UpSLYJG9-lkp@intel.com https://lore.kernel.org/all/202510281414.DnejZh4n-lkp@intel.com https://lore.kernel.org/all/202510281304.RK3J3c3t-lkp@intel.com v5: - Add Acked-by, - Split off changes outside , - Document that mask must be non-zero, - Document typical usage pattern, - Recommend using FIELD_{PREP,GET}() directly to ensure compile-time constant masks, - Check BITS_PER_TYPE(mask) instead of sizeof(mask), - Wire field_{get,prep}() to FIELD_{GET,PREP}() when mask is constant, to improve type checking. v4: - Add Acked-by, - Rebase on top of commit 7c68005a46108ffa ("crypto: qat - relocate power management debugfs helper APIs") in v6.17-rc1, - Convert more recently introduced upstream copies: - drivers/edac/ie31200_edac.c - drivers/iio/dac/ad3530r.c v3: - Add Acked-by, - Drop underscores from macro parameters, - Use __auto_type where possible, - Correctly cast reg to the mask type, - Introduces __val and __reg intermediates to simplify the actual operation, - Drop unneeded parentheses, - Clarify having both FIELD_{GET,PREP}() and field_{get,prep}(), v2: - Cast val resp. reg to the mask type, - Fix 64-bit use on 32-bit architectures, - Convert new upstream users: - drivers/crypto/intel/qat/qat_common/adf_gen4_pm_debugfs.c - drivers/gpio/gpio-aspeed.c - drivers/iio/temperature/mlx90614.c - drivers/pinctrl/nuvoton/pinctrl-ma35.c - sound/usb/mixer_quirks.c - Convert new user queued in renesas-devel for v6.15: - drivers/soc/renesas/rz-sysc.c --- include/linux/bitfield.h | 59 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/include/linux/bitfield.h b/include/linux/bitfield.h index bf8e0ae4b5b41038..f92e18c9629a59c6 100644 --- a/include/linux/bitfield.h +++ b/include/linux/bitfield.h @@ -17,6 +17,7 @@ * FIELD_{GET,PREP} macros take as first parameter shifted mask * from which they extract the base mask and shift amount. * Mask must be a compilation time constant. + * field_{get,prep} are variants that take a non-const mask. * * Example: * @@ -240,4 +241,62 @@ __MAKE_OP(64) #undef __MAKE_OP #undef ____MAKE_OP =20 +#define __field_prep(mask, val) \ + ({ \ + __auto_type __mask =3D (mask); \ + typeof(mask) __val =3D (val); \ + unsigned int __shift =3D BITS_PER_TYPE(mask) <=3D 32 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__val << __shift) & __mask; \ + }) + +#define __field_get(mask, reg) \ + ({ \ + __auto_type __mask =3D (mask); \ + typeof(mask) __reg =3D (reg); \ + unsigned int __shift =3D BITS_PER_TYPE(mask) <=3D 32 ? \ + __ffs(__mask) : __ffs64(__mask); \ + (__reg & __mask) >> __shift; \ + }) + +/** + * field_prep() - prepare a bitfield element + * @mask: shifted mask defining the field's length and position, must be + * non-zero + * @val: value to put in the field + * + * Return: field value masked and shifted to its final destination + * + * field_prep() masks and shifts up the value. The result should be + * combined with other fields of the bitfield using logical OR. + * Unlike FIELD_PREP(), @mask is not limited to a compile-time constant. + * Typical usage patterns are a value stored in a table, or calculated by + * shifting a constant by a variable number of bits. + * If you want to ensure that @mask is a compile-time constant, please use + * FIELD_PREP() directly instead. + */ +#define field_prep(mask, val) \ + (__builtin_constant_p(mask) ? __FIELD_PREP(mask, val, "field_prep: ") \ + : __field_prep(mask, val)) + +/** + * field_get() - extract a bitfield element + * @mask: shifted mask defining the field's length and position, must be + * non-zero + * @reg: value of entire bitfield + * + * Return: extracted field value + * + * field_get() extracts the field specified by @mask from the + * bitfield passed in as @reg by masking and shifting it down. + * Unlike FIELD_GET(), @mask is not limited to a compile-time constant. + * Typical usage patterns are a value stored in a table, or calculated by + * shifting a constant by a variable number of bits. + * If you want to ensure that @mask is a compile-time constant, please use + * FIELD_GET() directly instead. + */ +#define field_get(mask, reg) \ + (__builtin_constant_p(mask) ? __FIELD_GET(mask, reg, "field_get: ") \ + : __field_get(mask, reg)) + #endif --=20 2.43.0