From nobody Mon Sep 15 11:31:29 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F16CAC54EBC for ; Thu, 12 Jan 2023 16:46:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240972AbjALQql (ORCPT ); Thu, 12 Jan 2023 11:46:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42094 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240199AbjALQid (ORCPT ); Thu, 12 Jan 2023 11:38:33 -0500 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 99D3D1BEA3; Thu, 12 Jan 2023 08:34:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673541243; x=1705077243; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xLEJWQLYzY+JO7Q0MkVG9KzB+lHqhL0n1uYJldM9dOU=; b=DkIUr6kSbZY63AWrPM/4nTStVBjN8rJ3pSLqZ/Y08uqydnMFO8btHWgl u+mTZvC4qxTctWU/H48IeH76xpdDFS/MYkEPZp7dbN4FFhFDpF8NHZ1tj qOHeq/05dNIbpY/G3tJ7IZE9wLqm5YkuLg3Eg5UfVV8Nj1GjcRkrfoI6y g1+dQzIRy3kHhu8yRQ3YyI3L5N+XEBQ9h5hb7Ifeo6HIsxgTawxz/2Y/j XQeSfN9UNGjD0fSKDR2S35cUnEJqx8zgbsE55WPfdZ6xl0VKnKfg7Gq3h Q8/tR0oEBXVXRvVLSUsmWJrDusJErr7b7cxZIybn4OxrZoXJuye0UmS8P g==; X-IronPort-AV: E=McAfee;i="6500,9779,10588"; a="323811870" X-IronPort-AV: E=Sophos;i="5.97,211,1669104000"; d="scan'208";a="323811870" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2023 08:33:27 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10588"; a="721151791" X-IronPort-AV: E=Sophos;i="5.97,211,1669104000"; d="scan'208";a="721151791" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jan 2023 08:33:27 -0800 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar , David Matlack Subject: [PATCH v11 045/113] KVM: x86/mmu: Make make_spte() aware of shared GPA for MTRR Date: Thu, 12 Jan 2023 08:31:53 -0800 Message-Id: <5d9a6b899ea9a25a1192efd0ef5e43ecb1a0f250.1673539699.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Isaku Yamahata For TDX MTRR support of shared GPA, get_mt_mask() method needs to know if the given gfn is shared or private. Make make_spte() aware of shared GPA and rename gfn of make_spte() to gfn_including_shared to make it explicit. Signed-off-by: Isaku Yamahata --- arch/x86/kvm/mmu/spte.c | 5 +++-- arch/x86/kvm/mmu/spte.h | 2 +- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/mmu/spte.c b/arch/x86/kvm/mmu/spte.c index a23e9205fc42..7171df3e262a 100644 --- a/arch/x86/kvm/mmu/spte.c +++ b/arch/x86/kvm/mmu/spte.c @@ -136,13 +136,14 @@ bool spte_has_volatile_bits(u64 spte) =20 bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, const struct kvm_memory_slot *slot, - unsigned int pte_access, gfn_t gfn, kvm_pfn_t pfn, + unsigned int pte_access, gfn_t gfn_including_shared, kvm_pfn_t pfn, u64 old_spte, bool prefetch, bool can_unsync, bool host_writable, u64 *new_spte) { int level =3D sp->role.level; u64 spte =3D SPTE_MMU_PRESENT_MASK; bool wrprot =3D false; + gfn_t gfn =3D gfn_including_shared & ~kvm_gfn_shared_mask(vcpu->kvm); =20 WARN_ON_ONCE(!pte_access && !shadow_present_mask); =20 @@ -190,7 +191,7 @@ bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_pa= ge *sp, spte |=3D PT_PAGE_SIZE_MASK; =20 if (shadow_memtype_mask) - spte |=3D static_call(kvm_x86_get_mt_mask)(vcpu, gfn, + spte |=3D static_call(kvm_x86_get_mt_mask)(vcpu, gfn_including_shared, kvm_is_mmio_pfn(pfn)); if (host_writable) spte |=3D shadow_host_writable_mask; diff --git a/arch/x86/kvm/mmu/spte.h b/arch/x86/kvm/mmu/spte.h index 7046671b08cb..067ea1ae3a13 100644 --- a/arch/x86/kvm/mmu/spte.h +++ b/arch/x86/kvm/mmu/spte.h @@ -481,7 +481,7 @@ bool spte_has_volatile_bits(u64 spte); =20 bool make_spte(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp, const struct kvm_memory_slot *slot, - unsigned int pte_access, gfn_t gfn, kvm_pfn_t pfn, + unsigned int pte_access, gfn_t gfn_including_shared, kvm_pfn_t pfn, u64 old_spte, bool prefetch, bool can_unsync, bool host_writable, u64 *new_spte); u64 make_huge_page_split_spte(struct kvm *kvm, u64 huge_spte, --=20 2.25.1