From nobody Wed Apr 8 02:49:23 2026 Received: from mail.imp.bg.ac.rs (mail.imp.bg.ac.rs [147.91.50.100]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3EE5140DFBF; Tue, 10 Mar 2026 15:29:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=147.91.50.100 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773156593; cv=none; b=MeZ69SsE7VuGN6TeUgtE1w3lxM1SEZNECH/9CKS2H43jmahG6DE/yrb8JVRGbR03zcebSmXTRVAefDzH+4xz1PeBHB4iJ30vmKd1czU2zN01SiR9cPFaoNrmEQTLEKT2XtiNh9yYn58dYWL0vC4uYHje3C0qJAm0kYgAs1whYIA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773156593; c=relaxed/simple; bh=CsrGp59lJi1S7TXNeA7D4Mwfq7dbJtBYPzpTxQ+wkFs=; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:Content-Type; b=OUQoczQVNK8olBehbCNg0miA10g9hctEAnYe/6oCCPDb7FFiJgp350ubzQkmOhBnA1R1/hyGrlDh8FmB/+E84I+3wWpVtgMXy4OY7JRo8Trq5+4oxwVqwHxjQlkWLCVwFFU20tzCQuwdQYIXLY848nny7R9vaxrowK3UwnUs/x8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=pupin.rs; spf=pass smtp.mailfrom=pupin.rs; dkim=pass (1024-bit key) header.d=pupin.rs header.i=@pupin.rs header.b=daYYB8/2; arc=none smtp.client-ip=147.91.50.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=pupin.rs Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pupin.rs Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=pupin.rs header.i=@pupin.rs header.b="daYYB8/2" Received: from localhost (localhost [127.0.0.1]) by mail.imp.bg.ac.rs (Postfix) with ESMTP id 4D753140C6790; Tue, 10 Mar 2026 16:29:48 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pupin.rs; h= content-transfer-encoding:content-type:content-type:organization :message-id:references:in-reply-to:subject:subject:from:from :date:date:mime-version:received:received:received; s= dkim20260301; t=1773156588; bh=CsrGp59lJi1S7TXNeA7D4Mwfq7dbJtBYP zpTxQ+wkFs=; b=daYYB8/2OqAR4snMS8jz2szRMj0EKVANuBNyx0c6+LdR0oIzu b3vBp0g9+4GGRt0Zd3HLw9ceSvvpOhOmXhIAmMuEjfcye/2+znAFxN8tfUeVTDpM eJcEj3aMSh4VxCYlZgGD+m4ygVrnKu/LqfP27G80Zz0i1BGrtGRoznI9F0= X-Virus-Scanned: amavis at imp.bg.ac.rs Received: from mail.imp.bg.ac.rs ([127.0.0.1]) by localhost (mail.imp.bg.ac.rs [127.0.0.1]) (amavis, port 10024) with LMTP id heLFrbcVhbNf; Tue, 10 Mar 2026 16:29:48 +0100 (CET) X-Comment: SPF check N/A for local connections - client-ip=147.91.50.99; helo=webmail.imp.bg.ac.rs; envelope-from=david.marinovic@pupin.rs; receiver=jic23@kernel.org DKIM-Filter: OpenDKIM Filter v2.11.0 mail.imp.bg.ac.rs 2FBB3140C678E Received: from webmail.imp.bg.ac.rs (webmail.imp.bg.ac.rs [147.91.50.99]) by mail.imp.bg.ac.rs (Postfix) with ESMTP id 2FBB3140C678E; Tue, 10 Mar 2026 16:29:48 +0100 (CET) Received: from unknown (unknown [147.91.52.213]) by webmail.imp.bg.ac.rs (Roundcube webmail) with HTTP; Tue, 10 Mar 2026 16:29:48 +0100 CET Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 10 Mar 2026 16:29:48 +0100 From: =?UTF-8?Q?David_Marinovi=C4=87?= To: jic23@kernel.org Cc: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] iio: dac: ltc2632: add support for LTC2654 DAC family In-Reply-To: <5d4fb8998d9634c3e5a8ed17b80dae07@pupin.rs> References: <5d4fb8998d9634c3e5a8ed17b80dae07@pupin.rs> Message-ID: <82ba84f98db9c32d3fc4efd7ef6697a2@pupin.rs> X-Sender: david.marinovic@pupin.rs Organization: IMPT Content-Type: text/plain; charset="utf-8"; format="flowed" Content-Transfer-Encoding: quoted-printable Add support for the Linear Technology LTC2654 quad DAC family. The LTC2654 is a 4-channel, 16-/12-bit DAC with SPI interface, sharing the same 24-bit SPI protocol as the existing LTC2632/ LTC2634/LTC2636 devices supported by this driver. Add support for the following variants: - LTC2654L-16: 16-bit, 2.5V internal reference - LTC2654L-12: 12-bit, 2.5V internal reference - LTC2654H-16: 16-bit, 4.096V internal reference - LTC2654H-12: 12-bit, 4.096V internal reference Signed-off-by: David Marinovic --- drivers/iio/dac/ltc2632.c | 47 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 44 insertions(+), 3 deletions(-) diff --git a/drivers/iio/dac/ltc2632.c b/drivers/iio/dac/ltc2632.c index 105f939f7e54..05d3bf65399f 100644 --- a/drivers/iio/dac/ltc2632.c +++ b/drivers/iio/dac/ltc2632.c @@ -67,6 +67,10 @@ enum ltc2632_supported_device_ids { ID_LTC2636H12, ID_LTC2636H10, ID_LTC2636H8, + ID_LTC2654L16, + ID_LTC2654L12, + ID_LTC2654H16, + ID_LTC2654H12 }; static int ltc2632_spi_write(struct spi_device *spi, @@ -79,8 +83,8 @@ static int ltc2632_spi_write(struct spi_device *spi, * The input shift register is 24 bits wide. * The next four are the command bits, C3 to C0, * followed by the 4-bit DAC address, A3 to A0, and then the - * 12-, 10-, 8-bit data-word. The data-word comprises the 12-, - * 10-, 8-bit input code followed by 4, 6, or 8 don't care bits. + * 16-, 12-, 10-, 8-bit data-word. The data-word comprises the + * 16-, 12-, 10-, 8-bit input code followed by 0, 4, 6, or 8=20 don't care bits. */ data =3D (cmd << 20) | (addr << 16) | (val << shift); put_unaligned_be24(data, &msg[0]); @@ -206,6 +210,7 @@ static const struct iio_chan_spec_ext_info=20 ltc2632_ext_info[] =3D { LTC2632_CHANNEL(7, _bits), \ } +static DECLARE_LTC2632_CHANNELS(ltc2632x16, 16); static DECLARE_LTC2632_CHANNELS(ltc2632x12, 12); static DECLARE_LTC2632_CHANNELS(ltc2632x10, 10); static DECLARE_LTC2632_CHANNELS(ltc2632x8, 8); @@ -301,6 +306,26 @@ static const struct ltc2632_chip_info=20 ltc2632_chip_info_tbl[] =3D { .num_channels =3D 8, .vref_mv =3D 4096, }, + [ID_LTC2654L16] =3D { + .channels =3D ltc2632x16_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, + }, + [ID_LTC2654L12] =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 4, + .vref_mv =3D 2500, + }, + [ID_LTC2654H16] =3D { + .channels =3D ltc2632x16_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, + }, + [ID_LTC2654H12] =3D { + .channels =3D ltc2632x12_channels, + .num_channels =3D 4, + .vref_mv =3D 4096, + }, }; static int ltc2632_probe(struct spi_device *spi) @@ -372,6 +397,10 @@ static const struct spi_device_id ltc2632_id[] =3D { { "ltc2636-h12",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H12] }, { "ltc2636-h10",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H10] }, { "ltc2636-h8",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2636H8] }, + { "ltc2654-l16",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2654L16] }, + { "ltc2654-l12",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2654L12] }, + { "ltc2654-h16",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2654H16] }, + { "ltc2654-h12",=20 (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2654H12] }, { } }; MODULE_DEVICE_TABLE(spi, ltc2632_id); @@ -431,6 +460,18 @@ static const struct of_device_id ltc2632_of_match[]=20 =3D { }, { .compatible =3D "lltc,ltc2636-h8", .data =3D <c2632_chip_info_tbl[ID_LTC2636H8] + }, { + .compatible =3D "lltc,ltc2654-l16", + .data =3D <c2632_chip_info_tbl[ID_LTC2654L16] + }, { + .compatible =3D "lltc,ltc2654-l12", + .data =3D <c2632_chip_info_tbl[ID_LTC2654L12] + }, { + .compatible =3D "lltc,ltc2654-h16", + .data =3D <c2632_chip_info_tbl[ID_LTC2654H16] + }, { + .compatible =3D "lltc,ltc2654-h12", + .data =3D <c2632_chip_info_tbl[ID_LTC2654H12] }, { } }; @@ -447,5 +488,5 @@ static struct spi_driver ltc2632_driver =3D { module_spi_driver(ltc2632_driver); MODULE_AUTHOR("Maxime Roussin-Belanger=20 "); -MODULE_DESCRIPTION("LTC2632 DAC SPI driver"); +MODULE_DESCRIPTION("LTC2632/LTC2654 DAC SPI driver"); MODULE_LICENSE("GPL v2"); -- 2.50.1 -------- Original Message -------- Subject: [PATCH 0/2] iio: dac: ltc2632: add support for LTC2654 DAC=20 family Date: 10.03.2026 16:27 From: David Marinovi=C4=87 To: jic23@kernel.org This patch series adds support for the Linear Technology LTC2654 quad DAC family to the existing ltc2632 driver. The LTC2654 shares the same 24-bit SPI protocol as the existing LTC2632/2634/2636 devices, requiring minimal additions to the driver. The LTC2654L-16 variant has been tested on a Phytec phyCORE-STM32MP1 board with the DAC connected via SPI1. The driver probes successfully and all 4 channels are accessible via the IIO sysfs interface. Patch 1 adds the driver support. Patch 2 updates the DT bindings documentation. David Marinovic (2): iio: dac: ltc2632: add support for LTC2654 DAC family dt-bindings: iio: dac: ltc2632: add LTC2654 compatible strings Signed-off-by: David Marinovic From nobody Wed Apr 8 02:49:23 2026 Received: from mail.imp.bg.ac.rs (mail.imp.bg.ac.rs [147.91.50.100]) by smtp.subspace.kernel.org (Postfix) with ESMTP id ED7292FFF90; Tue, 10 Mar 2026 15:32:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=147.91.50.100 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773156728; cv=none; b=evrbyV+gBMQJl1dNEpGXE3lwAVYjl+XFZaOKZA75tpNAuo3WGDL/Ty9W2o1kcVHX4feKK730wPEVNS8A9+mgj7M8TBp/bRSM4hn/ghQkZEncbk2FS9yCv17NOd+VbkwV8hLQIPdJcsVNhgWR1LfKkYnQ5UHRub+L5cnWEhc111w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773156728; c=relaxed/simple; bh=HWXUxNP24ZxwPDxXd/1kdGPY1x0SNvyp4hczIWz8Ysk=; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:Content-Type; b=VKhvmfhpWlsQnPNjHbb0aZX5hwLw55YVr+GUCIflxUvedvEc6ImAJo2fbE93CCmHgp2l86Rq9OQ2ho3RVDkadCHRhzxA4XyisoDpoC2ojFXDSfyp8V8SU07PC5puKTMqxPUx+M7CPnyopanNjVECWk4+Fs6QzTfUwz2f3aImlZI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=pupin.rs; spf=pass smtp.mailfrom=pupin.rs; dkim=pass (1024-bit key) header.d=pupin.rs header.i=@pupin.rs header.b=GaIoZX8c; arc=none smtp.client-ip=147.91.50.100 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=pupin.rs Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pupin.rs Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=pupin.rs header.i=@pupin.rs header.b="GaIoZX8c" Received: from localhost (localhost [127.0.0.1]) by mail.imp.bg.ac.rs (Postfix) with ESMTP id 09817140C678E; Tue, 10 Mar 2026 16:32:06 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=pupin.rs; h= content-transfer-encoding:content-type:content-type:organization :message-id:references:in-reply-to:subject:subject:from:from :date:date:mime-version:received:received:received; s= dkim20260301; t=1773156725; bh=HWXUxNP24ZxwPDxXd/1kdGPY1x0SNvyp4 hczIWz8Ysk=; b=GaIoZX8cTkbysKe0+ngoJqAcWxyqiHFaiNqvCs1bD3KnLMB5V jCFA5koSvPVyp1Rawj0xEJgkAKGKKWxRlf4BOKq5X6u70WHl1RCsU/arMkddfc9N xTz3XOZph0Q701Nt+gopRlSiqnxkjJQ9pYJ6gF2LUoOdhNikKzHeGjTHAY= X-Virus-Scanned: amavis at imp.bg.ac.rs Received: from mail.imp.bg.ac.rs ([127.0.0.1]) by localhost (mail.imp.bg.ac.rs [127.0.0.1]) (amavis, port 10024) with LMTP id XOp8DqG6FI5A; Tue, 10 Mar 2026 16:32:05 +0100 (CET) X-Comment: SPF check N/A for local connections - client-ip=147.91.50.99; helo=webmail.imp.bg.ac.rs; envelope-from=david.marinovic@pupin.rs; receiver=jic23@kernel.org DKIM-Filter: OpenDKIM Filter v2.11.0 mail.imp.bg.ac.rs CC70F140C38F9 Received: from webmail.imp.bg.ac.rs (webmail.imp.bg.ac.rs [147.91.50.99]) by mail.imp.bg.ac.rs (Postfix) with ESMTP id CC70F140C38F9; Tue, 10 Mar 2026 16:32:05 +0100 (CET) Received: from unknown (unknown [147.91.52.213]) by webmail.imp.bg.ac.rs (Roundcube webmail) with HTTP; Tue, 10 Mar 2026 16:32:05 +0100 CET Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Date: Tue, 10 Mar 2026 16:32:05 +0100 From: =?UTF-8?Q?David_Marinovi=C4=87?= To: jic23@kernel.org Cc: jic23@kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, andy@kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, michael.hennerich@analog.com, devicetree@vger.kernel.org Subject: [PATCH 2/2] dt-bindings: iio: dac: ltc2632: add LTC2654 compatible strings In-Reply-To: <5d4fb8998d9634c3e5a8ed17b80dae07@pupin.rs> References: <5d4fb8998d9634c3e5a8ed17b80dae07@pupin.rs> Message-ID: <4915e1023c72d2681b0c4ae028ec609e@pupin.rs> X-Sender: david.marinovic@pupin.rs Organization: IMPT Content-Type: text/plain; charset="utf-8"; format="flowed" Content-Transfer-Encoding: quoted-printable Add DT compatible strings for the LTC2654 DAC family variants supported by the ltc2632 driver. Signed-off-by: David Marinovic --- .../devicetree/bindings/iio/dac/lltc,ltc2632.yaml | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml=20 b/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml index 733edc7d6d17..7ec663beec1a 100644 --- a/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml +++ b/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml @@ -4,14 +4,15 @@ $id: http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC +title: Linear Technology LTC263x 12-/10-/8-Bit, LTC2654 16-/12-Bit,=20 Rail-to-Rail DAC maintainers: - Michael Hennerich description: | - Bindings for the Linear Technology LTC2632/2634/2636 DAC + Bindings for the Linear Technology LTC2632/2634/2636/2654 DAC Datasheet can be found here:=20 https://www.analog.com/media/en/technical-documentation/data-sheets/LTC263[= 246].pdf + Datasheet can be found here:=20 https://www.analog.com/media/en/technical-documentation/data-sheets/2654f.p= df properties: compatible: @@ -34,6 +35,10 @@ properties: - lltc,ltc2636-h12 - lltc,ltc2636-h10 - lltc,ltc2636-h8 + - lltc,ltc2654-l16 + - lltc,ltc2654-l12 + - lltc,ltc2654-h16 + - lltc,ltc2654-h12 reg: maxItems: 1 -- 2.50.1 -------- Original Message -------- Subject: [PATCH 0/2] iio: dac: ltc2632: add support for LTC2654 DAC=20 family Date: 10.03.2026 16:27 From: David Marinovi=C4=87 To: jic23@kernel.org This patch series adds support for the Linear Technology LTC2654 quad DAC family to the existing ltc2632 driver. The LTC2654 shares the same 24-bit SPI protocol as the existing LTC2632/2634/2636 devices, requiring minimal additions to the driver. The LTC2654L-16 variant has been tested on a Phytec phyCORE-STM32MP1 board with the DAC connected via SPI1. The driver probes successfully and all 4 channels are accessible via the IIO sysfs interface. Patch 1 adds the driver support. Patch 2 updates the DT bindings documentation. David Marinovic (2): iio: dac: ltc2632: add support for LTC2654 DAC family dt-bindings: iio: dac: ltc2632: add LTC2654 compatible strings Signed-off-by: David Marinovic