From nobody Fri Dec 19 07:39:07 2025 Received: from mta-64-226.siemens.flowmailer.net (mta-64-226.siemens.flowmailer.net [185.136.64.226]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D1281A76D1 for ; Wed, 28 Aug 2024 18:01:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.226 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724868089; cv=none; b=c1nD4SpGvEmvlbafFievlQyRdrJ966sdVSYcRoqN4W4eKpV5yc8rObWF1xDluwfmYEeFQXEI2aApySSSTMyM/hTpv6cZKD6hWoPlimhf1P2UIuyBHsCnFMgzHXqRuVUsv9SBD1McsakmmeEQq92dy9o3AEQ7SNHmCC++TUDeRng= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724868089; c=relaxed/simple; bh=Y+83Zq39yj1aZRu0hrD5EBGhQ3sOjxsXdYa32F1Vygk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sZeJmV0rQvshcsvq2Pa3fQs6uRt208fsA97tid93bKyJC1AgxHoXoedaUUHrOSLbv2kIjUeFeeCHjt8KjexkQjPiQyy8JqZBrsXKwAi3iOzsekjPkqVggBkFw8IYm2OPiEzXlND5u1wbp19Yn+Y9GFmuxLlHawqn5BXV9RMGhN0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b=ee0xI95/; arc=none smtp.client-ip=185.136.64.226 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b="ee0xI95/" Received: by mta-64-226.siemens.flowmailer.net with ESMTPSA id 202408281801239cdf0b5df9f01b5f03 for ; Wed, 28 Aug 2024 20:01:23 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=jan.kiszka@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=RWcQ/RmTGCXM7N+YzgeBVxjrCMTcl4LLzbDbsVMgp4w=; b=ee0xI95/9WRvYC4Y0kcIY/Wdp4iO/ldBeuowpvzdhzAJAUTfnbFs7Yjj/HQR/mdsJYhqXN w5XDG43OtTR3YM+irRx/Y1Hg3Rosj0WM2WgyPaJR6rggZQtjl3TGp4B+YvLbEdXxoaeT0S/R 0Qztr35A9/atvyNa5XooBB6V3sbtnDKNo0Bps1Zl0EVVFZC1Bb5B/PyLOVG5+UftC8Q4XAxy lV7wHBD6ifZgUO43BrrqK1vTVi7hQcF/PtCABdoCwifxbbRNvV3xt9mtEeqCzpEoA9BBpN4c jsonEACcOa4gS6BUcJxFDzlBTG62kRIEFAiTJoaFONZQTmqsKs2febUw==; From: Jan Kiszka To: Nishanth Menon , Santosh Shilimkar , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, Siddharth Vadapalli , Bao Cheng Su , Hua Qian Li , Diogo Ivo Subject: [PATCH v3 3/7] arm64: dts: ti: k3-am65-main: Add PVU nodes Date: Wed, 28 Aug 2024 20:01:16 +0200 Message-ID: <502f266994398ef2e26d825ab3e60776bcee85cd.1724868080.git.jan.kiszka@siemens.com> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-294854:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Jan Kiszka Add nodes for the two PVUs of the AM65. Keep them disabled, though, because the board has to additionally define DMA pools and the devices to be isolated. Signed-off-by: Jan Kiszka --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am65-main.dtsi index a8664b246795..08ce765828a4 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -833,6 +833,26 @@ main_cpts_mux: refclk-mux { assigned-clock-parents =3D <&k3_clks 118 5>; }; }; + + ti_pvu0: iommu@30f80000 { + compatible =3D "ti,am654-pvu"; + reg =3D <0 0x30f80000 0 0x1000>, + <0 0x36000000 0 0x100000>; + reg-names =3D "cfg", "tlbif"; + interrupts-extended =3D <&intr_main_navss 390>; + interrupt-names =3D "pvu"; + status =3D "disabled"; + }; + + ti_pvu1: iommu@30f81000 { + compatible =3D "ti,am654-pvu"; + reg =3D <0 0x30f81000 0 0x1000>, + <0 0x36100000 0 0x100000>; + reg-names =3D "cfg", "tlbif"; + interrupts-extended =3D <&intr_main_navss 389>; + interrupt-names =3D "pvu"; + status =3D "disabled"; + }; }; =20 main_gpio0: gpio@600000 { --=20 2.43.0