From nobody Tue Oct 7 07:16:06 2025 Received: from mail-wm1-f51.google.com (mail-wm1-f51.google.com [209.85.128.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C17182EF2B2 for ; Fri, 11 Jul 2025 16:24:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752251078; cv=none; b=rQf0JQ6gr0Wad2yrgXORDIh6awMfUdVMj075nzL2buG4aQWGFszMrXE3sk5N7JOBwtVzhlQImQjmxnucePSL9a69VP61e5w6mfLYrPyxqvBZV9I0dHeePIQ24lxnVXPVFaq4ffBtsYw9eN5UfGgjxs+c41r3OxFxQon1qu+DRdk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1752251078; c=relaxed/simple; bh=7QQTaD4RTXmPFB/5DuqaUm+V9mjhhB9g7+BbMhqjxGU=; h=Message-ID:Date:MIME-Version:Subject:From:To:Cc:References: In-Reply-To:Content-Type; b=RvlQPsiVPYhCCm34C7atvqgf9GmDF+2NePKQxf035gNVe81tXmMzQVJdws7iTtvVGNFfPTVYcxbCYU2fpb9WULeLlzJZJaibIkNH9TG1lP6aYrpv1BXq1ZXQDEg4MaabJWm//qSEQ131gGwKCQE+xm1Iha3brUIVNCrlmqjHkcM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=neon.tech; spf=pass smtp.mailfrom=neon.tech; dkim=pass (1024-bit key) header.d=neon.tech header.i=@neon.tech header.b=SxL6YVZV; arc=none smtp.client-ip=209.85.128.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=neon.tech Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=neon.tech Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=neon.tech header.i=@neon.tech header.b="SxL6YVZV" Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-455fddfa2c3so434645e9.2 for ; Fri, 11 Jul 2025 09:24:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=neon.tech; s=google; t=1752251075; x=1752855875; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:from:subject:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=VmqWzINlR7ueURt8ykpnYBNe7vdszeCG5zNyAg94yWQ=; b=SxL6YVZVYF/aHaSzQKB51ZPUknQfB3I6oMhWKgF/JR/A2Kwr8QU5pS15pUu9rbYI1G mGnCait0peB2yWNTDn2Rmik5K6xN4peOrvluvM64lXGRId96zh14uiHfkODg/SxLbHZp ux8+nJC4AVSPv8CZ8mci6MKGWmlyr9+39x+yQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1752251075; x=1752855875; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:from:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=VmqWzINlR7ueURt8ykpnYBNe7vdszeCG5zNyAg94yWQ=; b=C70cIXZtdd/26pV+u07bHbLoObMtxj5DV6P/D5pi7SN/2XLRPNVEseL9gWZEZDu1bN xv4Es/J0IC3vzuPpey2mxz3o9HvR8lQYSOyXD21afRZbdBDMHe6/WzSqYsIGIWanDMuY 4h1rRFN8mJlTn3X/gdnSjUWgo9Q57yJ9yQWo6/DAXoH/Qfs3bN0NIyz1c4a4evg52UIe 0iMglaGQGf3uMeCKvGkgPJZqSmvVosdCjar4kAYdoCuD63B0MS/Yk04oC4dku60ZCnMr pO5soGFsJTPD1fH+B5gd6StZt7nMIcDZWRerwL8w19+b2FTmM4Iscf+RXnBX80ICV64a ELfg== X-Gm-Message-State: AOJu0YzpkAt53VtY/sVxygRMoDsQMj71PNCJD9nZIhavd+wxA/6h+4+c HIWdqZ3gIcwmMB5+7b6WAX/5nBG9q/9hxFVuC8acdvJ/1yXlSnlx+55xucgZu4EWb9zP/5wGrX/ EPx03zn0= X-Gm-Gg: ASbGnctHBDXdqsqupCcGvAwweRTOqrkiESrX2tgJccXkN1KTK01skswv7F0F3sgzkt8 ZZhRwZHx/P3LO/4ErNKUajXRkrecxonQGN4e1b+S0kDdmNKpBe1IZ4tivZPPs/X/pZIhPR7XKoB rc9y8OibHe9ECZ03kZ3ary5XRNt8eFarCu//FTUQ56HCgqQSq8n1N/xpxpeeeBcdWNjIR0LDCDO Sx8z1PmF0V532zzuscbMAwgvunh2AsOveLxr88NN1rVsQgSGvRMEevPgCprVYjZtatD5HJHw1vW 6L+4JPQ4H5xbx79jx/xBMNeAWk7OHWyhN9yT9HKBQlvD+2Qn6DbKjdV3mLgEGLIeZqwKkBTQQku QoMoPAcfxUXW7/7Q4oAZ9U7TkHPH81/4Xq9Y= X-Google-Smtp-Source: AGHT+IHU9h0oitDhYyJ5Jd3VSokKs4uRGWzwtm/i43M875ekjrtkNtDt0ymoLk+jcdr65MBB1vNhbw== X-Received: by 2002:a05:600c:3b03:b0:454:b97b:cabb with SMTP id 5b1f17b1804b1-454ec283b2cmr34823395e9.28.1752251074495; Fri, 11 Jul 2025 09:24:34 -0700 (PDT) Received: from [192.168.86.142] ([90.253.47.31]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b5e8dc3a54sm4964637f8f.39.2025.07.11.09.24.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Jul 2025 09:24:34 -0700 (PDT) Message-ID: <05d016e1-2530-4cab-b5b2-41e8aa547a4b@neon.tech> Date: Fri, 11 Jul 2025 17:24:33 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 1/4] x86/mm: Update mapped addresses in phys_{pmd,pud}_init() From: Em Sharnoff To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Edgecombe, Rick P" , Oleg Vasilev , Arthur Petukhovsky , Stefan Radig , Misha Sakhnov References: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Language: en-US In-Reply-To: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently kernel_physical_mapping_init() and its dependents return the last physical address mapped ('paddr_last'). This makes it harder to cleanly handle allocation errors in those functions. 'paddr_last' is used to update 'pfn_mapped'/'max_pfn_mapped', so: 1. Introduce add_paddr_range_mapped() to do the update, translating from physical addresses to pfns 2. Call add_paddr_range_mapped() in phys_pud_init() where 'paddr_last' would otherwise be updated due to 1Gi pages. - Note: this includes places where we set 'paddr_last =3D paddr_next', as was added in 20167d3421a0 ("x86-64: Fix accounting in kernel_physical_mapping_init()") add_paddr_range_mapped() is probably too expensive to be called every time a page is updated, so instead, phys_pte_init() continues to return 'paddr_last', and phys_pmd_init() calls add_paddr_range_mapped() only at the end of the loop (should mean it's called every 1Gi). Signed-off-by: Em Sharnoff --- Changelog: - v4: Add this patch --- arch/x86/include/asm/pgtable.h | 3 +- arch/x86/mm/init.c | 23 +++++---- arch/x86/mm/init_32.c | 6 ++- arch/x86/mm/init_64.c | 88 +++++++++++++++++----------------- arch/x86/mm/mm_internal.h | 13 +++-- 5 files changed, 69 insertions(+), 64 deletions(-) diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 97954c936c54..5d71cb192c57 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h @@ -1224,8 +1224,7 @@ extern int direct_gbpages; void init_mem_mapping(void); void early_alloc_pgt_buf(void); void __init poking_init(void); -unsigned long init_memory_mapping(unsigned long start, - unsigned long end, pgprot_t prot); +void init_memory_mapping(unsigned long start, unsigned long end, pgprot_t = prot); =20 #ifdef CONFIG_X86_64 extern pgd_t trampoline_pgd_entry; diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 7456df985d96..e87466489c66 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -526,16 +526,24 @@ bool pfn_range_is_mapped(unsigned long start_pfn, uns= igned long end_pfn) return false; } =20 +/* + * Update max_pfn_mapped and range_pfn_mapped with the range of physical + * addresses mapped. The range may overlap with previous calls to this fun= ction. + */ +void add_paddr_range_mapped(unsigned long start_paddr, unsigned long end_p= addr) +{ + add_pfn_range_mapped(start_paddr >> PAGE_SHIFT, end_paddr >> PAGE_SHIFT); +} + /* * Setup the direct mapping of the physical memory at PAGE_OFFSET. * This runs before bootmem is initialized and gets pages directly from * the physical memory. To access them they are temporarily mapped. */ -unsigned long __ref init_memory_mapping(unsigned long start, - unsigned long end, pgprot_t prot) +void __ref init_memory_mapping(unsigned long start, + unsigned long end, pgprot_t prot) { struct map_range mr[NR_RANGE_MR]; - unsigned long ret =3D 0; int nr_range, i; =20 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n", @@ -545,13 +553,10 @@ unsigned long __ref init_memory_mapping(unsigned long= start, nr_range =3D split_mem_range(mr, 0, start, end); =20 for (i =3D 0; i < nr_range; i++) - ret =3D kernel_physical_mapping_init(mr[i].start, mr[i].end, - mr[i].page_size_mask, - prot); + kernel_physical_mapping_init(mr[i].start, mr[i].end, + mr[i].page_size_mask, prot); =20 - add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT); - - return ret >> PAGE_SHIFT; + return; } =20 /* diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c index 607d6a2e66e2..a9a16d3d0eb2 100644 --- a/arch/x86/mm/init_32.c +++ b/arch/x86/mm/init_32.c @@ -246,7 +246,7 @@ static inline int is_x86_32_kernel_text(unsigned long a= ddr) * of max_low_pfn pages, by creating page tables starting from address * PAGE_OFFSET: */ -unsigned long __init +void __init kernel_physical_mapping_init(unsigned long start, unsigned long end, unsigned long page_size_mask, @@ -383,7 +383,9 @@ kernel_physical_mapping_init(unsigned long start, mapping_iter =3D 2; goto repeat; } - return last_map_addr; + + add_paddr_range_mapped(start, last_map_addr); + return; } =20 #ifdef CONFIG_HIGHMEM diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index ee66fae9ebcc..f0dc4a0e8cde 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -503,13 +503,13 @@ phys_pte_init(pte_t *pte_page, unsigned long paddr, u= nsigned long paddr_end, /* * Create PMD level page table mapping for physical addresses. The virtual * and physical address have to be aligned at this level. - * It returns the last physical address mapped. */ -static unsigned long __meminit +static void __meminit phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_en= d, unsigned long page_size_mask, pgprot_t prot, bool init) { unsigned long pages =3D 0, paddr_next; + unsigned long paddr_first =3D paddr; unsigned long paddr_last =3D paddr_end; =20 int i =3D pmd_index(paddr); @@ -580,21 +580,25 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, u= nsigned long paddr_end, spin_unlock(&init_mm.page_table_lock); } update_page_count(PG_LEVEL_2M, pages); - return paddr_last; + /* + * In case of recovery from previous state, add_paddr_range_mapped() may + * be called with an overlapping range from previous operations. + * It is idempotent, so this is ok. + */ + add_paddr_range_mapped(paddr_first, paddr_last); + return; } =20 /* * Create PUD level page table mapping for physical addresses. The virtual * and physical address do not have to be aligned at this level. KASLR can * randomize virtual addresses up to this level. - * It returns the last physical address mapped. */ -static unsigned long __meminit +static void __meminit phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_en= d, unsigned long page_size_mask, pgprot_t _prot, bool init) { unsigned long pages =3D 0, paddr_next; - unsigned long paddr_last =3D paddr_end; unsigned long vaddr =3D (unsigned long)__va(paddr); int i =3D pud_index(vaddr); =20 @@ -620,10 +624,8 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, un= signed long paddr_end, if (!pud_none(*pud)) { if (!pud_leaf(*pud)) { pmd =3D pmd_offset(pud, 0); - paddr_last =3D phys_pmd_init(pmd, paddr, - paddr_end, - page_size_mask, - prot, init); + phys_pmd_init(pmd, paddr, paddr_end, + page_size_mask, prot, init); continue; } /* @@ -641,7 +643,7 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, uns= igned long paddr_end, if (page_size_mask & (1 << PG_LEVEL_1G)) { if (!after_bootmem) pages++; - paddr_last =3D paddr_next; + add_paddr_range_mapped(paddr, paddr_next); continue; } prot =3D pte_pgprot(pte_clrhuge(*(pte_t *)pud)); @@ -654,13 +656,13 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, u= nsigned long paddr_end, pfn_pud(paddr >> PAGE_SHIFT, prot_sethuge(prot)), init); spin_unlock(&init_mm.page_table_lock); - paddr_last =3D paddr_next; + add_paddr_range_mapped(paddr, paddr_next); continue; } =20 pmd =3D alloc_low_page(); - paddr_last =3D phys_pmd_init(pmd, paddr, paddr_end, - page_size_mask, prot, init); + phys_pmd_init(pmd, paddr, paddr_end, + page_size_mask, prot, init); =20 spin_lock(&init_mm.page_table_lock); pud_populate_init(&init_mm, pud, pmd, init); @@ -669,22 +671,23 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, u= nsigned long paddr_end, =20 update_page_count(PG_LEVEL_1G, pages); =20 - return paddr_last; + return; } =20 -static unsigned long __meminit +static void __meminit phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_en= d, unsigned long page_size_mask, pgprot_t prot, bool init) { - unsigned long vaddr, vaddr_end, vaddr_next, paddr_next, paddr_last; + unsigned long vaddr, vaddr_end, vaddr_next, paddr_next; =20 - paddr_last =3D paddr_end; vaddr =3D (unsigned long)__va(paddr); vaddr_end =3D (unsigned long)__va(paddr_end); =20 - if (!pgtable_l5_enabled()) - return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, - page_size_mask, prot, init); + if (!pgtable_l5_enabled()) { + phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, + page_size_mask, prot, init); + return; + } =20 for (; vaddr < vaddr_end; vaddr =3D vaddr_next) { p4d_t *p4d =3D p4d_page + p4d_index(vaddr); @@ -706,33 +709,32 @@ phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, u= nsigned long paddr_end, =20 if (!p4d_none(*p4d)) { pud =3D pud_offset(p4d, 0); - paddr_last =3D phys_pud_init(pud, paddr, __pa(vaddr_end), - page_size_mask, prot, init); + phys_pud_init(pud, paddr, __pa(vaddr_end), + page_size_mask, prot, init); continue; } =20 pud =3D alloc_low_page(); - paddr_last =3D phys_pud_init(pud, paddr, __pa(vaddr_end), - page_size_mask, prot, init); + phys_pud_init(pud, paddr, __pa(vaddr_end), + page_size_mask, prot, init); =20 spin_lock(&init_mm.page_table_lock); p4d_populate_init(&init_mm, p4d, pud, init); spin_unlock(&init_mm.page_table_lock); } =20 - return paddr_last; + return; } =20 -static unsigned long __meminit +static void __meminit __kernel_physical_mapping_init(unsigned long paddr_start, unsigned long paddr_end, unsigned long page_size_mask, pgprot_t prot, bool init) { bool pgd_changed =3D false; - unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last; + unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next; =20 - paddr_last =3D paddr_end; vaddr =3D (unsigned long)__va(paddr_start); vaddr_end =3D (unsigned long)__va(paddr_end); vaddr_start =3D vaddr; @@ -745,16 +747,14 @@ __kernel_physical_mapping_init(unsigned long paddr_st= art, =20 if (pgd_val(*pgd)) { p4d =3D (p4d_t *)pgd_page_vaddr(*pgd); - paddr_last =3D phys_p4d_init(p4d, __pa(vaddr), - __pa(vaddr_end), - page_size_mask, - prot, init); + phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), + page_size_mask, prot, init); continue; } =20 p4d =3D alloc_low_page(); - paddr_last =3D phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), - page_size_mask, prot, init); + phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), + page_size_mask, prot, init); =20 spin_lock(&init_mm.page_table_lock); if (pgtable_l5_enabled()) @@ -770,7 +770,7 @@ __kernel_physical_mapping_init(unsigned long paddr_star= t, if (pgd_changed) sync_global_pgds(vaddr_start, vaddr_end - 1); =20 - return paddr_last; + return; } =20 =20 @@ -778,15 +778,15 @@ __kernel_physical_mapping_init(unsigned long paddr_st= art, * Create page table mapping for the physical memory for specific physical * addresses. Note that it can only be used to populate non-present entrie= s. * The virtual and physical addresses have to be aligned on PMD level - * down. It returns the last physical address mapped. + * down. */ -unsigned long __meminit +void __meminit kernel_physical_mapping_init(unsigned long paddr_start, unsigned long paddr_end, unsigned long page_size_mask, pgprot_t prot) { - return __kernel_physical_mapping_init(paddr_start, paddr_end, - page_size_mask, prot, true); + __kernel_physical_mapping_init(paddr_start, paddr_end, + page_size_mask, prot, true); } =20 /* @@ -795,14 +795,14 @@ kernel_physical_mapping_init(unsigned long paddr_star= t, * when updating the mapping. The caller is responsible to flush the TLBs = after * the function returns. */ -unsigned long __meminit +void __meminit kernel_physical_mapping_change(unsigned long paddr_start, unsigned long paddr_end, unsigned long page_size_mask) { - return __kernel_physical_mapping_init(paddr_start, paddr_end, - page_size_mask, PAGE_KERNEL, - false); + __kernel_physical_mapping_init(paddr_start, paddr_end, + page_size_mask, PAGE_KERNEL, + false); } =20 #ifndef CONFIG_NUMA diff --git a/arch/x86/mm/mm_internal.h b/arch/x86/mm/mm_internal.h index 097aadc250f7..5b873191c3c9 100644 --- a/arch/x86/mm/mm_internal.h +++ b/arch/x86/mm/mm_internal.h @@ -10,13 +10,12 @@ static inline void *alloc_low_page(void) =20 void early_ioremap_page_table_range_init(void); =20 -unsigned long kernel_physical_mapping_init(unsigned long start, - unsigned long end, - unsigned long page_size_mask, - pgprot_t prot); -unsigned long kernel_physical_mapping_change(unsigned long start, - unsigned long end, - unsigned long page_size_mask); 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Fri, 11 Jul 2025 09:25:09 -0700 (PDT) Received: from [192.168.86.142] ([90.253.47.31]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b5e8dc3a54sm4966000f8f.39.2025.07.11.09.25.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Jul 2025 09:25:08 -0700 (PDT) Message-ID: <42995ddc-01f6-4ff4-92e4-b4d1e9c3ea42@neon.tech> Date: Fri, 11 Jul 2025 17:25:07 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 2/4] x86/mm: Allow error returns from phys_*_init() From: Em Sharnoff To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Edgecombe, Rick P" , Oleg Vasilev , Arthur Petukhovsky , Stefan Radig , Misha Sakhnov References: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Language: en-US In-Reply-To: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Preparation for returning errors when alloc_low_page() fails. phys_pte_init() is excluded because it can't fail, and it's useful for it to return 'paddr_last' instead. This patch depends on the previous patch ("x86/mm: Update mapped addresses in phys_{pmd,pud}_init()"). Signed-off-by: Em Sharnoff --- Changleog: - v2: Switch from special-casing zero value to using ERR_PTR() - v3: Fix -Wint-conversion errors - v4: Switch return type to int, split alloc handling into separate patch. --- arch/x86/include/asm/pgtable.h | 2 +- arch/x86/mm/init.c | 14 +++-- arch/x86/mm/init_32.c | 4 +- arch/x86/mm/init_64.c | 100 ++++++++++++++++++++++----------- arch/x86/mm/mem_encrypt_amd.c | 8 ++- arch/x86/mm/mm_internal.h | 8 +-- 6 files changed, 87 insertions(+), 49 deletions(-) diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 5d71cb192c57..f964f52327de 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h @@ -1224,7 +1224,7 @@ extern int direct_gbpages; void init_mem_mapping(void); void early_alloc_pgt_buf(void); void __init poking_init(void); -void init_memory_mapping(unsigned long start, unsigned long end, pgprot_t = prot); +int init_memory_mapping(unsigned long start, unsigned long end, pgprot_t p= rot); =20 #ifdef CONFIG_X86_64 extern pgd_t trampoline_pgd_entry; diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index e87466489c66..474a7294016c 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -540,11 +540,12 @@ void add_paddr_range_mapped(unsigned long start_paddr= , unsigned long end_paddr) * This runs before bootmem is initialized and gets pages directly from * the physical memory. To access them they are temporarily mapped. */ -void __ref init_memory_mapping(unsigned long start, +int __ref init_memory_mapping(unsigned long start, unsigned long end, pgprot_t prot) { struct map_range mr[NR_RANGE_MR]; int nr_range, i; + int ret; =20 pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n", start, end - 1); @@ -552,11 +553,14 @@ void __ref init_memory_mapping(unsigned long start, memset(mr, 0, sizeof(mr)); nr_range =3D split_mem_range(mr, 0, start, end); =20 - for (i =3D 0; i < nr_range; i++) - kernel_physical_mapping_init(mr[i].start, mr[i].end, - mr[i].page_size_mask, prot); + for (i =3D 0; i < nr_range; i++) { + ret =3D kernel_physical_mapping_init(mr[i].start, mr[i].end, + mr[i].page_size_mask, prot); + if (ret) + return ret; + } =20 - return; + return 0; } =20 /* diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c index a9a16d3d0eb2..6e13685d7ced 100644 --- a/arch/x86/mm/init_32.c +++ b/arch/x86/mm/init_32.c @@ -246,7 +246,7 @@ static inline int is_x86_32_kernel_text(unsigned long a= ddr) * of max_low_pfn pages, by creating page tables starting from address * PAGE_OFFSET: */ -void __init +int __init kernel_physical_mapping_init(unsigned long start, unsigned long end, unsigned long page_size_mask, @@ -385,7 +385,7 @@ kernel_physical_mapping_init(unsigned long start, } =20 add_paddr_range_mapped(start, last_map_addr); - return; + return 0; } =20 #ifdef CONFIG_HIGHMEM diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index f0dc4a0e8cde..ca71eaec1db5 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -504,7 +504,7 @@ phys_pte_init(pte_t *pte_page, unsigned long paddr, uns= igned long paddr_end, * Create PMD level page table mapping for physical addresses. The virtual * and physical address have to be aligned at this level. */ -static void __meminit +static int __meminit phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_en= d, unsigned long page_size_mask, pgprot_t prot, bool init) { @@ -586,7 +586,7 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, uns= igned long paddr_end, * It is idempotent, so this is ok. */ add_paddr_range_mapped(paddr_first, paddr_last); - return; + return 0; } =20 /* @@ -594,12 +594,14 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, u= nsigned long paddr_end, * and physical address do not have to be aligned at this level. KASLR can * randomize virtual addresses up to this level. */ -static void __meminit +static int __meminit phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_en= d, unsigned long page_size_mask, pgprot_t _prot, bool init) { unsigned long pages =3D 0, paddr_next; unsigned long vaddr =3D (unsigned long)__va(paddr); + int ret; + int i =3D pud_index(vaddr); =20 for (; i < PTRS_PER_PUD; i++, paddr =3D paddr_next) { @@ -624,8 +626,10 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, un= signed long paddr_end, if (!pud_none(*pud)) { if (!pud_leaf(*pud)) { pmd =3D pmd_offset(pud, 0); - phys_pmd_init(pmd, paddr, paddr_end, - page_size_mask, prot, init); + ret =3D phys_pmd_init(pmd, paddr, paddr_end, + page_size_mask, prot, init); + if (ret) + return ret; continue; } /* @@ -661,33 +665,39 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, u= nsigned long paddr_end, } =20 pmd =3D alloc_low_page(); - phys_pmd_init(pmd, paddr, paddr_end, - page_size_mask, prot, init); + ret =3D phys_pmd_init(pmd, paddr, paddr_end, + page_size_mask, prot, init); =20 spin_lock(&init_mm.page_table_lock); pud_populate_init(&init_mm, pud, pmd, init); spin_unlock(&init_mm.page_table_lock); + + /* + * Bail only after updating pud to keep progress from pmd across + * retries. + */ + if (ret) + return ret; } =20 update_page_count(PG_LEVEL_1G, pages); =20 - return; + return 0; } =20 -static void __meminit +static int __meminit phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, unsigned long paddr_en= d, unsigned long page_size_mask, pgprot_t prot, bool init) { unsigned long vaddr, vaddr_end, vaddr_next, paddr_next; + int ret; =20 vaddr =3D (unsigned long)__va(paddr); vaddr_end =3D (unsigned long)__va(paddr_end); =20 - if (!pgtable_l5_enabled()) { - phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, - page_size_mask, prot, init); - return; - } + if (!pgtable_l5_enabled()) + return phys_pud_init((pud_t *) p4d_page, paddr, paddr_end, + page_size_mask, prot, init); =20 for (; vaddr < vaddr_end; vaddr =3D vaddr_next) { p4d_t *p4d =3D p4d_page + p4d_index(vaddr); @@ -709,24 +719,33 @@ phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, u= nsigned long paddr_end, =20 if (!p4d_none(*p4d)) { pud =3D pud_offset(p4d, 0); - phys_pud_init(pud, paddr, __pa(vaddr_end), - page_size_mask, prot, init); + ret =3D phys_pud_init(pud, paddr, __pa(vaddr_end), + page_size_mask, prot, init); + if (ret) + return ret; continue; } =20 pud =3D alloc_low_page(); - phys_pud_init(pud, paddr, __pa(vaddr_end), - page_size_mask, prot, init); + ret =3D phys_pud_init(pud, paddr, __pa(vaddr_end), + page_size_mask, prot, init); =20 spin_lock(&init_mm.page_table_lock); p4d_populate_init(&init_mm, p4d, pud, init); spin_unlock(&init_mm.page_table_lock); + + /* + * Bail only after updating p4d to keep progress from pud across + * retries. + */ + if (ret) + return ret; } =20 - return; + return 0; } =20 -static void __meminit +static int __meminit __kernel_physical_mapping_init(unsigned long paddr_start, unsigned long paddr_end, unsigned long page_size_mask, @@ -734,6 +753,7 @@ __kernel_physical_mapping_init(unsigned long paddr_star= t, { bool pgd_changed =3D false; unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next; + int ret; =20 vaddr =3D (unsigned long)__va(paddr_start); vaddr_end =3D (unsigned long)__va(paddr_end); @@ -747,14 +767,16 @@ __kernel_physical_mapping_init(unsigned long paddr_st= art, =20 if (pgd_val(*pgd)) { p4d =3D (p4d_t *)pgd_page_vaddr(*pgd); - phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), - page_size_mask, prot, init); + ret =3D phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), + page_size_mask, prot, init); + if (ret) + return ret; continue; } =20 p4d =3D alloc_low_page(); - phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), - page_size_mask, prot, init); + ret =3D phys_p4d_init(p4d, __pa(vaddr), __pa(vaddr_end), + page_size_mask, prot, init); =20 spin_lock(&init_mm.page_table_lock); if (pgtable_l5_enabled()) @@ -762,15 +784,22 @@ __kernel_physical_mapping_init(unsigned long paddr_st= art, else p4d_populate_init(&init_mm, p4d_offset(pgd, vaddr), (pud_t *) p4d, init); - spin_unlock(&init_mm.page_table_lock); + + /* + * Bail only after updating pgd/p4d to keep progress from p4d + * across retries. + */ + if (ret) + return ret; + pgd_changed =3D true; } =20 if (pgd_changed) sync_global_pgds(vaddr_start, vaddr_end - 1); =20 - return; + return 0; } =20 =20 @@ -780,13 +809,13 @@ __kernel_physical_mapping_init(unsigned long paddr_st= art, * The virtual and physical addresses have to be aligned on PMD level * down. */ -void __meminit +int __meminit kernel_physical_mapping_init(unsigned long paddr_start, unsigned long paddr_end, unsigned long page_size_mask, pgprot_t prot) { - __kernel_physical_mapping_init(paddr_start, paddr_end, - page_size_mask, prot, true); + return __kernel_physical_mapping_init(paddr_start, paddr_end, + page_size_mask, prot, true); } =20 /* @@ -795,14 +824,14 @@ kernel_physical_mapping_init(unsigned long paddr_star= t, * when updating the mapping. The caller is responsible to flush the TLBs = after * the function returns. */ -void __meminit +int __meminit kernel_physical_mapping_change(unsigned long paddr_start, unsigned long paddr_end, unsigned long page_size_mask) { - __kernel_physical_mapping_init(paddr_start, paddr_end, - page_size_mask, PAGE_KERNEL, - false); + return __kernel_physical_mapping_init(paddr_start, paddr_end, + page_size_mask, PAGE_KERNEL, + false); } =20 #ifndef CONFIG_NUMA @@ -984,8 +1013,11 @@ int arch_add_memory(int nid, u64 start, u64 size, { unsigned long start_pfn =3D start >> PAGE_SHIFT; unsigned long nr_pages =3D size >> PAGE_SHIFT; + int ret; =20 - init_memory_mapping(start, start + size, params->pgprot); + ret =3D init_memory_mapping(start, start + size, params->pgprot); + if (ret) + return ret; =20 return add_pages(nid, start_pfn, nr_pages, params); } diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c index faf3a13fb6ba..15174940d218 100644 --- a/arch/x86/mm/mem_encrypt_amd.c +++ b/arch/x86/mm/mem_encrypt_amd.c @@ -446,9 +446,11 @@ static int __init early_set_memory_enc_dec(unsigned lo= ng vaddr, * kernel_physical_mapping_change() does not flush the TLBs, so * a TLB flush is required after we exit from the for loop. */ - kernel_physical_mapping_change(__pa(vaddr & pmask), - __pa((vaddr_end & pmask) + psize), - split_page_size_mask); + ret =3D kernel_physical_mapping_change(__pa(vaddr & pmask), + __pa((vaddr_end & pmask) + psize), + split_page_size_mask); + if (ret) + return ret; } =20 ret =3D 0; diff --git a/arch/x86/mm/mm_internal.h b/arch/x86/mm/mm_internal.h index 5b873191c3c9..7f948d5377f0 100644 --- a/arch/x86/mm/mm_internal.h +++ b/arch/x86/mm/mm_internal.h @@ -12,10 +12,10 @@ void early_ioremap_page_table_range_init(void); =20 void add_paddr_range_mapped(unsigned long start_paddr, unsigned long end_p= addr); =20 -void kernel_physical_mapping_init(unsigned long start, unsigned long end, - unsigned long page_size_mask, pgprot_t prot); -void kernel_physical_mapping_change(unsigned long start, unsigned long end, - unsigned long page_size_mask); +int kernel_physical_mapping_init(unsigned long start, unsigned long end, + unsigned long page_size_mask, pgprot_t prot); +int kernel_physical_mapping_change(unsigned long start, unsigned long end, + unsigned long page_size_mask); void zone_sizes_init(void); =20 extern int after_bootmem; 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Fri, 11 Jul 2025 09:25:48 -0700 (PDT) Received: from [192.168.86.142] ([90.253.47.31]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b5e8e26c8bsm4822114f8f.88.2025.07.11.09.25.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Jul 2025 09:25:48 -0700 (PDT) Message-ID: <136b4999-1c05-4d30-9521-d621196e6ba7@neon.tech> Date: Fri, 11 Jul 2025 17:25:47 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 3/4] x86/mm: Handle alloc failure in phys_*_init() From: Em Sharnoff To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Edgecombe, Rick P" , Oleg Vasilev , Arthur Petukhovsky , Stefan Radig , Misha Sakhnov References: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Language: en-US In-Reply-To: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" During memory hotplug, allocation failures in phys_*_init() aren't handled, which results in a null pointer dereference if they occur. This patch depends on the previous patch ("x86/mm: Allow error returns from phys_*_init()"). Signed-off-by: Em Sharnoff --- Changelog: - v4: Split this patch out from the error handling changes --- arch/x86/mm/init_64.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index ca71eaec1db5..eced309a4015 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -573,6 +573,8 @@ phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, uns= igned long paddr_end, } =20 pte =3D alloc_low_page(); + if (!pte) + return -ENOMEM; paddr_last =3D phys_pte_init(pte, paddr, paddr_end, new_prot, init); =20 spin_lock(&init_mm.page_table_lock); @@ -665,6 +667,8 @@ phys_pud_init(pud_t *pud_page, unsigned long paddr, uns= igned long paddr_end, } =20 pmd =3D alloc_low_page(); + if (!pmd) + return -ENOMEM; ret =3D phys_pmd_init(pmd, paddr, paddr_end, page_size_mask, prot, init); =20 @@ -727,6 +731,8 @@ phys_p4d_init(p4d_t *p4d_page, unsigned long paddr, uns= igned long paddr_end, } =20 pud =3D alloc_low_page(); + if (!pud) + return -ENOMEM; ret =3D phys_pud_init(pud, paddr, __pa(vaddr_end), page_size_mask, prot, init); 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Fri, 11 Jul 2025 09:26:09 -0700 (PDT) Received: from [192.168.86.142] ([90.253.47.31]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b5e8e2710bsm4851898f8f.99.2025.07.11.09.26.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Jul 2025 09:26:09 -0700 (PDT) Message-ID: <51de7373-1b8d-426d-b720-ad9134c170bd@neon.tech> Date: Fri, 11 Jul 2025 17:26:08 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v5 4/4] x86/mm: Use GFP_KERNEL for alloc_low_pages() after boot From: Em Sharnoff To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , "Edgecombe, Rick P" , Oleg Vasilev , Arthur Petukhovsky , Stefan Radig , Misha Sakhnov References: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Language: en-US In-Reply-To: <4fe0984f-74dc-45fe-b2b6-bdd81ec15bac@neon.tech> Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently it's GFP_ATOMIC. GFP_KERNEL seems more correct. From Ingo M. [1] > There's no real reason why it should be GFP_ATOMIC AFAICS, other than > some historic inertia that nobody bothered to fix. and previously Mike R. [2] > The few callers that effectively use page allocator for the direct map > updates are gart_iommu_init() and memory hotplug. Neither of them > happen in an atomic context so there is no reason to use GFP_ATOMIC > for these allocations. > > Replace GFP_ATOMIC with GFP_KERNEL to avoid using atomic reserves for > allocations that do not require that. [1]: https://lore.kernel.org/all/aEE6_S2a-1tk1dtI@gmail.com/ [2]: https://lore.kernel.org/all/20211111110241.25968-5-rppt@kernel.org/ Signed-off-by: Em Sharnoff --- Changelog: - v2: Add this patch - v3: No changes - v4: No changes --- arch/x86/mm/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c index 474a7294016c..b37ac1d546af 100644 --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -132,7 +132,7 @@ __ref void *alloc_low_pages(unsigned int num) unsigned int order; =20 order =3D get_order((unsigned long)num << PAGE_SHIFT); - return (void *)__get_free_pages(GFP_ATOMIC | __GFP_ZERO, order); + return (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order); } =20 if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) { --=20 2.39.5