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client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by MWH0EPF000971E2.mail.protection.outlook.com (10.167.243.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8606.22 via Frontend Transport; Fri, 4 Apr 2025 00:19:03 +0000 Received: from bmoger-ubuntu.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 3 Apr 2025 19:18:59 -0500 From: Babu Moger To: , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v12 02/26] x86/resctrl: Remove MSR reading of event configuration value Date: Thu, 3 Apr 2025 19:18:11 -0500 Message-ID: <4f1551b39f669be01ea3e5938f165d207e2f7c6a.1743725907.git.babu.moger@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E2:EE_|CY8PR12MB7636:EE_ X-MS-Office365-Filtering-Correlation-Id: 6f3dcf5a-648d-4ae9-78f3-08dd730e4e0d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700013|13003099007; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Apr 2025 00:19:03.1158 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f3dcf5a-648d-4ae9-78f3-08dd730e4e0d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7636 Content-Type: text/plain; charset="utf-8" The event configuration is domain specific and initialized during domain initialization. The values are stored in struct rdt_hw_mon_domain. It is not required to read the configuration register every time user asks for it. Use the value stored in struct rdt_hw_mon_domain instead. Introduce resctrl_arch_mon_event_config_get() and resctrl_arch_mon_event_config_set() to get/set architecture domain specific mbm_total_cfg/mbm_local_cfg values. Signed-off-by: Babu Moger --- v12: Removed the un-necessary initialization of mon_config_info structure. Changed wrmsrl instead of wrmsr to address the below comment. https://lore.kernel.org/lkml/0fc8dbd4-07d8-40bd-8eec-402b48762807@zyto= r.com/ Fixed a minor typo in comment. Added comments to resctrl_arch_mon_event_config_get() and resctrl_arch= _mon_event_config_set() Resolved the conflicts from the recent changes. This patch is for BMEC and there is no dependancy on ABMC feature. Mov= ed it earlier. v11: Moved the mon_config_info structure definition to internal.h. Moved resctrl_arch_mon_event_config_get() and resctrl_arch_mon_event_c= onfig_set() to monitor.c file. Renamed local variable from val to config_val. v10: Moved the mon_config_info structure definition to resctrl.h. v9: Removed QOS_L3_OCCUP_EVENT_ID switch case in resctrl_arch_mon_event_con= fig_set. Fixed a unnecessary space. v8: Renamed resctrl_arch_event_config_get() to resctrl_arch_mon_event_config_get(). resctrl_arch_event_config_set() to resctrl_arch_mon_event_config_set(). v7: Removed check if (val =3D=3D INVALID_CONFIG_VALUE) as resctrl_arch_even= t_config_get already prints warning. Kept the Event config value definitions as is. v6: Fixed inconstancy with types. Made all the types to u32 for config value. Removed few rdt_last_cmd_puts as it is not necessary. Removed unused config value definitions. Few more updates to commit message. v5: Introduced resctrl_arch_event_config_get and resctrl_arch_event_config_get() based on our discussion. https://lore.kernel.org/lkml/68e861f9-245d-4496-a72e-46fc57d19c62@amd.c= om/ v4: New patch. --- arch/x86/kernel/cpu/resctrl/monitor.c | 52 +++++++++++++++++++++ arch/x86/kernel/cpu/resctrl/rdtgroup.c | 63 +++++--------------------- include/linux/resctrl.h | 18 +++----- 3 files changed, 71 insertions(+), 62 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/monitor.c b/arch/x86/kernel/cpu/re= sctrl/monitor.c index abd337fbd01d..b84cd48c3d95 100644 --- a/arch/x86/kernel/cpu/resctrl/monitor.c +++ b/arch/x86/kernel/cpu/resctrl/monitor.c @@ -1330,3 +1330,55 @@ void __init intel_rdt_mbm_apply_quirk(void) mbm_cf_rmidthreshold =3D mbm_cf_table[cf_index].rmidthreshold; mbm_cf =3D mbm_cf_table[cf_index].cf; } + +/* + * May run on CPU that does not belong to domain. + */ +u32 resctrl_arch_mon_event_config_get(struct rdt_mon_domain *d, + enum resctrl_event_id eventid) +{ + struct rdt_hw_mon_domain *hw_dom =3D resctrl_to_arch_mon_dom(d); + + switch (eventid) { + case QOS_L3_OCCUP_EVENT_ID: + break; + case QOS_L3_MBM_TOTAL_EVENT_ID: + return hw_dom->mbm_total_cfg; + case QOS_L3_MBM_LOCAL_EVENT_ID: + return hw_dom->mbm_local_cfg; + } + + /* Never expect to get here */ + WARN_ON_ONCE(1); + + return INVALID_CONFIG_VALUE; +} + +/* + * Runs on CPU that belongs to domain. + */ +void resctrl_arch_mon_event_config_set(void *info) +{ + struct resctrl_mon_config_info *mon_info =3D info; + struct rdt_hw_mon_domain *hw_dom; + unsigned int index; + + index =3D mon_event_config_index_get(mon_info->evtid); + if (index =3D=3D INVALID_CONFIG_INDEX) + return; + + wrmsrl(MSR_IA32_EVT_CFG_BASE + index, mon_info->mon_config); + + hw_dom =3D resctrl_to_arch_mon_dom(mon_info->d); + + switch (mon_info->evtid) { + case QOS_L3_MBM_TOTAL_EVENT_ID: + hw_dom->mbm_total_cfg =3D mon_info->mon_config; + break; + case QOS_L3_MBM_LOCAL_EVENT_ID: + hw_dom->mbm_local_cfg =3D mon_info->mon_config; + break; + default: + break; + } +} diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index bee32eaef8ab..b8100c89f1a6 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -1614,34 +1614,11 @@ unsigned int mon_event_config_index_get(u32 evtid) } } =20 -void resctrl_arch_mon_event_config_read(void *_config_info) -{ - struct resctrl_mon_config_info *config_info =3D _config_info; - unsigned int index; - u64 msrval; - - index =3D mon_event_config_index_get(config_info->evtid); - if (index =3D=3D INVALID_CONFIG_INDEX) { - pr_warn_once("Invalid event id %d\n", config_info->evtid); - return; - } - rdmsrl(MSR_IA32_EVT_CFG_BASE + index, msrval); - - /* Report only the valid event configuration bits */ - config_info->mon_config =3D msrval & MAX_EVT_CONFIG_BITS; -} - -static void mondata_config_read(struct resctrl_mon_config_info *mon_info) -{ - smp_call_function_any(&mon_info->d->hdr.cpu_mask, - resctrl_arch_mon_event_config_read, mon_info, 1); -} - static int mbm_config_show(struct seq_file *s, struct rdt_resource *r, u32= evtid) { - struct resctrl_mon_config_info mon_info; struct rdt_mon_domain *dom; bool sep =3D false; + u32 config_val; =20 cpus_read_lock(); mutex_lock(&rdtgroup_mutex); @@ -1650,13 +1627,8 @@ static int mbm_config_show(struct seq_file *s, struc= t rdt_resource *r, u32 evtid if (sep) seq_puts(s, ";"); =20 - memset(&mon_info, 0, sizeof(struct resctrl_mon_config_info)); - mon_info.r =3D r; - mon_info.d =3D dom; - mon_info.evtid =3D evtid; - mondata_config_read(&mon_info); - - seq_printf(s, "%d=3D0x%02x", dom->hdr.id, mon_info.mon_config); + config_val =3D resctrl_arch_mon_event_config_get(dom, evtid); + seq_printf(s, "%d=3D0x%02x", dom->hdr.id, config_val); sep =3D true; } seq_puts(s, "\n"); @@ -1687,35 +1659,23 @@ static int mbm_local_bytes_config_show(struct kernf= s_open_file *of, return 0; } =20 -void resctrl_arch_mon_event_config_write(void *_config_info) -{ - struct resctrl_mon_config_info *config_info =3D _config_info; - unsigned int index; - - index =3D mon_event_config_index_get(config_info->evtid); - if (index =3D=3D INVALID_CONFIG_INDEX) { - pr_warn_once("Invalid event id %d\n", config_info->evtid); - return; - } - wrmsr(MSR_IA32_EVT_CFG_BASE + index, config_info->mon_config, 0); -} - static void mbm_config_write_domain(struct rdt_resource *r, struct rdt_mon_domain *d, u32 evtid, u32 val) { - struct resctrl_mon_config_info mon_info =3D {0}; + struct resctrl_mon_config_info mon_info; + u32 config_val; =20 /* - * Read the current config value first. If both are the same then + * Check the current config value first. If both are the same then * no need to write it again. */ + config_val =3D resctrl_arch_mon_event_config_get(d, evtid); + if (config_val =3D=3D INVALID_CONFIG_VALUE || config_val =3D=3D val) + return; + mon_info.r =3D r; mon_info.d =3D d; mon_info.evtid =3D evtid; - mondata_config_read(&mon_info); - if (mon_info.mon_config =3D=3D val) - return; - mon_info.mon_config =3D val; =20 /* @@ -1724,7 +1684,8 @@ static void mbm_config_write_domain(struct rdt_resour= ce *r, * are scoped at the domain level. Writing any of these MSRs * on one CPU is observed by all the CPUs in the domain. */ - smp_call_function_any(&d->hdr.cpu_mask, resctrl_arch_mon_event_config_wri= te, + smp_call_function_any(&d->hdr.cpu_mask, + resctrl_arch_mon_event_config_set, &mon_info, 1); =20 /* diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index 880351ca3dfc..afa9aabf014c 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -361,7 +361,7 @@ int resctrl_arch_update_domains(struct rdt_resource *r,= u32 closid); __init bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt); =20 /** - * resctrl_arch_mon_event_config_write() - Write the config for an event. + * resctrl_arch_mon_event_config_set() - Write the config for an event. * @config_info: struct resctrl_mon_config_info describing the resource, d= omain * and event. * @@ -370,19 +370,15 @@ __init bool resctrl_arch_is_evt_configurable(enum res= ctrl_event_id evt); * * Called via IPI to reach a CPU that is a member of the specified domain. */ -void resctrl_arch_mon_event_config_write(void *config_info); +void resctrl_arch_mon_event_config_set(void *config_info); =20 /** - * resctrl_arch_mon_event_config_read() - Read the config for an event. - * @config_info: struct resctrl_mon_config_info describing the resource, d= omain - * and event. - * - * Reads resource, domain and eventid from @config_info and reads the - * hardware config value into config_info->mon_config. - * - * Called via IPI to reach a CPU that is a member of the specified domain. + * resctrl_arch_mon_event_config_get() - Get config value from the hardwar= e domain. + * @d: Monitoring domain to read config value + * @eventid: enum resctrl_event_id describing type */ -void resctrl_arch_mon_event_config_read(void *config_info); +u32 resctrl_arch_mon_event_config_get(struct rdt_mon_domain *d, + enum resctrl_event_id eventid); =20 /* For use by arch code to remap resctrl's smaller CDP CLOSID range */ static inline u32 resctrl_get_config_index(u32 closid, --=20 2.34.1