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Sat, 21 Mar 2026 03:14:09 -0700 (PDT) Date: Sat, 21 Mar 2026 13:14:06 +0300 From: Dan Carpenter To: Linus Walleij , AKASHI Takahiro Cc: Bartosz Golaszewski , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , arm-scmi@vger.kernel.org, Vincent Guittot , Khaled Ali Ahmed , Michal Simek Subject: [PATCH v5 7/7] gpio: gpio-by-pinctrl: add pinctrl based generic GPIO driver Message-ID: <4aabafcd30c1e5549dde11d6c2fe5f3f9976bce8.1774087290.git.dan.carpenter@linaro.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: AKASHI Takahiro The ARM SCMI pinctrl protocol allows GPIO access. Instead of creating a new SCMI GPIO driver, this driver is a generic GPIO driver that uses standard pinctrl interfaces. Signed-off-by: AKASHI Takahiro Signed-off-by: Dan Carpenter Reviewed-by: Linus Walleij Acked-by: Bartosz Golaszewski --- v5: Clean up based on Andy's feedback: Update Kconfig entry Update Copyright date Fix includes Get rid of unused private data Simplify pin_control_gpio_get_direction() v4: Add r-b tags v3: Forward port and update drivers/gpio/Kconfig | 13 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-by-pinctrl.c | 101 +++++++++++++++++++++++++++++++++ 3 files changed, 115 insertions(+) create mode 100644 drivers/gpio/gpio-by-pinctrl.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index b45fb799e36c..c631ecb01e07 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -246,6 +246,19 @@ config GPIO_BRCMSTB help Say yes here to enable GPIO support for Broadcom STB (BCM7XXX) SoCs. =20 +config GPIO_BY_PINCTRL + tristate "GPIO support based on a pure pin control backend" + depends on GPIOLIB + help + Support for generic GPIO handling based on top of pin control. + Traditionally, firmware creates a GPIO interface or a pin + controller interface and we have a driver to support it. But + in SCMI, the pin control interface is generic and we can + create a simple GPIO device based on the pin control interface + without doing anything custom. + + This driver used to do GPIO over the ARM SCMI protocol. + config GPIO_CADENCE tristate "Cadence GPIO support" depends on OF_GPIO diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index c05f7d795c43..20d4a57afdaa 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_GPIO_BD9571MWV) +=3D gpio-bd9571mwv.o obj-$(CONFIG_GPIO_BLZP1600) +=3D gpio-blzp1600.o obj-$(CONFIG_GPIO_BRCMSTB) +=3D gpio-brcmstb.o obj-$(CONFIG_GPIO_BT8XX) +=3D gpio-bt8xx.o +obj-$(CONFIG_GPIO_BY_PINCTRL) +=3D gpio-by-pinctrl.o obj-$(CONFIG_GPIO_CADENCE) +=3D gpio-cadence.o obj-$(CONFIG_GPIO_CGBC) +=3D gpio-cgbc.o obj-$(CONFIG_GPIO_CLPS711X) +=3D gpio-clps711x.o diff --git a/drivers/gpio/gpio-by-pinctrl.c b/drivers/gpio/gpio-by-pinctrl.c new file mode 100644 index 000000000000..4661c4df8e38 --- /dev/null +++ b/drivers/gpio/gpio-by-pinctrl.c @@ -0,0 +1,101 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2026 Linaro Inc. +// Author: AKASHI takahiro + +#include +#include +#include +#include +#include +#include +#include + +#include "gpiolib.h" + +static int pin_control_gpio_get_direction(struct gpio_chip *gc, unsigned i= nt offset) +{ + unsigned long config; + int ret; + + config =3D PIN_CONFIG_OUTPUT_ENABLE; + ret =3D pinctrl_gpio_get_config(gc, offset, &config); + if (ret) + return ret; + if (config) + return GPIO_LINE_DIRECTION_OUT; + + return GPIO_LINE_DIRECTION_IN; +} + +static int pin_control_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int val) +{ + return pinctrl_gpio_direction_output(chip, offset); +} + +static int pin_control_gpio_get(struct gpio_chip *chip, unsigned int offse= t) +{ + unsigned long config; + int ret; + + config =3D PIN_CONFIG_LEVEL; + ret =3D pinctrl_gpio_get_config(chip, offset, &config); + if (ret) + return ret; + + return !!config; +} + +static int pin_control_gpio_set(struct gpio_chip *chip, unsigned int offse= t, + int val) +{ + unsigned long config; + + config =3D PIN_CONF_PACKED(PIN_CONFIG_LEVEL, val); + return pinctrl_gpio_set_config(chip, offset, config); +} + +static int pin_control_gpio_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct gpio_chip *chip; + + chip =3D devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->label =3D dev_name(dev); + chip->parent =3D dev; + chip->base =3D -1; + + chip->request =3D gpiochip_generic_request; + chip->free =3D gpiochip_generic_free; + chip->get_direction =3D pin_control_gpio_get_direction; + chip->direction_input =3D pinctrl_gpio_direction_input; + chip->direction_output =3D pin_control_gpio_direction_output; + chip->get =3D pin_control_gpio_get; + chip->set =3D pin_control_gpio_set; + chip->set_config =3D gpiochip_generic_config; + + return devm_gpiochip_add_data(dev, chip, NULL); +} + +static const struct of_device_id pin_control_gpio_match[] =3D { + { .compatible =3D "scmi-pinctrl-gpio" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, pin_control_gpio_match); + +static struct platform_driver pin_control_gpio_driver =3D { + .probe =3D pin_control_gpio_probe, + .driver =3D { + .name =3D "pin-control-gpio", + .of_match_table =3D pin_control_gpio_match, + }, +}; +module_platform_driver(pin_control_gpio_driver); + +MODULE_AUTHOR("AKASHI Takahiro "); +MODULE_DESCRIPTION("Pinctrl based GPIO driver"); +MODULE_LICENSE("GPL"); --=20 2.51.0