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Mon, 25 Aug 2025 18:09:43 -0700 (PDT) From: Chen Wang To: u.kleine-koenig@baylibre.com, aou@eecs.berkeley.edu, unicorn_wang@outlook.com, conor+dt@kernel.org, inochiama@gmail.com, krzk+dt@kernel.org, looong.bin@gmail.com, palmer@dabbelt.com, paul.walmsley@sifive.com, robh@kernel.org, tglx@linutronix.de, sycamoremoon376@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev Subject: [PATCH v2 1/3] irqchip/sg2042-msi: Set irq type according to DT configuration Date: Tue, 26 Aug 2025 09:09:35 +0800 Message-Id: <49e70989c2f0a8a67e48527e57b4877262996214.1756169460.git.unicorn_wang@outlook.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Chen Wang The original MSI interrupt type was hard-coded, which was not a good idea. Now it is changed to read the device tree configuration and then set the interrupt type. Signed-off-by: Chen Wang --- drivers/irqchip/irq-sg2042-msi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-= msi.c index 3b13dbbfdb51..f7cf0dc72eab 100644 --- a/drivers/irqchip/irq-sg2042-msi.c +++ b/drivers/irqchip/irq-sg2042-msi.c @@ -30,6 +30,7 @@ struct sg204x_msi_chip_info { * @doorbell_addr: see TRM, 10.1.32, GP_INTR0_SET * @irq_first: First vectors number that MSIs starts * @num_irqs: Number of vectors for MSIs + * @irq_type: IRQ type for MSIs * @msi_map: mapping for allocated MSI vectors. * @msi_map_lock: Lock for msi_map * @chip_info: chip specific infomations @@ -41,6 +42,7 @@ struct sg204x_msi_chipdata { =20 u32 irq_first; u32 num_irqs; + unsigned int irq_type; =20 unsigned long *msi_map; struct mutex msi_map_lock; @@ -137,14 +139,14 @@ static int sg204x_msi_parent_domain_alloc(struct irq_= domain *domain, unsigned in fwspec.fwnode =3D domain->parent->fwnode; fwspec.param_count =3D 2; fwspec.param[0] =3D data->irq_first + hwirq; - fwspec.param[1] =3D IRQ_TYPE_EDGE_RISING; + fwspec.param[1] =3D data->irq_type; =20 ret =3D irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); if (ret) return ret; =20 d =3D irq_domain_get_irq_data(domain->parent, virq); - return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING); + return d->chip->irq_set_type(d, data->irq_type); } =20 static int sg204x_msi_middle_domain_alloc(struct irq_domain *domain, unsig= ned int virq, @@ -298,6 +300,7 @@ static int sg2042_msi_probe(struct platform_device *pde= v) } =20 data->irq_first =3D (u32)args.args[0]; + data->irq_type =3D (unsigned int)args.args[1]; data->num_irqs =3D (u32)args.args[args.nargs - 1]; =20 mutex_init(&data->msi_map_lock); --=20 2.34.1