From nobody Wed Dec 17 09:50:17 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 875B0E743FE for ; Fri, 29 Sep 2023 09:03:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232917AbjI2JDS (ORCPT ); Fri, 29 Sep 2023 05:03:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232833AbjI2JDO (ORCPT ); Fri, 29 Sep 2023 05:03:14 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D99E31B2 for ; Fri, 29 Sep 2023 02:03:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695978191; x=1727514191; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JtSNJh/6iFRzjvSsEmFDTl3PNN/JVLrNJbMF8kuGwZk=; b=jaQ1hdGO0nSLmwTH3Awme9rjBJRecao/hBMiauauGcSDRufdrMHl3h9A qOvkN+VEuL9tLnjAQ4BPlTvsp1yl1B9wCF60xNi0mMvWU3vyUhoVR/JsT SZrUXOJB1oqyFdWxKFfLNH/6nbH4+yfV9+rzL2LSXtpBj35oznaVgFmkd f8oPnBWn6wys5i28/BE6hBYz1ecp3dABnPxVoYRMzIYcG5oWh6a5W37e0 9vkD5Apwl4EfhQWK/mMkyc+WbmG2G65RRc41+glEUNl88eNDZIqPyBUeF ceGZbKNqfUGsQnrhVzPKu4+EQdILV7fWYuujVQ//3pzFIKAMioaeUlbKf Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="385078591" X-IronPort-AV: E=Sophos;i="6.03,186,1694761200"; d="scan'208";a="385078591" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2023 02:03:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="749904545" X-IronPort-AV: E=Sophos;i="6.03,186,1694761200"; d="scan'208";a="749904545" Received: from tzebrows-mobl.ger.corp.intel.com (HELO wieczorr-mobl1.intel.com) ([10.213.26.85]) by orsmga002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Sep 2023 02:03:03 -0700 From: Maciej Wieczor-Retman To: Fenghua Yu , Reinette Chatre , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" Cc: Peter Newman , linux-kernel@vger.kernel.org Subject: [PATCH v3 3/4] x86/resctrl: Add sparse_masks file in info Date: Fri, 29 Sep 2023 11:02:17 +0200 Message-ID: <46d7aa4948b4e669d35dc5b2b0b6b0167ec9c8d7.1695977733.git.maciej.wieczor-retman@intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Fenghua Yu Add the interface in resctrl FS to show if sparse cache allocation bit masks are supported on the platform. Reading the file returns either a "1" if non-contiguous 1s are supported and "0" otherwise. The file path is /sys/fs/resctrl/info/{resource}/sparse_masks, where {resource} can be either "L2" or "L3". Signed-off-by: Fenghua Yu Reviewed-by: Peter Newman Tested-by: Peter Newman Signed-off-by: Maciej Wieczor-Retman Reviewed-by: Ilpo J=C3=A4rvinen --- Changelog v3: - Add Peter's tested-by and reviewed-by tags. - Reword patch message slightly. (Reinette) Changelog v2: - Change bitmap naming convention to bit mask. (Reinette) - Change file name to "sparse_masks". (Reinette) arch/x86/kernel/cpu/resctrl/rdtgroup.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/x86/kernel/cpu/resctrl/rdtgroup.c b/arch/x86/kernel/cpu/r= esctrl/rdtgroup.c index 725344048f85..945801898a4d 100644 --- a/arch/x86/kernel/cpu/resctrl/rdtgroup.c +++ b/arch/x86/kernel/cpu/resctrl/rdtgroup.c @@ -895,6 +895,17 @@ static int rdt_shareable_bits_show(struct kernfs_open_= file *of, return 0; } =20 +static int rdt_has_sparse_bitmasks_show(struct kernfs_open_file *of, + struct seq_file *seq, void *v) +{ + struct resctrl_schema *s =3D of->kn->parent->priv; + struct rdt_resource *r =3D s->res; + + seq_printf(seq, "%u\n", r->cache.arch_has_sparse_bitmasks); + + return 0; +} + /** * rdt_bit_usage_show - Display current usage of resources * @@ -1839,6 +1850,13 @@ static struct rftype res_common_files[] =3D { .seq_show =3D rdtgroup_size_show, .fflags =3D RF_CTRL_BASE, }, + { + .name =3D "sparse_masks", + .mode =3D 0444, + .kf_ops =3D &rdtgroup_kf_single_ops, + .seq_show =3D rdt_has_sparse_bitmasks_show, + .fflags =3D RF_CTRL_INFO | RFTYPE_RES_CACHE, + }, =20 }; =20 --=20 2.42.0