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Miller" , Dan Carpenter , Kees Cook , Jiapeng Chong , open list Subject: [PATCH] crypto: octeontx2: add firmware version in devlink info Date: Fri, 27 May 2022 13:24:48 +0530 Message-ID: <421b1fbe94a82e678887260f768478c11daa1e32.1653589007.git.sthotton@marvell.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-ORIG-GUID: TF_yE3dCLGnInHXZU6UkxIyt7jjnZ3uT X-Proofpoint-GUID: TF_yE3dCLGnInHXZU6UkxIyt7jjnZ3uT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-27_02,2022-05-25_02,2022-02-23_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Added running firmware version information of AE, SE and IE components in devlink info. Signed-off-by: Shijith Thotton --- .../marvell/octeontx2/otx2_cpt_devlink.c | 40 ++++++++++++++++++- .../marvell/octeontx2/otx2_cptpf_ucode.c | 2 +- .../marvell/octeontx2/otx2_cptpf_ucode.h | 3 ++ 3 files changed, 42 insertions(+), 3 deletions(-) diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c b/drivers/= crypto/marvell/octeontx2/otx2_cpt_devlink.c index bb02e0db3615..7503f6b18ac5 100644 --- a/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c +++ b/drivers/crypto/marvell/octeontx2/otx2_cpt_devlink.c @@ -51,11 +51,47 @@ static const struct devlink_param otx2_cpt_dl_params[] = =3D { NULL), }; =20 -static int otx2_cpt_devlink_info_get(struct devlink *devlink, +static int otx2_cpt_dl_info_firmware_version_put(struct devlink_info_req *= req, + struct otx2_cpt_eng_grp_info grp[], + const char *ver_name, int eng_type) +{ + struct otx2_cpt_engs_rsvd *eng; + int i; + + for (i =3D 0; i < OTX2_CPT_MAX_ENGINE_GROUPS; i++) { + eng =3D find_engines_by_type(&grp[i], eng_type); + if (eng) + return devlink_info_version_running_put(req, ver_name, + eng->ucode->ver_str); + } + + return 0; +} + +static int otx2_cpt_devlink_info_get(struct devlink *dl, struct devlink_info_req *req, struct netlink_ext_ack *extack) { - return devlink_info_driver_name_put(req, "rvu_cptpf"); + struct otx2_cpt_devlink *cpt_dl =3D devlink_priv(dl); + struct otx2_cptpf_dev *cptpf =3D cpt_dl->cptpf; + int err; + + err =3D devlink_info_driver_name_put(req, "rvu_cptpf"); + if (err) + return err; + + err =3D otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp, + "fw.ae", OTX2_CPT_AE_TYPES); + if (err) + return err; + + err =3D otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp, + "fw.se", OTX2_CPT_SE_TYPES); + if (err) + return err; + + return otx2_cpt_dl_info_firmware_version_put(req, cptpf->eng_grps.grp, + "fw.ie", OTX2_CPT_IE_TYPES); } =20 static const struct devlink_ops otx2_cpt_devlink_ops =3D { diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c b/drivers/= crypto/marvell/octeontx2/otx2_cptpf_ucode.c index 9cba2f714c7e..46ffb7ae982c 100644 --- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c +++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c @@ -476,7 +476,7 @@ static int cpt_ucode_load_fw(struct pci_dev *pdev, stru= ct fw_info_t *fw_info) return ret; } =20 -static struct otx2_cpt_engs_rsvd *find_engines_by_type( +struct otx2_cpt_engs_rsvd *find_engines_by_type( struct otx2_cpt_eng_grp_info *eng_grp, int eng_type) { diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h b/drivers/= crypto/marvell/octeontx2/otx2_cptpf_ucode.h index 8f4d4e5f531a..e69320a54b5d 100644 --- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h +++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.h @@ -166,4 +166,7 @@ int otx2_cpt_dl_custom_egrp_create(struct otx2_cptpf_de= v *cptpf, int otx2_cpt_dl_custom_egrp_delete(struct otx2_cptpf_dev *cptpf, struct devlink_param_gset_ctx *ctx); void otx2_cpt_print_uc_dbg_info(struct otx2_cptpf_dev *cptpf); +struct otx2_cpt_engs_rsvd *find_engines_by_type( + struct otx2_cpt_eng_grp_info *eng_grp, + int eng_type); #endif /* __OTX2_CPTPF_UCODE_H */ --=20 2.25.1