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Mon, 23 Mar 2026 12:01:45 -0700 (PDT) Date: Mon, 23 Mar 2026 22:01:42 +0300 From: Dan Carpenter To: Linus Walleij , AKASHI Takahiro Cc: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko , Linus Walleij , Bartosz Golaszewski , arm-scmi@vger.kernel.org, Vincent Guittot , Khaled Ali Ahmed , Michal Simek Subject: [PATCH v6 6/7] gpio: dt-bindings: Add GPIO on top of generic pin control Message-ID: <3ff8504571babfc0acaa74fccd1e12024d33dd11.1774283146.git.dan.carpenter@linaro.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: AKASHI Takahiro Traditionally, firmware will provide a GPIO interface or a pin control interface. However, the SCMI protocol provides a generic pin control interface and the GPIO support is built on top of that using the normal pin control interfaces. Potentially, other firmware will adopt a similar generic approach in the future. Document how to configure the GPIO device. Signed-off-by: AKASHI Takahiro Signed-off-by: Dan Carpenter Reviewed-by: Linus Walleij Reviewed-by: Krzysztof Kozlowski --- v6: Fix the subject. Sorry! Fix typo in my email. Add Krzysztof's reviewed-by tag. v5: Fix subsystem prefix Re-word the commit message I removed all references to the driver. I also removed the reference to pin muxing because that's described in the pin control spec file. Fix 3 vs 4 typo in the example. v4: Changed additionalProperties: true to false. Add gpio-line-names. Deleted one example. Add r-b tags v3: Forward port and update .../bindings/gpio/pin-control-gpio.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/pin-control-gpio= .yaml diff --git a/Documentation/devicetree/bindings/gpio/pin-control-gpio.yaml b= /Documentation/devicetree/bindings/gpio/pin-control-gpio.yaml new file mode 100644 index 000000000000..a05cd339253a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/pin-control-gpio.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/pin-control-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Pin control based generic GPIO controller + +description: + The pin control-based GPIO will facilitate a pin controller's ability + to drive electric lines high/low and other generic properties of a + pin controller to perform general-purpose one-bit binary I/O. + +maintainers: + - Dan Carpenter + +properties: + compatible: + const: scmi-pinctrl-gpio + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-names: true + + gpio-ranges: true + + ngpios: true + +patternProperties: + "^.+-hog(-[0-9]+)?$": + type: object + + required: + - gpio-hog + +required: + - compatible + - gpio-controller + - "#gpio-cells" + - gpio-ranges + - ngpios + +additionalProperties: false + +examples: + - | + gpio { + compatible =3D "scmi-pinctrl-gpio"; + gpio-controller; + #gpio-cells =3D <2>; + ngpios =3D <4>; + gpio-line-names =3D "gpio_5_17", "gpio_5_20", "gpio_5_22", "gpio_2= _1"; + gpio-ranges =3D <&scmi_pinctrl 0 30 4>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&keys_pins>; + }; --=20 2.53.0