From nobody Tue Dec 16 19:54:59 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B6C7BC71145 for ; Thu, 24 Aug 2023 06:41:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240060AbjHXGlU (ORCPT ); Thu, 24 Aug 2023 02:41:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58366 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240163AbjHXGkv (ORCPT ); Thu, 24 Aug 2023 02:40:51 -0400 Received: from jari.cn (unknown [218.92.28.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id A9579170E for ; Wed, 23 Aug 2023 23:40:39 -0700 (PDT) Received: from chenxuebing$jari.cn ( [125.70.163.142] ) by ajax-webmail-localhost.localdomain (Coremail) ; Thu, 24 Aug 2023 14:40:11 +0800 (GMT+08:00) X-Originating-IP: [125.70.163.142] Date: Thu, 24 Aug 2023 14:40:11 +0800 (GMT+08:00) X-CM-HeaderCharset: UTF-8 From: "XueBing Chen" To: alexander.deucher@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/amdgpu/gfx11: Clean up errors in gfx_v11_0.c X-Priority: 3 X-Mailer: Coremail Webmail Server Version 2023.1-cmXT6 build 20230419(ff23bf83) Copyright (c) 2002-2023 www.mailtech.cn mispb-4e503810-ca60-4ec8-a188-7102c18937cf-zhkzyfz.cn Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Message-ID: <3eb2c036.637.18a26459ea0.Coremail.chenxuebing@jari.cn> X-Coremail-Locale: zh_CN X-CM-TRANSID: AQAAfwDnhD9M++ZkwCuSAA--.456W X-CM-SenderInfo: hfkh05pxhex0nj6mt2flof0/1tbiAQAMCmTl1A4ABAADsb X-Coremail-Antispam: 1Ur529EdanIXcx71UUUUU7IcSsGvfJ3iIAIbVAYjsxI4VWxJw CS07vEb4IE77IF4wCS07vE1I0E4x80FVAKz4kxMIAIbVAFxVCaYxvI4VCIwcAKzIAtYxBI daVFxhVjvjDU= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fix the following errors reported by checkpatch: ERROR: that open brace { should be on the previous line ERROR: spaces required around that '=3D=3D' (ctx:VxV) ERROR: space prohibited before that close parenthesis ')' ERROR: "foo * bar" should be "foo *bar" ERROR: space required before the open parenthesis '(' Signed-off-by: XueBing Chen --- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/a= mdgpu/gfx_v11_0.c index 5c3db694afa8..6708d3852fe7 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c @@ -83,8 +83,7 @@ MODULE_FIRMWARE("amdgpu/gc_11_0_4_me.bin"); MODULE_FIRMWARE("amdgpu/gc_11_0_4_mec.bin"); MODULE_FIRMWARE("amdgpu/gc_11_0_4_rlc.bin"); =20 -static const struct soc15_reg_golden golden_settings_gc_11_0_1[] =3D -{ +static const struct soc15_reg_golden golden_settings_gc_11_0_1[] =3D { SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_GS_NGG_CLK_CTRL, 0x9fff8fff, 0x0000= 0010), SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_WD_CLK_CTRL, 0xffff8fff, 0x00000010= ), SOC15_REG_GOLDEN_VALUE(GC, 0, regCPF_GCR_CNTL, 0x0007ffff, 0x0000c200), @@ -1230,7 +1229,7 @@ static void gfx_v11_0_rlc_backdoor_autoload_copy_mes_= ucode(struct amdgpu_device int pipe, ucode_id, data_id; =20 for (pipe =3D 0; pipe < 2; pipe++) { - if (pipe=3D=3D0) { + if (pipe =3D=3D 0) { ucode_id =3D SOC21_FIRMWARE_ID_RS64_MES_P0; data_id =3D SOC21_FIRMWARE_ID_RS64_MES_P0_STACK; } else { @@ -2324,7 +2323,7 @@ static int gfx_v11_0_config_me_cache_rs64(struct amdg= pu_device *adev, uint64_t a soc21_grbm_select(adev, 0, pipe_id, 0, 0); WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, (me_hdr->ucode_start_addr_hi << 30) | - (me_hdr->ucode_start_addr_lo >> 2) ); + (me_hdr->ucode_start_addr_lo >> 2)); WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI, me_hdr->ucode_start_addr_hi>>2); =20 @@ -2508,7 +2507,7 @@ static void gfx_v11_0_config_gfx_rs64(struct amdgpu_d= evice *adev) soc21_grbm_select(adev, 0, pipe_id, 0, 0); WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, (me_hdr->ucode_start_addr_hi << 30) | - (me_hdr->ucode_start_addr_lo >> 2) ); + (me_hdr->ucode_start_addr_lo >> 2)); WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI, me_hdr->ucode_start_addr_hi>>2); } @@ -2806,7 +2805,7 @@ static int gfx_v11_0_cp_gfx_load_pfp_microcode_rs64(s= truct amdgpu_device *adev) soc21_grbm_select(adev, 0, pipe_id, 0, 0); WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START, (pfp_hdr->ucode_start_addr_hi << 30) | - (pfp_hdr->ucode_start_addr_lo >> 2) ); + (pfp_hdr->ucode_start_addr_lo >> 2)); WREG32_SOC15(GC, 0, regCP_PFP_PRGRM_CNTR_START_HI, pfp_hdr->ucode_start_addr_hi>>2); =20 @@ -3025,7 +3024,7 @@ static int gfx_v11_0_cp_gfx_load_me_microcode_rs64(st= ruct amdgpu_device *adev) soc21_grbm_select(adev, 0, pipe_id, 0, 0); WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START, (me_hdr->ucode_start_addr_hi << 30) | - (me_hdr->ucode_start_addr_lo >> 2) ); + (me_hdr->ucode_start_addr_lo >> 2)); WREG32_SOC15(GC, 0, regCP_ME_PRGRM_CNTR_START_HI, me_hdr->ucode_start_addr_hi>>2); =20 @@ -4202,7 +4201,7 @@ static void gfx_v11_0_select_cp_fw_arch(struct amdgpu= _device *adev) msleep(100); } =20 -static int get_gb_addr_config(struct amdgpu_device * adev) +static int get_gb_addr_config(struct amdgpu_device *adev) { u32 gb_addr_config; =20 @@ -4293,7 +4292,7 @@ static int gfx_v11_0_hw_init(void *handle) =20 adev->gfx.is_poweron =3D true; =20 - if(get_gb_addr_config(adev)) + if (get_gb_addr_config(adev)) DRM_WARN("Invalid gb_addr_config !\n"); =20 if (adev->firmware.load_type =3D=3D AMDGPU_FW_LOAD_PSP && --=20 2.17.1