From nobody Wed Dec 17 05:26:47 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D0D6EE49A0 for ; Wed, 23 Aug 2023 09:35:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235504AbjHWJfQ (ORCPT ); Wed, 23 Aug 2023 05:35:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235197AbjHWJdu (ORCPT ); Wed, 23 Aug 2023 05:33:50 -0400 Received: from jari.cn (unknown [218.92.28.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 650EE1FE3 for ; Wed, 23 Aug 2023 02:22:00 -0700 (PDT) Received: from chenxuebing$jari.cn ( [125.70.163.142] ) by ajax-webmail-localhost.localdomain (Coremail) ; Wed, 23 Aug 2023 17:21:34 +0800 (GMT+08:00) X-Originating-IP: [125.70.163.142] Date: Wed, 23 Aug 2023 17:21:34 +0800 (GMT+08:00) X-CM-HeaderCharset: UTF-8 From: "XueBing Chen" To: alexander.deucher@amd.com, airlied@gmail.com, daniel@ffwll.ch Cc: amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: [PATCH] drm/amdgpu: Clean up errors in dce_v6_0.c X-Priority: 3 X-Mailer: Coremail Webmail Server Version 2023.1-cmXT6 build 20230419(ff23bf83) Copyright (c) 2002-2023 www.mailtech.cn mispb-4e503810-ca60-4ec8-a188-7102c18937cf-zhkzyfz.cn Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Message-ID: <3b6c6469.624.18a21b30506.Coremail.chenxuebing@jari.cn> X-Coremail-Locale: zh_CN X-CM-TRANSID: AQAAfwDHZD+fz+VktmiQAA--.473W X-CM-SenderInfo: hfkh05pxhex0nj6mt2flof0/1tbiAQAMCmTkgo0AVAACse X-Coremail-Antispam: 1Ur529EdanIXcx71UUUUU7IcSsGvfJ3iIAIbVAYjsxI4VWxJw CS07vEb4IE77IF4wCS07vE1I0E4x80FVAKz4kxMIAIbVAFxVCaYxvI4VCIwcAKzIAtYxBI daVFxhVjvjDU= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fix the following errors reported by checkpatch: ERROR: space required before the open brace '{' ERROR: that open brace { should be on the previous line Signed-off-by: XueBing Chen --- drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 20 +++++++------------- 1 file changed, 7 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/am= dgpu/dce_v6_0.c index 7f85ba5b726f..a102e3227d75 100644 --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c @@ -56,8 +56,7 @@ static void dce_v6_0_set_display_funcs(struct amdgpu_device *adev); static void dce_v6_0_set_irq_funcs(struct amdgpu_device *adev); =20 -static const u32 crtc_offsets[6] =3D -{ +static const u32 crtc_offsets[6] =3D { SI_CRTC0_REGISTER_OFFSET, SI_CRTC1_REGISTER_OFFSET, SI_CRTC2_REGISTER_OFFSET, @@ -66,8 +65,7 @@ static const u32 crtc_offsets[6] =3D SI_CRTC5_REGISTER_OFFSET }; =20 -static const u32 hpd_offsets[] =3D -{ +static const u32 hpd_offsets[] =3D { mmDC_HPD1_INT_STATUS - mmDC_HPD1_INT_STATUS, mmDC_HPD2_INT_STATUS - mmDC_HPD1_INT_STATUS, mmDC_HPD3_INT_STATUS - mmDC_HPD1_INT_STATUS, @@ -1328,8 +1326,7 @@ static void dce_v6_0_audio_enable(struct amdgpu_devic= e *adev, enable ? AZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL__AUDIO_ENABLED_MA= SK : 0); } =20 -static const u32 pin_offsets[7] =3D -{ +static const u32 pin_offsets[7] =3D { (0x1780 - 0x1780), (0x1786 - 0x1780), (0x178c - 0x1780), @@ -1776,8 +1773,7 @@ static void dce_v6_0_afmt_fini(struct amdgpu_device *= adev) } } =20 -static const u32 vga_control_regs[6] =3D -{ +static const u32 vga_control_regs[6] =3D { mmD1VGA_CONTROL, mmD2VGA_CONTROL, mmD3VGA_CONTROL, @@ -3059,7 +3055,7 @@ static int dce_v6_0_pageflip_irq(struct amdgpu_device= *adev, =20 spin_lock_irqsave(&adev_to_drm(adev)->event_lock, flags); works =3D amdgpu_crtc->pflip_works; - if (amdgpu_crtc->pflip_status !=3D AMDGPU_FLIP_SUBMITTED){ + if (amdgpu_crtc->pflip_status !=3D AMDGPU_FLIP_SUBMITTED) { DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status =3D %d !=3D " "AMDGPU_FLIP_SUBMITTED(%d)\n", amdgpu_crtc->pflip_status, @@ -3465,8 +3461,7 @@ static void dce_v6_0_set_irq_funcs(struct amdgpu_devi= ce *adev) adev->hpd_irq.funcs =3D &dce_v6_0_hpd_irq_funcs; } =20 -const struct amdgpu_ip_block_version dce_v6_0_ip_block =3D -{ +const struct amdgpu_ip_block_version dce_v6_0_ip_block =3D { .type =3D AMD_IP_BLOCK_TYPE_DCE, .major =3D 6, .minor =3D 0, @@ -3474,8 +3469,7 @@ const struct amdgpu_ip_block_version dce_v6_0_ip_bloc= k =3D .funcs =3D &dce_v6_0_ip_funcs, }; =20 -const struct amdgpu_ip_block_version dce_v6_4_ip_block =3D -{ +const struct amdgpu_ip_block_version dce_v6_4_ip_block =3D { .type =3D AMD_IP_BLOCK_TYPE_DCE, .major =3D 6, .minor =3D 4, --=20 2.17.1