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[69.109.179.158]) by smtp.gmail.com with ESMTPSA id v6-20020a05620a440600b006bb87c4833asm8085434qkp.109.2022.09.16.18.16.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Sep 2022 18:16:32 -0700 (PDT) From: William Breathitt Gray To: linux-iio@vger.kernel.org Cc: linux-kernel@vger.kernel.org, mranostay@ti.com, jpanis@baylibre.com, gwendal@chromium.org, bleung@chromium.org, groeck@chromium.org, jic23@kernel.org, david@lechnology.com, robertcnelson@gmail.com, William Breathitt Gray Subject: [PATCH v2 2/4] counter: 104-quad-8: Add Signal polarity component Date: Fri, 16 Sep 2022 20:39:26 -0400 Message-Id: <3611fef702da4255dfd050520c4623134b26ca68.1663372750.git.william.gray@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The 104-quad-8 driver provides support for Index signal polarity modes via the "index_polarity" Signal component. This patch exposes the same functionality through the more standard "polarity" Signal component. Signed-off-by: William Breathitt Gray --- drivers/counter/104-quad-8.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c index 1323edfbe40c..2a9d8259ed4b 100644 --- a/drivers/counter/104-quad-8.c +++ b/drivers/counter/104-quad-8.c @@ -549,6 +549,32 @@ static int quad8_index_polarity_set(struct counter_dev= ice *counter, return 0; } =20 +static int quad8_polarity_read(struct counter_device *counter, + struct counter_signal *signal, + enum counter_signal_polarity *polarity) +{ + int err; + u32 index_polarity; + + err =3D quad8_index_polarity_get(counter, signal, &index_polarity); + if (err) + return err; + + *polarity =3D (index_polarity) ? COUNTER_SIGNAL_POLARITY_POSITIVE : + COUNTER_SIGNAL_POLARITY_NEGATIVE; + + return 0; +} + +static int quad8_polarity_write(struct counter_device *counter, + struct counter_signal *signal, + enum counter_signal_polarity polarity) +{ + const u32 pol =3D (polarity =3D=3D COUNTER_SIGNAL_POLARITY_POSITIVE) ? 1 = : 0; + + return quad8_index_polarity_set(counter, signal, pol); +} + static const char *const quad8_synchronous_modes[] =3D { "non-synchronous", "synchronous" @@ -977,6 +1003,13 @@ static struct counter_comp quad8_signal_ext[] =3D { quad8_signal_fck_prescaler_write) }; =20 +static const enum counter_signal_polarity quad8_polarities[] =3D { + COUNTER_SIGNAL_POLARITY_POSITIVE, + COUNTER_SIGNAL_POLARITY_NEGATIVE, +}; + +static DEFINE_COUNTER_AVAILABLE(quad8_polarity_available, quad8_polarities= ); + static DEFINE_COUNTER_ENUM(quad8_index_pol_enum, quad8_index_polarity_mode= s); static DEFINE_COUNTER_ENUM(quad8_synch_mode_enum, quad8_synchronous_modes); =20 @@ -984,6 +1017,8 @@ static struct counter_comp quad8_index_ext[] =3D { COUNTER_COMP_SIGNAL_ENUM("index_polarity", quad8_index_polarity_get, quad8_index_polarity_set, quad8_index_pol_enum), + COUNTER_COMP_POLARITY(quad8_polarity_read, quad8_polarity_write, + quad8_polarity_available), COUNTER_COMP_SIGNAL_ENUM("synchronous_mode", quad8_synchronous_mode_get, quad8_synchronous_mode_set, quad8_synch_mode_enum), --=20 2.37.3