From nobody Mon Dec 1 21:30:53 2025 Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 983ED3164BC for ; Mon, 1 Dec 2025 13:08:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.44 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764594516; cv=none; b=eSsD7iwK4tqNMOQhaUPM/TDCtCf3v1d5NoL/uCXxthYz6h49LQuKnyJt9naWlH+GeHZQz2Z9dTl/PX6rt+EgkWdJnNXilyOcLn7A+Hdh0ke2fLOgVPeE4Zf/0uRDYrv3B0lVVf0hDJVWSXaXiaWqhoEpN7Xvi9zQ0bjJqc9ZrOA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1764594516; c=relaxed/simple; bh=fpoMCPM6b99hlqdxHuAXGa/Gc6L+yO7qXJ0Q8HsZ2Bc=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=lHw4nVvaGwxv0eDMTn0Y4sjRV0FOL+TIOTmzSRe9iheIg3Fz7iwKluFEmlfmAhGrkMOG6g3B1X6htPqRJSLjXJW8wJZo2ptsHH59BVeJAPvPbrbfexGeuJo09lRR0ic8gaDyiauW1ac5jHNJtdHw8wET4im+vMbkoK3w8z3x/eI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ppKiRlFk; arc=none smtp.client-ip=209.85.208.44 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ppKiRlFk" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-640aa1445c3so6363056a12.1 for ; Mon, 01 Dec 2025 05:08:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1764594513; x=1765199313; darn=vger.kernel.org; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=OCTeXPXZO+F17n9SXaYhV2tI13Zm/DFXV78xcr1sLqg=; b=ppKiRlFkie7iZnk7jKU5Ry+dPEl9s+MJqZ2oT9FSkauY06tfkLDoNKo/pArL86iv5u 4Z3MCZJqtLki55CUh6vUzE1n1cd0oal5nxiFtvZ5UgLM+oT7JEeOLM0zBR7MnII6XQh9 ZPZgWuCOnfzHWcvtFKG7F1d1xd1jyBWwtTPlscPP/u59q+OSp5onY8L/MiP9owmW31r1 OsZiy9R3DLbF0Ccde8V8xFwAbKcSwqy0bnR775Az7x+kBZfRTjTdF1/cUhmmstPJi5Va qYEqA92xucCAEL1chd47eRd4fXXsj/TaE+TmdaczWy29SEhEkwq+WbfDXQ32IsEN4GO1 ShCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1764594513; x=1765199313; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-gg:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=OCTeXPXZO+F17n9SXaYhV2tI13Zm/DFXV78xcr1sLqg=; b=TK38RlG9Lc2SmsrST7Fbpuml/Mmw85GH1Ld3LE+WDRzQGn2PFYVNQtn1mYnOqXQvjQ F1kNJopCgnTQYZJl1Yfx6viZaiTUROreTU2rSkhmYtB1cbX7UGmaI5wwW0qk9+eSBkBQ EzC68lJQWMyJBGKadKnNv6vm7K7qpjZWwa+Y/9hGiMpkNPepgenXYfNKnvhpnsQ2WKce EKRfnQHQ/tvCfWeHbqlvFJsx22NfKIzvT+oVet3AXdxtIIdv3m/LCVy6ICdwp2s+9Gbp GErLp7KeUA8D4xWnclitQNpB3nub67ov1BWpXqYbiI4/wKTUSXQ4unfAmwbW/qCrYJEP 0Urg== X-Forwarded-Encrypted: i=1; AJvYcCXquKsu1MTV448Jmr6Oq9XZgnAnDoLn6eBnN+RnCgONWdnMo1UDgqqiRL2qjHzosMtr3RiShQsBfp4bczY=@vger.kernel.org X-Gm-Message-State: AOJu0YyC1k4cFgX1Htx1qUHIAkQVCl8a/qPwBRDlg0umKpRAErzkMfLR gtr1fXPKmjq/ZNJG5k6OJ8HE+8kx2g8/7LEexsDFqrmGRHNwv3uDltNw1R7iGdFeMAg= X-Gm-Gg: ASbGnctGhWnODoG/8gIBdEUf+kN4GPOOJGBu6p168SFoJiulF+b1mnyQZxHq2wf4bPe 87gzBb41CFOvlQn+GrM69cgd9vgTKQXqKBhMjzREvGdpzwHJOt77ctprYIKJ6li0GspbOvGvW9K qWX55jUo52T34SWDKawa8Hq3ql+6QIRXhxJ9HLG7tvqkeJRMKrtg5RO9wn7+pcrlcWCenrh7Agf lTUDT/O6EMoZ4u/eoeizN8irQFmaeYrGZNmhz83Yaosb1tqWAhpZfHXxA/DMgDcokyPoL622r5D Vjd+hogQxDwUc0ci6otCRc9hCOqy4gjuHHGvIpDdsSpfgAGI0JT5AjZzk9jrj8ufrPb2o4tLeSb OdZrjqwFoGUUh0d7su/rsrr43ybfipM2d9sENPqtz3wF72pybduxt7hoEHdb+2mCBpj5EEiz1X6 MDXFzw5C/KXuZRCFii X-Google-Smtp-Source: AGHT+IFYjAEeAOVLw6O1zYISJnzOM69zMOO3y7jHxsacQ7S3VSgvzSDD6yuBCTx3SQ5WQ0BwqnDQHQ== X-Received: by 2002:a17:906:43c9:b0:b76:8164:88b5 with SMTP id a640c23a62f3a-b76816498ebmr2708166066b.46.1764594512107; Mon, 01 Dec 2025 05:08:32 -0800 (PST) Received: from localhost ([196.207.164.177]) by smtp.gmail.com with UTF8SMTPSA id a640c23a62f3a-b76f51c8393sm1220243266b.31.2025.12.01.05.08.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 Dec 2025 05:08:31 -0800 (PST) Date: Mon, 1 Dec 2025 16:08:28 +0300 From: Dan Carpenter To: Jan Petrous Cc: s32@nxp.com, Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linaro-s32@linaro.org Subject: [PATCH 3/4] dt-bindings: net: nxp,s32-dwmac: Use the GPR syscon Message-ID: <333487ea3d23699c7953524cda082813ac4d7be3.1764592300.git.dan.carpenter@linaro.org> References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The S32 chipset has a GPR region which has a miscellaneous registers including the GMAC_0_CTRL_STS register. Originally this code accessed that register in a sort of ad-hoc way, but we want to access it using the syscon interface. We still need to maintain the old method of accessing the GMAC register but using a syscon will let us access other registers more cleanly. Signed-off-by: Dan Carpenter --- Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Doc= umentation/devicetree/bindings/net/nxp,s32-dwmac.yaml index 2b8b74c5feec..17f6c50dca03 100644 --- a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml @@ -32,6 +32,11 @@ properties: - description: Main GMAC registers - description: GMAC PHY mode control register =20 + phy-sel: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - description: The offset into the s32 GPR syscon + interrupts: maxItems: 1 =20 @@ -74,6 +79,7 @@ examples: compatible =3D "nxp,s32g2-dwmac"; reg =3D <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */ <0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */ + phy-sel =3D <&gpr 0x4>; interrupt-parent =3D <&gic>; interrupts =3D ; interrupt-names =3D "macirq"; --=20 2.51.0