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Wed, 9 Oct 2024 09:38:50 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , , , , , , , Subject: [PATCH v3 09/11] iommufd/selftest: Add IOMMU_VIOMMU_ALLOC test coverage Date: Wed, 9 Oct 2024 09:38:09 -0700 Message-ID: <320e7f6a93f50d00d7273ad8a2f06be928a6ed35.1728491453.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099DB:EE_|DM4PR12MB6495:EE_ X-MS-Office365-Filtering-Correlation-Id: f3365d40-c49d-457b-eb2f-08dce880e092 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|1800799024|7416014|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?K4sbhf/XLftZgX6m0zVo4RbnLQpzLt53XA4tCS8+B6lbelGB4kEHzUZtQ4Rd?= =?us-ascii?Q?jjybEJZW9KD3iSsL/qOW6Uh+fAmSBc6CpZUCvFgwwfCPuPZ3b2tp6SwONFyJ?= =?us-ascii?Q?zDymKFeEfK/JuPOdmG+KN2GTdIDKHRVjKmA9HR0oWmljSiTlBW32gtTRM/l/?= =?us-ascii?Q?ClYf22iRPmPL9F2igC5raDjETqR+3NG58tWbZ4rJ7bKuNiGIkvZCaZYWs8VM?= =?us-ascii?Q?c7+T2Odt2JdILjSj+oMqSF53WSEL/hZVWPdPCORIeP9Cw09UkPjG0raplK3q?= =?us-ascii?Q?wNNqSJESengEc28VGpC9SUyu9ZI38Qa7kKthLtubVIhKTlLULy8kGbANQZlS?= =?us-ascii?Q?gf8nfMYPrBqjBEp+O8gNcam/pZAZ3IdwMRWL6vac/nkQA0HaSXbvLfY1YJnJ?= =?us-ascii?Q?20Q9h+Q9tRzBTa6vMoeNgsmarpqWjd7Z5YOP5Ehyxow1HYOHjYLRe4JxNihy?= =?us-ascii?Q?PkcgS6L/p+OdjM6XrK+JCga1gnsQGQWQDcqfS6XY7UZZwuuZO5mMnrLcPeb6?= =?us-ascii?Q?8u7q6bb6JbF9fB+AcZab+9BlPLdFfpCTyEvdcmWuw0d9hVb4wIej+vWvw1r8?= =?us-ascii?Q?cm/vO8ZcfjPHPObTXUDS/vZZ/1Y57Mke2Ins8VYT1exAcYCneb4jR53IXtjc?= =?us-ascii?Q?3OseW026avAjKi7vNGJV7tRdQXxRzyaAdAKXa5eYzy+4FY4zBGKYrEYPIFaB?= =?us-ascii?Q?jLNQktbYizi+GVWsxpwgBe8ORZ1K5kPq0m7PiRcgNfWX/uaKBQwUT0xTqDYj?= =?us-ascii?Q?JG9qszlXo3nnO3pU2riGvFv1ZgsTAD/Ghy5+4O+dQs7QUhVaD5jBMYLeowwW?= =?us-ascii?Q?k5afQnpDVRB5NAZzEwZZ44UAvtSQ5KG71H/lwrNJ8emELy8aqn2LMHcRlhnN?= =?us-ascii?Q?eEy+Vs4FQvNhI35dcECkO2k3K8/3DYeN+D4EDgMnADlGOdf6L3KmRtEgcjGW?= =?us-ascii?Q?xsrcIp6APjZcVu5YATT3KjdXRORJ6ENq/rxEvzH9Ly4mXI+56fCLsQQ+RF90?= =?us-ascii?Q?wxGLSO1XgWFy0uTq62e90Vu8YbmxmTjDJgWj6nD881cQ6E2TA47z43Z/rjKL?= =?us-ascii?Q?SwCd7yRkfGLnOtbXnaVQ19WNQUagqhNTfgpBvbKr+tbz+pbm2IlUnOACXNR0?= =?us-ascii?Q?S7djEdWRELM3dYkRSCqkENgPg2x/+g2Baw17TkziU48UhsLMTLSDLbhDw9jP?= =?us-ascii?Q?rMHx1+KZXTuiftcmJaR54ORfC45TLh+wvQBUvBVf8uBse19kLMtvLmj1Ro5I?= =?us-ascii?Q?YaF+NN3jpxmPP1B3BHd9hUKNq5WMb01o948a7yNS0S8BPdaIPanwPoEl9tzn?= =?us-ascii?Q?oxf7Tcb6Fp1gD24JLIqZd9BizzoBSVGvul44u2tKjhpL+qCx77IUlMDg97MQ?= =?us-ascii?Q?v3pFR2oQBBaTCWjqLQp2VDNBYih6?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(36860700013)(1800799024)(7416014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Oct 2024 16:38:59.9544 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f3365d40-c49d-457b-eb2f-08dce880e092 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099DB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6495 Content-Type: text/plain; charset="utf-8" Add a new iommufd_viommu FIXTURE and setup it up with a vIOMMU object. Any new vIOMMU feature will be added as a TEST_F under that. Signed-off-by: Nicolin Chen --- tools/testing/selftests/iommu/iommufd_utils.h | 28 +++++++ tools/testing/selftests/iommu/iommufd.c | 84 +++++++++++++++++++ 2 files changed, 112 insertions(+) diff --git a/tools/testing/selftests/iommu/iommufd_utils.h b/tools/testing/= selftests/iommu/iommufd_utils.h index 40f6f14ce136..307d097db9dd 100644 --- a/tools/testing/selftests/iommu/iommufd_utils.h +++ b/tools/testing/selftests/iommu/iommufd_utils.h @@ -762,3 +762,31 @@ static int _test_cmd_trigger_iopf(int fd, __u32 device= _id, __u32 fault_fd) =20 #define test_cmd_trigger_iopf(device_id, fault_fd) \ ASSERT_EQ(0, _test_cmd_trigger_iopf(self->fd, device_id, fault_fd)) + +static int _test_cmd_viommu_alloc(int fd, __u32 device_id, __u32 hwpt_id, + __u32 type, __u32 flags, __u32 *viommu_id) +{ + struct iommu_viommu_alloc cmd =3D { + .size =3D sizeof(cmd), + .flags =3D flags, + .type =3D type, + .dev_id =3D device_id, + .hwpt_id =3D hwpt_id, + }; + int ret; + + ret =3D ioctl(fd, IOMMU_VIOMMU_ALLOC, &cmd); + if (ret) + return ret; + if (viommu_id) + *viommu_id =3D cmd.out_viommu_id; + return 0; +} + +#define test_cmd_viommu_alloc(device_id, hwpt_id, type, viommu_id) \ + ASSERT_EQ(0, _test_cmd_viommu_alloc(self->fd, device_id, hwpt_id, \ + type, 0, viommu_id)) +#define test_err_viommu_alloc(_errno, device_id, hwpt_id, type, viommu_id)= \ + EXPECT_ERRNO(_errno, _test_cmd_viommu_alloc(self->fd, device_id, \ + hwpt_id, type, 0, \ + viommu_id)) diff --git a/tools/testing/selftests/iommu/iommufd.c b/tools/testing/selfte= sts/iommu/iommufd.c index 4927b9add5ad..c03705825576 100644 --- a/tools/testing/selftests/iommu/iommufd.c +++ b/tools/testing/selftests/iommu/iommufd.c @@ -128,6 +128,7 @@ TEST_F(iommufd, cmd_length) TEST_LENGTH(iommu_ioas_unmap, IOMMU_IOAS_UNMAP, length); TEST_LENGTH(iommu_option, IOMMU_OPTION, val64); TEST_LENGTH(iommu_vfio_ioas, IOMMU_VFIO_IOAS, __reserved); + TEST_LENGTH(iommu_viommu_alloc, IOMMU_VIOMMU_ALLOC, out_viommu_id); #undef TEST_LENGTH } =20 @@ -2386,4 +2387,87 @@ TEST_F(vfio_compat_mock_domain, huge_map) } } =20 +FIXTURE(iommufd_viommu) +{ + int fd; + uint32_t ioas_id; + uint32_t stdev_id; + uint32_t hwpt_id; + uint32_t device_id; + uint32_t viommu_id; +}; + +FIXTURE_VARIANT(iommufd_viommu) +{ + unsigned int viommu; + unsigned int viommu_type; +}; + +FIXTURE_SETUP(iommufd_viommu) +{ + self->fd =3D open("/dev/iommu", O_RDWR); + ASSERT_NE(-1, self->fd); + test_ioctl_ioas_alloc(&self->ioas_id); + test_ioctl_set_default_memory_limit(); + + if (variant->viommu) { + test_cmd_mock_domain(self->ioas_id, &self->stdev_id, NULL, + &self->device_id); + + /* Negative test -- invalid hwpt */ + test_err_viommu_alloc(ENOENT, self->device_id, self->hwpt_id, + variant->viommu_type, &self->viommu_id); + + /* Negative test -- not a nesting parent hwpt */ + test_cmd_hwpt_alloc(self->device_id, self->ioas_id, 0, + &self->hwpt_id); + test_err_viommu_alloc(EINVAL, self->device_id, self->hwpt_id, + variant->viommu_type, &self->viommu_id); + test_ioctl_destroy(self->hwpt_id); + + /* Allocate a nesting parent HWP */ + test_cmd_hwpt_alloc(self->device_id, self->ioas_id, + IOMMU_HWPT_ALLOC_NEST_PARENT, + &self->hwpt_id); + /* Negative test -- unsupported viommu type */ + test_err_viommu_alloc(EOPNOTSUPP, self->device_id, + self->hwpt_id, 0xdead, &self->viommu_id); + /* Allocate a default type of viommu */ + test_cmd_viommu_alloc(self->device_id, self->hwpt_id, + variant->viommu_type, &self->viommu_id); + } else { + test_err_viommu_alloc(ENOENT, self->device_id, self->hwpt_id, + variant->viommu_type, &self->viommu_id); + } +} + +FIXTURE_TEARDOWN(iommufd_viommu) +{ + if (variant->viommu) { + test_ioctl_destroy(self->viommu_id); + test_ioctl_destroy(self->hwpt_id); + } + teardown_iommufd(self->fd, _metadata); +} + +FIXTURE_VARIANT_ADD(iommufd_viommu, no_viommu) +{ +}; + +FIXTURE_VARIANT_ADD(iommufd_viommu, viommu_default) +{ + .viommu =3D 1, + .viommu_type =3D IOMMU_VIOMMU_TYPE_DEFAULT, +}; + +FIXTURE_VARIANT_ADD(iommufd_viommu, mock_viommu) +{ + .viommu =3D 1, + .viommu_type =3D IOMMU_VIOMMU_TYPE_SELFTEST, +}; + +TEST_F(iommufd_viommu, viommu_auto_destroy) +{ +} + TEST_HARNESS_MAIN --=20 2.43.0