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Mon, 20 Oct 2025 15:15:03 -0400 From: Marcelo Schmitt To: , , , CC: , , , , , , , , , , , Conor Dooley Subject: [PATCH v6 6/8] dt-bindings: iio: adc: adi,ad4030: Add ADAQ4216 and ADAQ4224 Date: Mon, 20 Oct 2025 16:15:00 -0300 Message-ID: <318c31e023ebe30cc99b8743e87e869bf5e1f12b.1760984107.git.marcelo.schmitt@analog.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDA2MiBTYWx0ZWRfXy1adIwm3rnLM VlhimiO+Xb/2aHipwlOKW1AlX0cnYCplkhzgbQaSzbv5jHw3y4m12mmnOKVG2sSYlAKnziT627N t9SxvoXjmQVt8ozdWCNU5Wvr+h1krgnH6hKpV1U2ADsDzOtYWDYpBLL4569XDUna0/bZjAnc1va ZH6L0JwmKO8VkQvOrnkVvIjCGYEFgDC8M7bEfU52WirEyNhCHluPf7hJJFv7NhjudM2qfGWiecx ZY6q9aOV1XBWg6ivoHI1rsI+j8EU4Iw7N6a3X052yrx75Z7fZgKNnLizoM/Ul/nWe0cdGsg3KzR V45uQYIO6vWvW7SU1lFPQJHlsPzjCob6K/KX1JyA/a4y4EQ8uUGsM7BQZIOwFlRz+BcGDZle9Cj 4oAR2PRUKZm9pbtdTQlU4xJDCj9RYw== X-Authority-Analysis: v=2.4 cv=UPPQ3Sfy c=1 sm=1 tr=0 ts=68f68a43 cx=c_pps a=PpDZqlmH/M8setHirZLBMw==:117 a=PpDZqlmH/M8setHirZLBMw==:17 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=gAnH3GRIAAAA:8 a=XYAwZIGsAAAA:8 a=0GKIfBuVSP7uAb9je7gA:9 a=E8ToXWR_bxluHZ7gmE-Z:22 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-ORIG-GUID: _q9pisNjObONs5H_d14EUG0fY9YdwsfO X-Proofpoint-GUID: _q9pisNjObONs5H_d14EUG0fY9YdwsfO X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-20_05,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 spamscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 impostorscore=0 clxscore=1015 phishscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180062 Content-Type: text/plain; charset="utf-8" ADAQ4216 and ADAQ4224 are similar to AD4030 except that ADAQ devices have a PGA (programmable gain amplifier) that scales the input signal prior to it reaching the ADC inputs. The PGA is controlled through a couple of pins (A0 and A1) that set one of four possible signal gain configurations. Reviewed-by: Conor Dooley Signed-off-by: Marcelo Schmitt --- Change log v5 -> v6 - Picked up Conor's review tag. .../bindings/iio/adc/adi,ad4030.yaml | 70 +++++++++++++++++-- 1 file changed, 65 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml b/Do= cumentation/devicetree/bindings/iio/adc/adi,ad4030.yaml index 564b6f67a96e..3890cd4ba93e 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml @@ -19,6 +19,8 @@ description: | * https://www.analog.com/media/en/technical-documentation/data-sheets/ad= 4030-24-4032-24.pdf * https://www.analog.com/media/en/technical-documentation/data-sheets/ad= 4630-24_ad4632-24.pdf * https://www.analog.com/media/en/technical-documentation/data-sheets/ad= 4630-16-4632-16.pdf + * https://www.analog.com/media/en/technical-documentation/data-sheets/ad= aq4216.pdf + * https://www.analog.com/media/en/technical-documentation/data-sheets/ad= aq4224.pdf =20 $ref: /schemas/spi/spi-peripheral-props.yaml# =20 @@ -31,6 +33,8 @@ properties: - adi,ad4630-24 - adi,ad4632-16 - adi,ad4632-24 + - adi,adaq4216 + - adi,adaq4224 =20 reg: maxItems: 1 @@ -54,6 +58,14 @@ properties: description: Internal buffered Reference. Used when ref-supply is not connected. =20 + vddh-supply: + description: + PGIA Positive Power Supply. + + vdd-fda-supply: + description: + FDA Positive Power Supply. + cnv-gpios: description: The Convert Input (CNV). It initiates the sampling conversions. @@ -64,6 +76,13 @@ properties: The Reset Input (/RST). Used for asynchronous device reset. maxItems: 1 =20 + pga-gpios: + description: + A0 and A1 pins for gain selection. For devices that have PGA configu= ration + input pins, pga-gpios should be defined. + minItems: 2 + maxItems: 2 + pwms: description: PWM signal connected to the CNV pin. maxItems: 1 @@ -86,11 +105,29 @@ required: - vio-supply - cnv-gpios =20 -oneOf: - - required: - - ref-supply - - required: - - refin-supply +allOf: + - oneOf: + - required: + - ref-supply + - required: + - refin-supply + # ADAQ devices require a gain property to indicate how hardware PGA is s= et + - if: + properties: + compatible: + contains: + pattern: ^adi,adaq + then: + required: + - vddh-supply + - vdd-fda-supply + - pga-gpios + properties: + ref-supply: false + else: + properties: + pga-gpios: false + =20 unevaluatedProperties: false =20 @@ -114,3 +151,26 @@ examples: reset-gpios =3D <&gpio0 1 GPIO_ACTIVE_LOW>; }; }; + - | + #include + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + adc@0 { + compatible =3D "adi,adaq4216"; + reg =3D <0>; + spi-max-frequency =3D <80000000>; + vdd-5v-supply =3D <&supply_5V>; + vdd-1v8-supply =3D <&supply_1_8V>; + vio-supply =3D <&supply_1_8V>; + refin-supply =3D <&refin_sup>; + vddh-supply =3D <&vddh>; + vdd-fda-supply =3D <&vdd_fda>; + cnv-gpios =3D <&gpio0 0 GPIO_ACTIVE_HIGH>; + reset-gpios =3D <&gpio0 1 GPIO_ACTIVE_LOW>; + pga-gpios =3D <&gpio0 2 GPIO_ACTIVE_HIGH>, + <&gpio0 3 GPIO_ACTIVE_HIGH>; + }; + }; +... --=20 2.39.2