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Nikolaus Schaller" To: Paul Cercueil , Andi Shyti Cc: linux-mips@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, letux-kernel@openphoenux.org, "H. Nikolaus Schaller" , stable@vger.kernel.org Subject: [PATCH v2] i2c: jz4780: Cache host clock rate at probe to prevent CCF prepare_lock deadlock Date: Sun, 19 Jul 2026 22:19:43 +0200 Message-ID: <2db6fd233aceb7238474e4833f4d25ca681c3ffb.1784492382.git.hns@goldelico.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Fix a severe AB/BA deadlock between the Common Clock Framework (CCF) and the I2C adapter lock, which triggers when an I2C-controlled clock generator client (like the Si5351) is registered or modified under the CCF. During an i2c client clock (generator) frequency change, the CCF acquires i= ts global 'prepare_lock' mutex and the driver calls i2c_transfer() to update the clie= nt's chip registers, stalling for the adapter's I2C bus lock. Concurrently, an independent, parallel transfer on the same bus (e.g., a GP= IO expander handling LEDs) can hold the I2C adapter lock. Inside this parallel transfer path, jz4780_i2c_set_speed() calls clk_get_rate() on the host controller's input clock to calculate bus timings. This call attempts to ac= quire the blocked CCF 'prepare_lock', creating a circular dependency that freezes the system. The jz4780 host controller clock itself is static and never changes at runt= ime. However, calling clk_get_rate() inside the active transfer path introduces an unnecessary dependency on the CCF internal locks. Eliminate this synchronous clk_get_rate() call from the active transfer path by caching the static host peripheral clock rate once - inside the pri= vate jz4780_i2c structure during jz4780_i2c_probe(). Update jz4780_i2c_set_speed= () to use this cached value, safely decoupling active I2C transactions from the CCF internal locks without any risk of stale timings. Assisted-by web based Google AI (pinpointing the bug and writing the messag= e). Fixes: ba92222ed63a12 ("i2c: jz4780: Add i2c bus controller driver for Inge= nic JZ4780") Cc: stable@vger.kernel.org Signed-off-by: H. Nikolaus Schaller --- drivers/i2c/busses/i2c-jz4780.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-jz4780.c b/drivers/i2c/busses/i2c-jz478= 0.c index 664a5471d93357..695be3b2146085 100644 --- a/drivers/i2c/busses/i2c-jz4780.c +++ b/drivers/i2c/busses/i2c-jz4780.c @@ -141,6 +141,7 @@ struct jz4780_i2c { void __iomem *iomem; int irq; struct clk *clk; + unsigned long clk_rate_khz; struct i2c_adapter adap; const struct ingenic_i2c_config *cdata; =20 @@ -246,7 +247,7 @@ static int jz4780_i2c_set_target(struct jz4780_i2c *i2c= , unsigned char address) =20 static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c) { - int dev_clk_khz =3D clk_get_rate(i2c->clk) / 1000; + int dev_clk_khz =3D i2c->clk_rate_khz; int cnt_high =3D 0; /* HIGH period count of the SCL clock */ int cnt_low =3D 0; /* LOW period count of the SCL clock */ int cnt_period =3D 0; /* period count of the SCL clock */ @@ -796,6 +797,8 @@ static int jz4780_i2c_probe(struct platform_device *pde= v) if (IS_ERR(i2c->clk)) return PTR_ERR(i2c->clk); =20 + i2c->clk_rate_khz =3D clk_get_rate(i2c->clk) / 1000; + ret =3D of_property_read_u32(pdev->dev.of_node, "clock-frequency", &clk_freq); if (ret) { --=20 2.55.0