From nobody Mon Nov 25 06:46:40 2024 Received: from mail-pf1-f169.google.com (mail-pf1-f169.google.com [209.85.210.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68D0E1D0DF2; Wed, 30 Oct 2024 05:36:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730266613; cv=none; b=bbL7X0ctm6vQEMZYLx7/rLheNfwQogzQ2kbMIDVXxNTI5OlMKxZso9aqk4Bv9Wf9hYTsRhUbDoERwakARXgfRo8zbpxR2DeQ3vPBvjmAprruktpdWxhig1y1fA/AH0vwMbNbKMvNmHXwIba2gfVjV2gKUMgqYiJXnY7Jifo1c5o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730266613; c=relaxed/simple; bh=BuUgnL7h54rr2A/6ZDugxxWbzzOBYluHx6W8EmCTMgM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=F97qf7ohmY7/4JTQFsfoTumH1NdgpaXQoivyMsski4PYvpDaN9OrOMdn/2tmDvg00o/h+ZSpIB+0tQT9ImH3nR0EpegHC+qAooAxdYjL72HGQWXR5/07Xs8JBIxoUWMdp0uGKcRA/T/pKF1nZYyITXqhDty9BGU4knea1fIZans= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=QSp2feUX; arc=none smtp.client-ip=209.85.210.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QSp2feUX" Received: by mail-pf1-f169.google.com with SMTP id d2e1a72fcca58-71e625b00bcso4635309b3a.3; Tue, 29 Oct 2024 22:36:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730266610; x=1730871410; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ikOu3ozG9IaIbT4Vvh+Yk7rtkItRuerAPcX78kzIHYo=; b=QSp2feUXxqClvcegERLasGH4zVACbdoABROh7JzPzxOAsYaYTbg3kWvOGHOOKaYtR9 HioPZhXZOw6qDngLxz03oQ6QkfC93darcDk5Jg9tteyZKNT2R4jqiXqQMFblLDTtLAZJ /b0mxndGILBE9V06tY9MNUJomXQjXjBvSsmFU1S3d4wcK6+7CWCnEX7qDW9CSDnt/02y C3xoyueFpCqAITQAT1ZBePXK3jLd/q4VZGaZFyYqDhhrNeSrDL8sRODaE35xyUeypnPx z9q0TsYMoss0GenNjQBupjtoHSjQ2UnZXPWePvsBjVmpY+cvFnKJez7dD7IhFgf1DPzw L7/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730266610; x=1730871410; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ikOu3ozG9IaIbT4Vvh+Yk7rtkItRuerAPcX78kzIHYo=; b=RgUQeNMkgpysCbhJRULoATIGtQ98yfgiWJ5+Pga+sKWyPI8j8hACzl69NbSSzIZgsj rBRgr/yqDHX8xo62G+o7QOCW/yagSQX1fiEW2GxVzGFL4xfg2EW1CUR/reWsIPtplpeE ITYIzL801/VEQlvqnXLVtmQ9x6ImBe+PhxUWj+/c/RomNNYHttXb8qDcDzDhrKm3K0Ih MHmGzh1Hcvnlinp5kP9R1b6AfkPNVmTkwUfcVUL72245f6lVzZg3+8nUt7Uvr6+5146v kut/3cPeIHYKxtZYBNpEs3+Pwtq5i8FcLynDOWeL9ma5dnn8A4Kf8Ubqkw7R6IaB5Ke0 zelQ== X-Forwarded-Encrypted: i=1; AJvYcCXF0LZVrVb0ASWhLlK2n9/f93nezRphJky0+cclcnY1F+CrG/mQIp5rVxxruCtStURM5USSJle/Lanyp2g=@vger.kernel.org X-Gm-Message-State: AOJu0Yzdvr0lnZ9J6CXkTUINWSZ0g4GEUJlIR0MBGIuJ2TFWfXICM2h9 M6O7vJBcBoq8amGQ8O/3ROygNk3lXXQW4qltD3Rk1i9e89sHy/UJ3LQP7g== X-Google-Smtp-Source: AGHT+IHD80oWTlxF4Q/5xsssLYxIBlstNYTuTkFssYy3xHg7FKrFaI5iVLfO9IKHJfZ5p7i6gzDlZA== X-Received: by 2002:a05:6a00:1a88:b0:71e:8023:c718 with SMTP id d2e1a72fcca58-72062fb828bmr20719687b3a.8.1730266610068; Tue, 29 Oct 2024 22:36:50 -0700 (PDT) Received: from localhost.localdomain ([129.146.253.192]) by smtp.googlemail.com with ESMTPSA id 41be03b00d2f7-7edc8661098sm8516595a12.8.2024.10.29.22.36.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 22:36:49 -0700 (PDT) From: Furong Xu <0x1207@gmail.com> To: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Vladimir Oltean , Andrew Lunn , Simon Horman , andrew+netdev@lunn.ch, Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , xfr@outlook.com, Furong Xu <0x1207@gmail.com> Subject: [PATCH net-next v6 2/6] net: stmmac: Rework macro definitions for gmac4 and xgmac Date: Wed, 30 Oct 2024 13:36:11 +0800 Message-Id: <2c80c2aeddc65f335d6fdb327916ac193144750c.1730263957.git.0x1207@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename and add macro definitions to better reuse them in common code. Signed-off-by: Furong Xu <0x1207@gmail.com> Reviewed-by: Simon Horman --- .../net/ethernet/stmicro/stmmac/stmmac_fpe.c | 77 ++++++++++--------- 1 file changed, 39 insertions(+), 38 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net= /ethernet/stmicro/stmmac/stmmac_fpe.c index 0a90e8f0df29..70ea475046f0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -9,23 +9,23 @@ #include "dwmac5.h" #include "dwxgmac2.h" =20 -#define MAC_FPE_CTRL_STS 0x00000234 -#define TRSP BIT(19) -#define TVER BIT(18) -#define RRSP BIT(17) -#define RVER BIT(16) -#define SRSP BIT(2) -#define SVER BIT(1) -#define EFPE BIT(0) - -#define MTL_FPE_CTRL_STS 0x00000c90 +#define GMAC5_MAC_FPE_CTRL_STS 0x00000234 +#define XGMAC_MAC_FPE_CTRL_STS 0x00000280 + +#define GMAC5_MTL_FPE_CTRL_STS 0x00000c90 +#define XGMAC_MTL_FPE_CTRL_STS 0x00001090 /* Preemption Classification */ -#define DWMAC5_PREEMPTION_CLASS GENMASK(15, 8) +#define FPE_MTL_PREEMPTION_CLASS GENMASK(15, 8) /* Additional Fragment Size of preempted frames */ -#define DWMAC5_ADD_FRAG_SZ GENMASK(1, 0) +#define FPE_MTL_ADD_FRAG_SZ GENMASK(1, 0) =20 -#define XGMAC_FPE_CTRL_STS 0x00000280 -#define XGMAC_EFPE BIT(0) +#define STMMAC_MAC_FPE_CTRL_STS_TRSP BIT(19) +#define STMMAC_MAC_FPE_CTRL_STS_TVER BIT(18) +#define STMMAC_MAC_FPE_CTRL_STS_RRSP BIT(17) +#define STMMAC_MAC_FPE_CTRL_STS_RVER BIT(16) +#define STMMAC_MAC_FPE_CTRL_STS_SRSP BIT(2) +#define STMMAC_MAC_FPE_CTRL_STS_SVER BIT(1) +#define STMMAC_MAC_FPE_CTRL_STS_EFPE BIT(0) =20 void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) { @@ -185,7 +185,7 @@ void dwmac5_fpe_configure(void __iomem *ioaddr, struct = stmmac_fpe_cfg *cfg, u32 value; =20 if (tx_enable) { - cfg->fpe_csr =3D EFPE; + cfg->fpe_csr =3D STMMAC_MAC_FPE_CTRL_STS_EFPE; value =3D readl(ioaddr + GMAC_RXQ_CTRL1); value &=3D ~GMAC_RXQCTRL_FPRQ; value |=3D (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; @@ -193,14 +193,14 @@ void dwmac5_fpe_configure(void __iomem *ioaddr, struc= t stmmac_fpe_cfg *cfg, } else { cfg->fpe_csr =3D 0; } - writel(cfg->fpe_csr, ioaddr + MAC_FPE_CTRL_STS); + writel(cfg->fpe_csr, ioaddr + GMAC5_MAC_FPE_CTRL_STS); =20 value =3D readl(ioaddr + GMAC_INT_EN); =20 if (pmac_enable) { if (!(value & GMAC_INT_FPE_EN)) { /* Dummy read to clear any pending masked interrupts */ - readl(ioaddr + MAC_FPE_CTRL_STS); + readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); =20 value |=3D GMAC_INT_FPE_EN; } @@ -221,24 +221,24 @@ int dwmac5_fpe_irq_status(void __iomem *ioaddr, struc= t net_device *dev) /* Reads from the MAC_FPE_CTRL_STS register should only be performed * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read" */ - value =3D readl(ioaddr + MAC_FPE_CTRL_STS); + value =3D readl(ioaddr + GMAC5_MAC_FPE_CTRL_STS); =20 - if (value & TRSP) { + if (value & STMMAC_MAC_FPE_CTRL_STS_TRSP) { status |=3D FPE_EVENT_TRSP; netdev_dbg(dev, "FPE: Respond mPacket is transmitted\n"); } =20 - if (value & TVER) { + if (value & STMMAC_MAC_FPE_CTRL_STS_TVER) { status |=3D FPE_EVENT_TVER; netdev_dbg(dev, "FPE: Verify mPacket is transmitted\n"); } =20 - if (value & RRSP) { + if (value & STMMAC_MAC_FPE_CTRL_STS_RRSP) { status |=3D FPE_EVENT_RRSP; netdev_dbg(dev, "FPE: Respond mPacket is received\n"); } =20 - if (value & RVER) { + if (value & STMMAC_MAC_FPE_CTRL_STS_RVER) { status |=3D FPE_EVENT_RVER; netdev_dbg(dev, "FPE: Verify mPacket is received\n"); } @@ -252,25 +252,26 @@ void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, st= ruct stmmac_fpe_cfg *cfg, u32 value =3D cfg->fpe_csr; =20 if (type =3D=3D MPACKET_VERIFY) - value |=3D SVER; + value |=3D STMMAC_MAC_FPE_CTRL_STS_SVER; else if (type =3D=3D MPACKET_RESPONSE) - value |=3D SRSP; + value |=3D STMMAC_MAC_FPE_CTRL_STS_SRSP; =20 - writel(value, ioaddr + MAC_FPE_CTRL_STS); + writel(value, ioaddr + GMAC5_MAC_FPE_CTRL_STS); } =20 int dwmac5_fpe_get_add_frag_size(const void __iomem *ioaddr) { - return FIELD_GET(DWMAC5_ADD_FRAG_SZ, readl(ioaddr + MTL_FPE_CTRL_STS)); + return FIELD_GET(FPE_MTL_ADD_FRAG_SZ, + readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS)); } =20 void dwmac5_fpe_set_add_frag_size(void __iomem *ioaddr, u32 add_frag_size) { u32 value; =20 - value =3D readl(ioaddr + MTL_FPE_CTRL_STS); - writel(u32_replace_bits(value, add_frag_size, DWMAC5_ADD_FRAG_SZ), - ioaddr + MTL_FPE_CTRL_STS); + value =3D readl(ioaddr + GMAC5_MTL_FPE_CTRL_STS); + writel(u32_replace_bits(value, add_frag_size, FPE_MTL_ADD_FRAG_SZ), + ioaddr + GMAC5_MTL_FPE_CTRL_STS); } =20 #define ALG_ERR_MSG "TX algorithm SP is not suitable for one-to-many mappi= ng" @@ -321,9 +322,9 @@ int dwmac5_fpe_map_preemption_class(struct net_device *= ndev, } =20 update_mapping: - val =3D readl(priv->ioaddr + MTL_FPE_CTRL_STS); - writel(u32_replace_bits(val, preemptible_txqs, DWMAC5_PREEMPTION_CLASS), - priv->ioaddr + MTL_FPE_CTRL_STS); + val =3D readl(priv->ioaddr + GMAC5_MTL_FPE_CTRL_STS); + writel(u32_replace_bits(val, preemptible_txqs, FPE_MTL_PREEMPTION_CLASS), + priv->ioaddr + GMAC5_MTL_FPE_CTRL_STS); =20 return 0; } @@ -335,11 +336,11 @@ void dwxgmac3_fpe_configure(void __iomem *ioaddr, str= uct stmmac_fpe_cfg *cfg, u32 value; =20 if (!tx_enable) { - value =3D readl(ioaddr + XGMAC_FPE_CTRL_STS); + value =3D readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); =20 - value &=3D ~XGMAC_EFPE; + value &=3D ~STMMAC_MAC_FPE_CTRL_STS_EFPE; =20 - writel(value, ioaddr + XGMAC_FPE_CTRL_STS); + writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); return; } =20 @@ -348,7 +349,7 @@ void dwxgmac3_fpe_configure(void __iomem *ioaddr, struc= t stmmac_fpe_cfg *cfg, value |=3D (num_rxq - 1) << XGMAC_RQ_SHIFT; writel(value, ioaddr + XGMAC_RXQ_CTRL1); =20 - value =3D readl(ioaddr + XGMAC_FPE_CTRL_STS); - value |=3D XGMAC_EFPE; - writel(value, ioaddr + XGMAC_FPE_CTRL_STS); + value =3D readl(ioaddr + XGMAC_MAC_FPE_CTRL_STS); + value |=3D STMMAC_MAC_FPE_CTRL_STS_EFPE; + writel(value, ioaddr + XGMAC_MAC_FPE_CTRL_STS); } --=20 2.34.1