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Wed, 13 Aug 2025 18:26:06 -0700 From: Nicolin Chen To: , , CC: , , , , , , , , , , , , Subject: [PATCH rfcv1 5/8] iommu/arm-smmu-v3: Pre-allocate a per-master invalidation array Date: Wed, 13 Aug 2025 18:25:36 -0700 Message-ID: <2b55869f698340d5791210b9a7e542f81ad20bcb.1755131672.git.nicolinc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A2:EE_|PH7PR12MB8794:EE_ X-MS-Office365-Filtering-Correlation-Id: df1fcaaa-59fa-4ec1-b041-08dddad19439 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?D7mFmEh4UERTsC9hSWeyjy7JNljFs/+u0wmazcfk2NzMVTjLmDM+zZWj+9Ma?= =?us-ascii?Q?NGe38KP3iCgMgWNRlanVI+8xwlwdTxbaCtQDRqpGKgGkZnzGAozK8M8uJqN0?= =?us-ascii?Q?MsY4PIEHFev3ub11VdZ2OJoX0m0jGHsBWhRq+NSi7wRxj+VTkTbRteUk3cwk?= =?us-ascii?Q?wsbZT/z3BTWVIRdAwex14JBUlLlK88+mBnGIHoQHW8iDfAWAX3mzem08LUt6?= =?us-ascii?Q?euv5VbOoCfdairFTtNjexnx4ts6bTTNL6pz2uQ9ZMWlvlKe5+1dnxxSiQGIv?= =?us-ascii?Q?hczBVWH+08Nj1j0RT3W3ACaLfWj8Hkj9Y1I/5oYE3QbnQekavYKxxt5ORf8Z?= =?us-ascii?Q?SW1bZbVfIbuMqFjfgqOTKmfzuRIf6rFBFipGA2Iui5NRmJiUIjD6EGwqLZcj?= =?us-ascii?Q?t++zvlYK/kLEMDt7OgxPeZRSxOeBgVHP5aeOeMZ0927iVLHv1U98TiKBMu7B?= =?us-ascii?Q?ANxTrw0kv8tViNVuiXpyCHcwHrRGCJy/80FeurM06DSLPJ6zzQeN7idOG4hl?= =?us-ascii?Q?bgK3RSULl/r8onFN5/pdzNXUq0B8HBtR5eQJfGnidVaTmjzYHbK8NGfageg7?= =?us-ascii?Q?SEFP1J10GJs/JLMAW6SKE5QUqI5HaT0XvZiNy/xEY7+l8toc0ovgJrVQBAgI?= =?us-ascii?Q?tT2mCtkMy5Rcop1vZnngl/eZnsUtFesfeWCnIjyCvWpPSPRut/LekIF3JfrB?= =?us-ascii?Q?6LySO7mQED0V+HuySpQ1QGmpPKASiaZbAjwrHnV3Nxa4DpkIPNvBD2HBpJ0D?= =?us-ascii?Q?+HQUL//eh5fWxbWTiM2+lY9XeHXbyWdok12XzHLoMpDlSzVloIwtAeHRj0am?= =?us-ascii?Q?nMEF1vw1ERMWslw6oqA1ucnE8pgk7cPKeKn0JDY4lNbZFUjCUMGpzz9ss1Go?= =?us-ascii?Q?r5/fsluVymSVW+JelyfNwB8z2mzXR9Sa8QN85wzwTxEfZxSFxHfdw3UAz85l?= =?us-ascii?Q?1n0TpO1YFf9mOJvI2H+3Bf5BjucAGL72Q4ZFjkbRsaK6xzp2ATG9jmaEiWG0?= =?us-ascii?Q?RK0JyUET4lKsLG2s/WonG65J6vy5l8apBdDugS8L1S4EJUSZOCVIx3xoLWVz?= =?us-ascii?Q?1Y2kAVs3PPMuZ7u50NpOWgxJ6pJWde1RGqn6L/bqz5WIDU2R74ZfxPsBcLAz?= =?us-ascii?Q?T2h1p533zzMqzQD1Mzc4WmnSiRTCBFEoLqMmhla3NvWB43P64Dk4D7vHlrAr?= =?us-ascii?Q?J91QUcG23pft2R20H7Hs0vr12Q+Ubm5Ir6tgxt9lJhj0NsIUNyTVPvzmXOLA?= =?us-ascii?Q?O6u6P7a5i623QYZTj+FCpyRrth3VWn+48yr2VtPb5jDD/lx0zOEGJpJPKlkr?= =?us-ascii?Q?VZTbiYtaaTlg4IZbV4Tr7EqUXUhx5u2si9iMf7M1YU0Xsb8OAikwvxk/yXI2?= =?us-ascii?Q?iVcadlxqxl3/cusWgIRKdduzZUKgpaQwig5CyLvXABOx1YXQxb7gzrxHsukH?= =?us-ascii?Q?2JkSjE9WsP02A6s3DP0r9dkRjei4W0Wsf29vIJW6dHi2ogCPg+EiuVduOtmu?= =?us-ascii?Q?b9cwI0X0y2FgP4eMQgCtJJMLWXP8aQCu9DGw?= X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Aug 2025 01:26:22.4411 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df1fcaaa-59fa-4ec1-b041-08dddad19439 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A2.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8794 Content-Type: text/plain; charset="utf-8" When a master is attached from an old domain to a new domain, it needs to build an invalidation array to delete and add the array entries from/onto the invalidation arrays of those two domains, passed via the del_invs and add_invs arguments in to arm_smmu_invs_del/add() respectively. Since the master->num_streams might differ across masters, a memory would have to be allocated when building an add_invs/del_invs array which might fail with -ENOMEM. On the other hand, an attachment to arm_smmu_blocked_domain must not fail so it's the best to avoid any memory allocation in that path. Pre-allocate a fixed size invalidation array for every master. This array will be filled dynamically when building an add_invs or del_invs array to attach or detach an smmu_domain. Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index d7421b56e3598..0330444bef45f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -919,6 +919,7 @@ struct arm_smmu_master { struct arm_smmu_device *smmu; struct device *dev; struct arm_smmu_stream *streams; + struct arm_smmu_invs *invs; struct arm_smmu_vmaster *vmaster; /* use smmu->streams_mutex */ /* Locked by the iommu core using the group mutex */ struct arm_smmu_ctx_desc_cfg cd_table; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 73f3b411ff7ef..fb5429d8ebb29 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -3723,6 +3723,7 @@ static int arm_smmu_insert_master(struct arm_smmu_dev= ice *smmu, int i; int ret =3D 0; struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(master->dev); + size_t num_ats =3D dev_is_pci(master->dev) ? master->num_streams : 0; =20 master->streams =3D kcalloc(fwspec->num_ids, sizeof(*master->streams), GFP_KERNEL); @@ -3730,6 +3731,13 @@ static int arm_smmu_insert_master(struct arm_smmu_de= vice *smmu, return -ENOMEM; master->num_streams =3D fwspec->num_ids; =20 + /* Max possible num_invs: two for ASID/VMIDs and num_ats for ATC_INVs */ + master->invs =3D arm_smmu_invs_alloc(2 + num_ats); + if (IS_ERR(master->invs)) { + kfree(master->streams); + return PTR_ERR(master->invs); + } + mutex_lock(&smmu->streams_mutex); for (i =3D 0; i < fwspec->num_ids; i++) { struct arm_smmu_stream *new_stream =3D &master->streams[i]; @@ -3767,6 +3775,7 @@ static int arm_smmu_insert_master(struct arm_smmu_dev= ice *smmu, for (i--; i >=3D 0; i--) rb_erase(&master->streams[i].node, &smmu->streams); kfree(master->streams); + kfree(master->invs); } mutex_unlock(&smmu->streams_mutex); =20 @@ -3788,6 +3797,7 @@ static void arm_smmu_remove_master(struct arm_smmu_ma= ster *master) mutex_unlock(&smmu->streams_mutex); =20 kfree(master->streams); + kfree(master->invs); } =20 static struct iommu_device *arm_smmu_probe_device(struct device *dev) --=20 2.43.0