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Sun, 27 Apr 2025 20:13:17 -0400 From: Jonathan Santos To: , , , CC: Sergiu Cuciurean , , , , , , , , , , , , , , , , Bartosz Golaszewski , Jonathan Santos Subject: [PATCH v6 06/11] iio: adc: ad7768-1: Add GPIO controller support Date: Sun, 27 Apr 2025 21:13:14 -0300 Message-ID: <2a8a327e589703ee53dbfb5190d20680ac3b350f.1745605382.git.Jonathan.Santos@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: tghbZx3_xIQCGoTt4dVI5MompNSXItYU X-Authority-Analysis: v=2.4 cv=b+Wy4sGx c=1 sm=1 tr=0 ts=680ec82f cx=c_pps a=PpDZqlmH/M8setHirZLBMw==:117 a=PpDZqlmH/M8setHirZLBMw==:17 a=XR8D0OoHHMoA:10 a=gAnH3GRIAAAA:8 a=KKAkSRfTAAAA:8 a=2YwxR-89tvQ4IDrCW4oA:9 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI3MDIwMiBTYWx0ZWRfX5Ep61KjlteWy /vscKkGyRIv6K90v7CqqFdi8wYIqUjfYIkTQbo01UrD5R5YlCO0PX+hD4BFRPRaqjVgILmqilWO RHLASqwAr1LJg/rwKqKY5p5Ger3SVTf2K/wJ/9JvyyzRZOC6QkxJGsy8dBLsMTk9Ot5fNDxFY0Q O8GkmZ9JZeUOWF0pu2XHq8FwrNxuF5GxAu0Pmba/Wszg6bDqfMob1FWmD46WQe6Kskdq84ESrOs bjNWES/hQ8xlaLh/jEHVDamAHNd7Ox6xr6soDuUB2m5AXqEFS2+AVsS+LZ0sxH2Cih7CNH01hBy rBunWUC2qk0ggn77b1ySKbhqmbajG12Cs0bYtPSAU9QyymKtfJGC0sv5Wv2+GVrrRrz1kkYgL1V d5uuoLKhiduUc0tcoOSUvoHCMrKG+zNQYO5FF97ipFsU2ZdV96hbMV3W91wx09AKzS874StC X-Proofpoint-ORIG-GUID: tghbZx3_xIQCGoTt4dVI5MompNSXItYU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-27_08,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 priorityscore=1501 adultscore=0 mlxscore=0 spamscore=0 bulkscore=0 impostorscore=0 clxscore=1011 mlxlogscore=999 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504270202 Content-Type: text/plain; charset="utf-8" From: Sergiu Cuciurean The AD7768-1 has the ability to control other local hardware (such as gain stages),to power down other blocks in the signal chain, or read local status signals over the SPI interface. Add direct mode conditional locks in the gpio callbacks to prevent register access when the device is in buffered mode. This change exports the AD7768-1's four gpios and makes them accessible at an upper layer. Reviewed-by: Marcelo Schmitt Acked-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Signed-off-by: Sergiu Cuciurean Co-developed-by: Jonathan Santos Signed-off-by: Jonathan Santos --- v6 Changes: * Replaced deprecated .set callback with .set_rv. v5 Changes: * Use the new new iio_device_claim/release_direct() functions. * replaced gpiochip_add_data() for devm_gpiochip_add_data(). v4 Changes: * Mentioned in the commit message that we cannot tweak the GPIO controller when the device is not in direct mode. v3 Changes: * Fixed SoB order. * Added missing iio_device_release_direct_mode(). * Simplified some regmap writes. * Removed ad7768_gpio_request() callback. * Fixed line wrapping. v2 Changes: * Replaced mutex for iio_device_claim_direct_mode(). * Use gpio-controller property to conditionally enable the GPIO support. * OBS: when the GPIO is configured as output, we should read=20 the current state value from AD7768_REG_GPIO_WRITE. --- drivers/iio/adc/ad7768-1.c | 141 ++++++++++++++++++++++++++++++++++++- 1 file changed, 139 insertions(+), 2 deletions(-) diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c index 0364d73329b0..1a546a0dc654 100644 --- a/drivers/iio/adc/ad7768-1.c +++ b/drivers/iio/adc/ad7768-1.c @@ -9,6 +9,8 @@ #include #include #include +#include +#include #include #include #include @@ -86,6 +88,16 @@ #define AD7768_REG_ANALOG2_VCM_MSK GENMASK(2, 0) #define AD7768_REG_ANALOG2_VCM(x) FIELD_PREP(AD7768_REG_ANALOG2_VCM_MSK, (= x)) =20 +/* AD7768_REG_GPIO_CONTROL */ +#define AD7768_GPIO_UNIVERSAL_EN BIT(7) +#define AD7768_GPIO_CONTROL_MSK GENMASK(3, 0) + +/* AD7768_REG_GPIO_WRITE */ +#define AD7768_GPIO_WRITE_MSK GENMASK(3, 0) + +/* AD7768_REG_GPIO_READ */ +#define AD7768_GPIO_READ_MSK GENMASK(3, 0) + #define AD7768_VCM_OFF 0x07 =20 enum ad7768_conv_mode { @@ -168,6 +180,7 @@ struct ad7768_state { struct regulator_dev *vcm_rdev; unsigned int vcm_output_sel; struct clk *mclk; + struct gpio_chip gpiochip; unsigned int mclk_freq; unsigned int samp_freq; struct completion completion; @@ -353,6 +366,122 @@ static int ad7768_set_dig_fil(struct ad7768_state *st, return 0; } =20 +static int ad7768_gpio_direction_input(struct gpio_chip *chip, unsigned in= t offset) +{ + struct iio_dev *indio_dev =3D gpiochip_get_data(chip); + struct ad7768_state *st =3D iio_priv(indio_dev); + int ret; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D regmap_clear_bits(st->regmap, AD7768_REG_GPIO_CONTROL, + BIT(offset)); + iio_device_release_direct(indio_dev); + + return ret; +} + +static int ad7768_gpio_direction_output(struct gpio_chip *chip, + unsigned int offset, int value) +{ + struct iio_dev *indio_dev =3D gpiochip_get_data(chip); + struct ad7768_state *st =3D iio_priv(indio_dev); + int ret; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D regmap_set_bits(st->regmap, AD7768_REG_GPIO_CONTROL, + BIT(offset)); + iio_device_release_direct(indio_dev); + + return ret; +} + +static int ad7768_gpio_get(struct gpio_chip *chip, unsigned int offset) +{ + struct iio_dev *indio_dev =3D gpiochip_get_data(chip); + struct ad7768_state *st =3D iio_priv(indio_dev); + unsigned int val; + int ret; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D regmap_read(st->regmap, AD7768_REG_GPIO_CONTROL, &val); + if (ret) + goto err_release; + + /* + * If the GPIO is configured as an output, read the current value from + * AD7768_REG_GPIO_WRITE. Otherwise, read the input value from + * AD7768_REG_GPIO_READ. + */ + if (val & BIT(offset)) + ret =3D regmap_read(st->regmap, AD7768_REG_GPIO_WRITE, &val); + else + ret =3D regmap_read(st->regmap, AD7768_REG_GPIO_READ, &val); + if (ret) + goto err_release; + + ret =3D !!(val & BIT(offset)); +err_release: + iio_device_release_direct(indio_dev); + + return ret; +} + +static int ad7768_gpio_set(struct gpio_chip *chip, unsigned int offset, in= t value) +{ + struct iio_dev *indio_dev =3D gpiochip_get_data(chip); + struct ad7768_state *st =3D iio_priv(indio_dev); + unsigned int val; + int ret; + + if (!iio_device_claim_direct(indio_dev)) + return -EBUSY; + + ret =3D regmap_read(st->regmap, AD7768_REG_GPIO_CONTROL, &val); + if (ret) + goto err_release; + + if (val & BIT(offset)) + ret =3D regmap_update_bits(st->regmap, AD7768_REG_GPIO_WRITE, + BIT(offset), value << offset); + +err_release: + iio_device_release_direct(indio_dev); + + return ret; +} + +static int ad7768_gpio_init(struct iio_dev *indio_dev) +{ + struct ad7768_state *st =3D iio_priv(indio_dev); + int ret; + + ret =3D regmap_write(st->regmap, AD7768_REG_GPIO_CONTROL, + AD7768_GPIO_UNIVERSAL_EN); + if (ret) + return ret; + + st->gpiochip =3D (struct gpio_chip) { + .label =3D "ad7768_1_gpios", + .base =3D -1, + .ngpio =3D 4, + .parent =3D &st->spi->dev, + .can_sleep =3D true, + .direction_input =3D ad7768_gpio_direction_input, + .direction_output =3D ad7768_gpio_direction_output, + .get =3D ad7768_gpio_get, + .set_rv =3D ad7768_gpio_set, + .owner =3D THIS_MODULE, + }; + + return devm_gpiochip_add_data(&st->spi->dev, &st->gpiochip, indio_dev); +} + static int ad7768_set_freq(struct ad7768_state *st, unsigned int freq) { @@ -494,8 +623,9 @@ static const struct iio_info ad7768_info =3D { .debugfs_reg_access =3D &ad7768_reg_access, }; =20 -static int ad7768_setup(struct ad7768_state *st) +static int ad7768_setup(struct iio_dev *indio_dev) { + struct ad7768_state *st =3D iio_priv(indio_dev); int ret; =20 st->gpio_reset =3D devm_gpiod_get_optional(&st->spi->dev, "reset", @@ -528,6 +658,13 @@ static int ad7768_setup(struct ad7768_state *st) if (IS_ERR(st->gpio_sync_in)) return PTR_ERR(st->gpio_sync_in); =20 + /* Only create a Chip GPIO if flagged for it */ + if (device_property_read_bool(&st->spi->dev, "gpio-controller")) { + ret =3D ad7768_gpio_init(indio_dev); + if (ret < 0) + return ret; + } + /* Set the default sampling frequency to 32000 kSPS */ return ad7768_set_freq(st, 32000); } @@ -881,7 +1018,7 @@ static int ad7768_probe(struct spi_device *spi) if (ret) return ret; =20 - ret =3D ad7768_setup(st); + ret =3D ad7768_setup(indio_dev); if (ret < 0) { dev_err(&spi->dev, "AD7768 setup failed\n"); return ret; --=20 2.34.1