From nobody Mon Sep 15 23:12:24 2025 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E82E7C54EBD for ; Mon, 9 Jan 2023 19:09:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237543AbjAITJf (ORCPT ); Mon, 9 Jan 2023 14:09:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237597AbjAITJK (ORCPT ); Mon, 9 Jan 2023 14:09:10 -0500 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 27BE13D1FA for ; Mon, 9 Jan 2023 11:09:09 -0800 (PST) Received: by mail-ej1-x62a.google.com with SMTP id az20so3566323ejc.1 for ; Mon, 09 Jan 2023 11:09:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=Zjv16lVnrOe4MOuLDfPurVOd0YQaBZRZ/Lo343Vt4Hc=; b=kl7J2GBCUBGug/lBcnD09rnaH4OP5/pDhZdLaR5W9i2Gmk1lOvqXlJnAa+Hj85+gyL 6ImsqFjdy7s3qwlVMH2el2pzx9yKvzBtryEkUKIbYKWwZ3Inm9UQlMhqHJgA6srSPubf 2Fn65ZtxYW+xpptShGkhydi0iAnmZzbpetZzfsIAfil/mk1ujcrN79uRHuCekWwJbInl RXvGo9CKd19DWhykjhey+5TIS1wbICBnJpO0XAygpL8q0JFLGCOu4EgrExNp4MMaR1g2 7D4Az5wGDeXgnSktjeRefNp2zoGAAEPdgKDavpqCHHcM1vS8ucXVUyPLKYhGa7F5IxmW x7Zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=Zjv16lVnrOe4MOuLDfPurVOd0YQaBZRZ/Lo343Vt4Hc=; b=medIGxt0BlvfrHbxN859TvYstgjfS9KOxElwllRGSdZWCwKQHvrBMihnUX4FY2O19O iyR0hH3h/CabjQiRt1MDn3B+/464SU6DgtcTXqHvEC3mNwk36+iiRxAmjMDH6OUr921M sAXA0xRQ23jjvY64ySGPBiNIjEEjc8Tu4EPruQtNXrdbdnzBrufmsDuWUEtPhu9w+YO2 JZ5Ro3YVOjjvZeA/sKm4uMMK7XxoYtrX+WMNNeCTHUvfRAHHMKuVRHtDK3sCLIFvE2+u C2NQLTWpCuhGDE39f7fmNzfMK2K407pqic0TKaGZeC7maV1iynrxDVgChMMUxWaBIDe6 m7OQ== X-Gm-Message-State: AFqh2kpmMUfslKuDtWEwlzliTkpaWwSdceW383MwitHyz/2R1LeJccdQ 7SV51Sud2jOATozEmDEVQzoXMNZpkQs= X-Google-Smtp-Source: AMrXdXsjd0ojc6Ck3GaLPzWei6Oar8qzCxROQgcTVi2r5rxJKZ2xGCKzpkTE0GPUFjgWv1vmDdvJIg== X-Received: by 2002:a17:906:aec4:b0:84d:269e:7b01 with SMTP id me4-20020a170906aec400b0084d269e7b01mr2480382ejb.0.1673291347719; Mon, 09 Jan 2023 11:09:07 -0800 (PST) Received: from matrix-ESPRIMO-P710 (p54a07888.dip0.t-ipconnect.de. [84.160.120.136]) by smtp.gmail.com with ESMTPSA id uk41-20020a170907ca2900b0078d9b967962sm4065109ejc.65.2023.01.09.11.09.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jan 2023 11:09:07 -0800 (PST) Date: Mon, 9 Jan 2023 20:09:05 +0100 From: Philipp Hortmann To: Greg Kroah-Hartman , linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] staging: rtl8192e: Rename MCSTxPowerL.., LegacyHTTxPowe.. and AntennaTx.. Message-ID: <271b3a9e1c23593e9ead925eb8415a584058fb56.1673290428.git.philipp.g.hortmann@gmail.com> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Rename variable MCSTxPowerLevelOriginalOffset to mcs_tx_pwr_level_org_offset, LegacyHTTxPowerDiff to legacy_ht_tx_pwr_diff and AntennaTxPwDiff to antenna_tx_pwr_diff to avoid CamelCase which is not accepted by checkpatch. Signed-off-by: Philipp Hortmann --- .../rtl8192e/rtl8192e/r8190P_rtl8256.c | 4 +-- .../staging/rtl8192e/rtl8192e/r8192E_dev.c | 16 +++++----- .../staging/rtl8192e/rtl8192e/r8192E_phy.c | 30 +++++++++---------- drivers/staging/rtl8192e/rtl8192e/rtl_core.h | 6 ++-- 4 files changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c b/drivers/s= taging/rtl8192e/rtl8192e/r8190P_rtl8256.c index 7517ec001421..1672a3fea13c 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8190P_rtl8256.c @@ -169,7 +169,7 @@ void rtl92e_set_ofdm_tx_power(struct net_device *dev, u= 8 powerlevel) u16 RegOffset[6] =3D {0xe00, 0xe04, 0xe10, 0xe14, 0xe18, 0xe1c}; u8 byte0, byte1, byte2, byte3; =20 - powerBase0 =3D powerlevel + priv->LegacyHTTxPowerDiff; + powerBase0 =3D powerlevel + priv->legacy_ht_tx_pwr_diff; powerBase0 =3D (powerBase0 << 24) | (powerBase0 << 16) | (powerBase0 << 8) | powerBase0; powerBase1 =3D powerlevel; @@ -177,7 +177,7 @@ void rtl92e_set_ofdm_tx_power(struct net_device *dev, u= 8 powerlevel) (powerBase1 << 8) | powerBase1; =20 for (index =3D 0; index < 6; index++) { - writeVal =3D (u32)(priv->MCSTxPowerLevelOriginalOffset[index] + + writeVal =3D (u32)(priv->mcs_tx_pwr_level_org_offset[index] + ((index < 2) ? powerBase0 : powerBase1)); byte0 =3D writeVal & 0x7f; byte1 =3D (writeVal & 0x7f00) >> 8; diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c b/drivers/stagi= ng/rtl8192e/rtl8192e/r8192E_dev.c index ab9e2265df6f..06ab02230125 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_dev.c @@ -413,12 +413,12 @@ static void _rtl92e_read_eeprom_info(struct net_devic= e *dev) priv->tx_pwr_level_ofdm_24g[i] =3D priv->EEPROMTxPowerLevelOFDM24G[i]; } - priv->LegacyHTTxPowerDiff =3D + priv->legacy_ht_tx_pwr_diff =3D priv->EEPROMLegacyHTTxPowerDiff; - priv->AntennaTxPwDiff[0] =3D priv->EEPROMAntPwDiff & 0xf; - priv->AntennaTxPwDiff[1] =3D (priv->EEPROMAntPwDiff & + priv->antenna_tx_pwr_diff[0] =3D priv->EEPROMAntPwDiff & 0xf; + priv->antenna_tx_pwr_diff[1] =3D (priv->EEPROMAntPwDiff & 0xf0) >> 4; - priv->AntennaTxPwDiff[2] =3D (priv->EEPROMAntPwDiff & + priv->antenna_tx_pwr_diff[2] =3D (priv->EEPROMAntPwDiff & 0xf00) >> 8; priv->CrystalCap =3D priv->EEPROMCrystalCap; priv->ThermalMeter[0] =3D priv->EEPROMThermalMeter & 0xf; @@ -456,11 +456,11 @@ static void _rtl92e_read_eeprom_info(struct net_devic= e *dev) priv->tx_pwr_level_ofdm_24g_c[i] =3D priv->EEPROMRfCOfdmChnlTxPwLevel[2]; } - priv->LegacyHTTxPowerDiff =3D + priv->legacy_ht_tx_pwr_diff =3D priv->EEPROMLegacyHTTxPowerDiff; - priv->AntennaTxPwDiff[0] =3D 0; - priv->AntennaTxPwDiff[1] =3D 0; - priv->AntennaTxPwDiff[2] =3D 0; + priv->antenna_tx_pwr_diff[0] =3D 0; + priv->antenna_tx_pwr_diff[1] =3D 0; + priv->antenna_tx_pwr_diff[2] =3D 0; priv->CrystalCap =3D priv->EEPROMCrystalCap; priv->ThermalMeter[0] =3D priv->EEPROMThermalMeter & 0xf; priv->ThermalMeter[1] =3D (priv->EEPROMThermalMeter & diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/stagi= ng/rtl8192e/rtl8192e/r8192E_phy.c index 19c65aaef3f6..cc7e72f2a52c 100644 --- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c +++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c @@ -535,9 +535,9 @@ static bool _rtl92e_bb_config_para_file(struct net_devi= ce *dev) =20 if (priv->IC_Cut > VERSION_8190_BD) { if (priv->rf_type =3D=3D RF_2T4R) - dwRegValue =3D priv->AntennaTxPwDiff[2]<<8 | - priv->AntennaTxPwDiff[1]<<4 | - priv->AntennaTxPwDiff[0]; + dwRegValue =3D priv->antenna_tx_pwr_diff[2] << 8 | + priv->antenna_tx_pwr_diff[1] << 4 | + priv->antenna_tx_pwr_diff[0]; else dwRegValue =3D 0x0; rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, @@ -561,17 +561,17 @@ void rtl92e_get_tx_power(struct net_device *dev) { struct r8192_priv *priv =3D rtllib_priv(dev); =20 - priv->MCSTxPowerLevelOriginalOffset[0] =3D + priv->mcs_tx_pwr_level_org_offset[0] =3D rtl92e_readl(dev, rTxAGC_Rate18_06); - priv->MCSTxPowerLevelOriginalOffset[1] =3D + priv->mcs_tx_pwr_level_org_offset[1] =3D rtl92e_readl(dev, rTxAGC_Rate54_24); - priv->MCSTxPowerLevelOriginalOffset[2] =3D + priv->mcs_tx_pwr_level_org_offset[2] =3D rtl92e_readl(dev, rTxAGC_Mcs03_Mcs00); - priv->MCSTxPowerLevelOriginalOffset[3] =3D + priv->mcs_tx_pwr_level_org_offset[3] =3D rtl92e_readl(dev, rTxAGC_Mcs07_Mcs04); - priv->MCSTxPowerLevelOriginalOffset[4] =3D + priv->mcs_tx_pwr_level_org_offset[4] =3D rtl92e_readl(dev, rTxAGC_Mcs11_Mcs08); - priv->MCSTxPowerLevelOriginalOffset[5] =3D + priv->mcs_tx_pwr_level_org_offset[5] =3D rtl92e_readl(dev, rTxAGC_Mcs15_Mcs12); =20 priv->DefaultInitialGain[0] =3D rtl92e_readb(dev, rOFDM0_XAAGCCore1); @@ -609,13 +609,13 @@ void rtl92e_set_tx_power(struct net_device *dev, u8 c= hannel) =20 ant_pwr_diff &=3D 0xf; =20 - priv->AntennaTxPwDiff[2] =3D 0; - priv->AntennaTxPwDiff[1] =3D (u8)(ant_pwr_diff); - priv->AntennaTxPwDiff[0] =3D 0; + priv->antenna_tx_pwr_diff[2] =3D 0; + priv->antenna_tx_pwr_diff[1] =3D (u8)(ant_pwr_diff); + priv->antenna_tx_pwr_diff[0] =3D 0; =20 - u4RegValue =3D priv->AntennaTxPwDiff[2]<<8 | - priv->AntennaTxPwDiff[1]<<4 | - priv->AntennaTxPwDiff[0]; + u4RegValue =3D priv->antenna_tx_pwr_diff[2] << 8 | + priv->antenna_tx_pwr_diff[1] << 4 | + priv->antenna_tx_pwr_diff[0]; =20 rtl92e_set_bb_reg(dev, rFPGA0_TxGainStage, (bXBTxAGC|bXCTxAGC|bXDTxAGC), diff --git a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h b/drivers/staging= /rtl8192e/rtl8192e/rtl_core.h index ca61fc60db6e..cc3e2816e657 100644 --- a/drivers/staging/rtl8192e/rtl8192e/rtl_core.h +++ b/drivers/staging/rtl8192e/rtl8192e/rtl_core.h @@ -469,16 +469,16 @@ struct r8192_priv { s8 cck_present_attn; long undecorated_smoothed_pwdb; =20 - u32 MCSTxPowerLevelOriginalOffset[6]; + u32 mcs_tx_pwr_level_org_offset[6]; u8 tx_pwr_level_cck[14]; u8 tx_pwr_level_cck_a[14]; u8 tx_pwr_level_cck_c[14]; u8 tx_pwr_level_ofdm_24g[14]; u8 tx_pwr_level_ofdm_24g_a[14]; u8 tx_pwr_level_ofdm_24g_c[14]; - u8 LegacyHTTxPowerDiff; + u8 legacy_ht_tx_pwr_diff; s8 RF_C_TxPwDiff; - u8 AntennaTxPwDiff[3]; + u8 antenna_tx_pwr_diff[3]; =20 bool bDynamicTxHighPower; bool bDynamicTxLowPower; --=20 2.39.0