From nobody Fri Dec 19 15:03:18 2025 Received: from mta-64-225.siemens.flowmailer.net (mta-64-225.siemens.flowmailer.net [185.136.64.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14887198A34 for ; Mon, 26 Aug 2024 17:56:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.225 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724694979; cv=none; b=SBngKBI63OLReJpagJn0RABru7IFp+3I5XebzqlvLVgK5WsJYXJClfhnoNCmWkjvoxAmzvzG1pNf2vrBJD+oRNgxdooOs/HKa8fXaeEscqa5pYttFREH/OwgY0CoZDFuD5zixB3bEXb9F4LeNvlJIiwif8lKhq4KubfgtN0ErsI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1724694979; c=relaxed/simple; bh=XxJCzQZWU9OzPhukxyUnCeQa8I9BqgJg+OBvOlXupE0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bh2NmKM/vGkXn7KmE0lB5e2jGLVPizY4hhDqZzNP6hfAVcuKebEis/H6XEcLO4gzYpk5ztGUJ2HxVY8Yt0HMxPqev1mGyvEOjvkg1SRpmilshBKTymUSsxwwGmSp/TdIXLazxcdBE7ypuBZMjjmXGywrJ25vtfrnBNVSou9TTAg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b=ZCcF4gca; arc=none smtp.client-ip=185.136.64.225 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=jan.kiszka@siemens.com header.b="ZCcF4gca" Received: by mta-64-225.siemens.flowmailer.net with ESMTPSA id 202408261756131e32c872702823b84e for ; Mon, 26 Aug 2024 19:56:13 +0200 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=jan.kiszka@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=4KBzC3UYDzVcntWEjAfh9aq0jCErmi0ZBb3RSeN9zX0=; b=ZCcF4gcaVjDpTCiNWCyvwvj9pNdY3hNHhxuT8fJ7NDjJQuvRXstfh+c//YUMZBv1AXu6Lb lHF2wUy+JOtHke4eqbkysph6IHt2LdZPISw8yleKjrVzvOFYkFGP9VRw+VCPS5zz1Xyu6+tD 7O6h7Vy2nrb3O9V4jUlc6ia8HH7i3BTTAWPHKJU343MrFsl38l6Xh++D68i51CDRa5riEIRm gKicJxClz/YT5zlg/xTbejISpHBPlcZ58jOPRAosaCjrClijbzC6tLthDWUWH0hmP56IGChY d73E8RXFOwKGGLYokELHjdkZLvcRG/aO3xLNVBK73dlD9BWmtp7WyD1A==; From: Jan Kiszka To: Nishanth Menon , Santosh Shilimkar , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Siddharth Vadapalli , Bao Cheng Su , Hua Qian Li , Diogo Ivo Subject: [PATCH 5/5] arm64: dts: ti: iot2050: Enforce DMA isolation for devices behind PCI RC Date: Mon, 26 Aug 2024 19:56:09 +0200 Message-ID: <270232f43d17c95610904928502ad00bb975304c.1724694969.git.jan.kiszka@siemens.com> In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-294854:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Jan Kiszka Reserve a 64M memory region below the top of 1G RAM (smallest RAM size across the series, space left for firmware carve-outs) and ensure that all PCI devices do their DMA only inside that region. This is configured via a restricted-dma-pool and enforced with the help of the first PVU. Signed-off-by: Jan Kiszka --- .../boot/dts/ti/k3-am65-iot2050-common.dtsi | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm6= 4/boot/dts/ti/k3-am65-iot2050-common.dtsi index e76828ccf21b..cc0f33e3519c 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi @@ -82,6 +82,11 @@ wdt_reset_memory_region: wdt-memory@a2200000 { reg =3D <0x00 0xa2200000 0x00 0x1000>; no-map; }; + + pci_restricted_dma_region: restricted-dma@ba000000 { + compatible =3D "restricted-dma-pool"; + reg =3D <0 0xba000000 0 0x4000000>; + }; }; =20 leds { @@ -571,6 +576,10 @@ seboot-backup@e80000 { }; }; =20 +&pcie0_rc { + memory-region =3D <&pci_restricted_dma_region>; +}; + &pcie1_rc { status =3D "okay"; pinctrl-names =3D "default"; @@ -580,6 +589,8 @@ &pcie1_rc { phys =3D <&serdes1 PHY_TYPE_PCIE 0>; phy-names =3D "pcie-phy0"; reset-gpios =3D <&wkup_gpio0 27 GPIO_ACTIVE_HIGH>; + + memory-region =3D <&pci_restricted_dma_region>; }; =20 &mailbox0_cluster0 { @@ -640,3 +651,24 @@ &mcu_r5fss0 { /* lock-step mode not supported on iot2050 boards */ ti,cluster-mode =3D <0>; }; + +&main_navss { + ti_pvu0: ti-pvu@30f80000 { + compatible =3D "ti,am654-pvu"; + reg =3D <0 0x30f80000 0 0x1000>, + <0 0x36000000 0 0x100000>; + reg-names =3D "cfg", "tlbif"; + interrupts-extended =3D <&intr_main_navss 390>; + interrupt-names =3D "pvu"; + }; + + ti_pvu1: ti-pvu@30f81000 { + compatible =3D "ti,am654-pvu"; + reg =3D <0 0x30f81000 0 0x1000>, + <0 0x36100000 0 0x100000>; + reg-names =3D "cfg", "tlbif"; + interrupts-extended =3D <&intr_main_navss 389>; + interrupt-names =3D "pvu"; + status =3D "disabled"; + }; +}; --=20 2.43.0