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charset="utf-8" From: Nazim Amirul Agilex5 and other SoCFPGA platforms can wire per-DMA-channel TX/RX completion interrupts through the GIC as named platform IRQs. The common stmmac platform code already parses "tx-queue-N" / "rx-queue-N". Follow the same approach as dwmac-s32: if all configured TX and RX queue IRQs are present, set STMMAC_FLAG_MULTI_MSI_EN so the existing multi-IRQ request path and INTM=3D1 programming are used. Otherwise keep the single macirq path. Signed-off-by: Nazim Amirul --- Background: Per DMA channel interrupt support was first merged in 2024 as part of Leong Ching Swee's series [1], and then reverted in commit e9ee910218ff because the devicetree binding had not been reviewed yet [2]. Since then, the remaining pieces have landed upstream separately: the binding allows the "tx-queue-N"/"rx-queue-N" interrupts, the platform code parses them, and the DWMAC4 and XGMAC DMA code programs INTM for multi-MSI. The Agilex5 DTS also describes the per-queue interrupts. The only missing part is enabling STMMAC_FLAG_MULTI_MSI_EN in dwmac-socfpga, which this patch adds. It was posted before [3], but was deferred because net-next was closed for the merge window. [1] https://lore.kernel.org/all/20240105070925.2948871-1-leong.ching.swee@i= ntel.com/ [2] https://lore.kernel.org/all/2df9fe3e-7971-4aa2-89a9-0e085b3b00d7@linaro= .org/ [3] https://lore.kernel.org/all/20260817074221.27459-2-muhammad.nazim.amiru= l.nazle.asmade@altera.com/ .../ethernet/stmicro/stmmac/dwmac-socfpga.c | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/= net/ethernet/stmicro/stmmac/dwmac-socfpga.c index 6d4bc1fe8f75..2ca45b3dfa90 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c @@ -596,6 +596,35 @@ static void socfpga_agilex5_setup_plat_dat(struct socf= pga_dwmac *dwmac) plat_dat->crosststamp =3D smtg_crosststamp; } =20 +static void socfpga_dwmac_setup_multi_irq(struct device *dev, + struct plat_stmmacenet_data *plat, + struct stmmac_resources *res) +{ + int i; + + for (i =3D 0; i < plat->rx_queues_to_use; i++) { + if (res->rx_irq[i] <=3D 0) { + dev_dbg(dev, "Missing RX queue %d interrupt\n", i); + goto mac_irq_mode; + } + } + + for (i =3D 0; i < plat->tx_queues_to_use; i++) { + if (res->tx_irq[i] <=3D 0) { + dev_dbg(dev, "Missing TX queue %d interrupt\n", i); + goto mac_irq_mode; + } + } + + plat->flags |=3D STMMAC_FLAG_MULTI_MSI_EN; + dev_info(dev, "Multi-IRQ mode (per queue IRQs) selected\n"); + return; + +mac_irq_mode: + plat->flags &=3D ~STMMAC_FLAG_MULTI_MSI_EN; + dev_dbg(dev, "MAC IRQ mode selected\n"); +} + static int socfpga_dwmac_probe(struct platform_device *pdev) { struct plat_stmmacenet_data *plat_dat; @@ -655,6 +684,8 @@ static int socfpga_dwmac_probe(struct platform_device *= pdev) =20 ops->setup_plat_dat(dwmac); =20 + socfpga_dwmac_setup_multi_irq(dev, plat_dat, &stmmac_res); + return devm_stmmac_pltfr_probe(pdev, plat_dat, &stmmac_res); } =20 --=20 2.43.7