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charset="utf-8" All the boards where IWDG1 is secured and monitored through OP-TEE require Linux to control the secure watchdog through the ARM SMC watchdog driver. Move the node arm,smc-wdt in the SoC file. Signed-off-by: Antonio Borneo --- arch/arm/boot/dts/st/stm32mp151.dtsi | 6 ++++++ arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi | 7 ------- 2 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/st= m32mp151.dtsi index e7fec8b49ae16..3d409f1baea49 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -31,6 +31,12 @@ arm-pmu { interrupt-parent =3D <&intc>; }; =20 + arm_wdt: watchdog { + compatible =3D "arm,smc-wdt"; + arm,smc-id =3D <0xbc000000>; + status =3D "disabled"; + }; + psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; diff --git a/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi b/arch/arm/boot= /dts/st/stm32mp157f-dk2-scmi.dtsi index 172347769e025..27ea5e79efc66 100644 --- a/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157f-dk2-scmi.dtsi @@ -13,13 +13,6 @@ optee@de000000 { no-map; }; }; - - arm_wdt: watchdog { - compatible =3D "arm,smc-wdt"; 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charset="utf-8" From: Amelie Delaunay On STM32MP15 boards from STMicroelectronics, the IWDG1 is secured and monitored through OP-TEE. Enable the arm,smc-wdt node on ST boards so Linux can control the secure watchdog through SMC calls. Signed-off-by: Amelie Delaunay Signed-off-by: Antonio Borneo --- arch/arm/boot/dts/st/stm32mp157c-ed1.dts | 5 +++++ arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts b/arch/arm/boot/dts/s= t/stm32mp157c-ed1.dts index 49dd555cc228c..05b7c664a4b15 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1.dts @@ -145,6 +145,11 @@ channel@6 { }; }; =20 +&arm_wdt { + timeout-sec =3D <32>; + status =3D "okay"; +}; + &crc1 { status =3D "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/= st/stm32mp15xx-dkx.dtsi index 1a07ae09afb2a..ca888400b5a41 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi @@ -144,6 +144,11 @@ channel@19 { }; }; =20 +&arm_wdt { + timeout-sec =3D <32>; + status =3D "okay"; +}; + &cec { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&cec_pins_b>; --=20 2.34.1 From nobody Fri Oct 23 22:16:13 2026 Received: from PA4PR04CU001.outbound.protection.outlook.com (mail-francecentralazhn15013061.outbound.protection.outlook.com [52.102.174.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF0F42BEFF6; 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charset="utf-8" The watchdog IWDG1 is secure by default on STM32MP1 SoCs and has to be controlled through the arm,smc-wdt driver. Enable the driver on mach-stm32 when ARCH_MULTI_V7 is enabled. Signed-off-by: Antonio Borneo --- arch/arm/mach-stm32/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-stm32/Kconfig b/arch/arm/mach-stm32/Kconfig index 4ac3384e397aa..de09b2afa0f2e 100644 --- a/arch/arm/mach-stm32/Kconfig +++ b/arch/arm/mach-stm32/Kconfig @@ -13,6 +13,8 @@ menuconfig ARCH_STM32 select RESET_CONTROLLER select STM32_EXTI if ARM_SINGLE_ARMV7M select STM32_FIREWALL + select WATCHDOG if ARCH_MULTI_V7 + select ARM_SMC_WATCHDOG if ARCH_MULTI_V7 help Support for STMicroelectronics STM32MP1 processors using Cortex-A7 cores. Note that support for the earlier Cortex-M based variants --=20 2.34.1