From nobody Tue Sep 29 11:19:37 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7D6834FD787 for ; Tue, 29 Sep 2026 09:48:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790675328; cv=none; b=t5OahOmPOB7o9Aumr6dPMvWlrFnMAGESfGJUHWsM+ZqxB1xEHwPIvqJK6/z2WXpWpThwuHEBQGa7M+hlCjN8ALdXYHVKwc9JzeOMXAS2mqWbX/MApPJLdycKPCBX4IIyANEgGdeWtN0TVozs8P8j3xi7Id0TKDaHm2nvpDlTPL8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790675328; c=relaxed/simple; bh=m6HIPF5r6TbYaTNfzS7HLPHkdxdQCddDgURTk8nWovs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nrG89q4iEwUT7YZV1ucbIQYyRovzbxUBiRJNwSoafdy0JLt8wMbolP6hhmUDwzApM5Q5sFTES8SKaAm+wjaVm8HCANjknPYZ2YJEnHzPFdBhOpXJHRKnYd1yM+eWRgF1Hnh1MAb1SmeMZCZKrzCJuCbkcb0xkU1mwD+ZlSHD1rg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=koOhRLNO; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=VaUY4s/Q; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="koOhRLNO"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="VaUY4s/Q" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68T8XYKi1004789 for ; Tue, 29 Sep 2026 09:48:45 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= O7alf5yqesjOBC8gsAFdsEjxy9MwH5I9h4zXoZlLn/Y=; b=koOhRLNO5KQmXB+p wYSKWU0B/gIGJomYj76p2TtkZQ8slliYa4DcFyT+f0gLnU65SnPuNs09YipwysKa 8dORQdwrhIwjTg4xCyr1feRjbgG5ofMdVpWPmISOXgiOHB/GjyF/faC5jMv8ayeN 7qMDEQMw+qgrYEcLSyupEPeny7gzs40Zr9VN0VLUPxO7RSAMmvr0v3avs43y1eHt mL1kJ2r0xdEb+7sIoZ0yKblXM4PE+o6yAYHF9u7aFl+t+UWHrG7y+uOrIFenJp6L WvUuPZW2HYtDN86KaytSZr8GrM0FhVM6gjQ1udnYbyKIXvwNfLpepQcPLC8rIvL8 g0Qd6A== Received: from mail-dy1-f200.google.com (mail-dy1-f200.google.com [74.125.82.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4h09x4r9wm-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 29 Sep 2026 09:48:45 +0000 (GMT) Received: by mail-dy1-f200.google.com with SMTP id 5a478bee46e88-34bbf2e3c5cso642621eec.0 for ; Tue, 29 Sep 2026 02:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790675325; x=1791280125; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=O7alf5yqesjOBC8gsAFdsEjxy9MwH5I9h4zXoZlLn/Y=; b=VaUY4s/Qgshqy2Jpc9sZ7kDXwHXGOX0eBykjbtViVLOV/ZRlxXXZvdF3C5dv4qdX/b QpHD6XQN5gH74grzHe0DIpkHxvWwVsub4xAgONa8cIFo/beYiygf5OkmB3Z1Mj9nlVXY rg7m3JwAAAwaLZmFWfv118oe406Dx0L7CENF4SjsliKCh1LP26fHAkt4Fn9sVBSOIY5z tVhTtTUpI4RGQTkicFcoBht4UQXJNJm3iP9m+RpAouev2ekCQPLlUKctqgWh5z0xwEad bYffJo9l/TCubUeiLUskaUwVhrUZFacxgzYUfATrBJfU84KPpyxDgY/s8j24oxJ3Fx3g fSiA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790675325; x=1791280125; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=O7alf5yqesjOBC8gsAFdsEjxy9MwH5I9h4zXoZlLn/Y=; b=Yd/nZ5sUxDcfJ+g2lFMlvAAmBKi+Jg95HLQEiuu5RganENVU6b0/W3RlgCqEz/jZkw /TFDNMuFzlDI0wA/1XtM5PDkSdZbg0jD3BJaL8aeXGeyHO9OtKTX5cKvCVblfKibM2js +NGpVUcBbyDCAnfoSO9+Z27jIOPup5+T/h4oUaiTNPtG7sfvA0X/X7hM1PyofirxhxDb RW/Wi4DhOxMjGP1PbICsS9s0Viq8EEfYYNKMGMTQHc1VTT+RXl1ugvX2R7x4QrJT5IMa exV6HSJldCJM1GrvPN7cdNStWmEYI88BWteq+uBWiAmPT+tcTHbC87QW6Tzd4uLK/378 F6eA== X-Forwarded-Encrypted: i=1; AKwUvBwEco1KA+kJlxlgfHixlB90rxBdOBG8Mx2ucMpluRvjhuCMypet9JyfH0QgGvoVfKGN50Dy8h/uuzoAJTQ=@vger.kernel.org X-Gm-Message-State: AFuF++lTj2uSQp1EGqlZrrwJh7gURu3yj9ehArarxNTr9RUHHQx04S7t 9CNlfldlOwFKIwJCjHF2h4SwyuYobV8vJ/NJ+wae6jGuOkgVmK1OxI2EFgOCy+4h33hgywQCJX/ CeRXMAcN1Y/Ch4oPrltO5d86ojaaJ7ciikoK9JGhYMX0ftY3gZS0rnEW9/uEZPcux0PU= X-Gm-Gg: AYBFou1hXSyGuwstY2Jac45xl2B4XgUlVgVbSBJXwkdpkt+FmDVAmORE36x0Laiz/rE +XfKpcdvR1Qchp/NP7FiQAOO848TH4HaRCD8a+IYdcGe5TOUQ17Qw8PLMWN8ow5XNM7hfKuR3xe Ak7cuQ5BW5T65y3+tDc9sM0XW8NoR2E+i18t2sBljh/67JlcF16EHjVoiH2ZnYSGC6iDzp+qpSm WAElNGEl4bx02lWaZeqE9NOVIBFnV/fCUWoPkkeUzmgWiAMTFOOe0O8Hn3sCj3piQPKLYAgSXpM BbrzwY8KQZ4jIVc17qcLCDeg+9+D1JY+0s552+TBTRahR8AfdVR1+ZX6W0H06VPWKkE0HkUGYF/ kpk4AlWdp17fsxAfmDrxrJ//mNaPV85wviIRipIWsyEHz4/WR7oZOToWvwb/ioSJhj2zesPsRuy UVXfA/G+xq+rONMLyd86xLmIo= X-Received: by 2002:a05:7022:6881:b0:139:b575:d42f with SMTP id a92af1059eb24-146ce39a169mr20414868c88.17.1790675324997; Tue, 29 Sep 2026 02:48:44 -0700 (PDT) X-Received: by 2002:a05:7022:6881:b0:139:b575:d42f with SMTP id a92af1059eb24-146ce39a169mr20414819c88.17.1790675324308; Tue, 29 Sep 2026 02:48:44 -0700 (PDT) Received: from hu-hardshar-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14bfaaa296dsm1056163c88.9.2026.09.29.02.48.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 02:48:43 -0700 (PDT) From: Hardeep Sharma Date: Tue, 29 Sep 2026 15:18:06 +0530 Subject: [PATCH v7 1/2] dt-bindings: soc: qcom,geni-se: Allow 1 or 2 address and size cells Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260929-kuno-soc-support-v7-1-530f62dc4020@oss.qualcomm.com> References: <20260929-kuno-soc-support-v7-0-530f62dc4020@oss.qualcomm.com> In-Reply-To: <20260929-kuno-soc-support-v7-0-530f62dc4020@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Abel Vesa , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hardeep Sharma X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790675315; l=1170; i=hardeep.sharma@oss.qualcomm.com; s=20260204; h=from:subject:message-id; bh=m6HIPF5r6TbYaTNfzS7HLPHkdxdQCddDgURTk8nWovs=; b=BNaL8nY6BMt6oeiq+dbAuQA8H163cAxwKxfyPg+qkJml6TLk2y4CdmQebdyvtkeJfQfH2YXP5 PSQFEfxd4xDCPWndJQ7CRB7xxA6Qmk3wQ9Wo9bcADe0CHtZunb2PwT0 X-Developer-Key: i=hardeep.sharma@oss.qualcomm.com; a=ed25519; pk=IvwPDKA2xr6jWaCIBBY2ran/H0124QUzVfun+CtEikM= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI5MDAzOCBTYWx0ZWRfXy9ilyVvbU1xX Ko/2/eg0TXpcU5wJkSJYjz4foypqS9jUOBkwOlcfZn3nCusLqfMix7EC2GmNnCmt7MyE2wCe0m9 JuUtDEcAOZiXmLT9UiPZGgM53RgJEfI= X-Proofpoint-GUID: uih1Q22ERhbM-T0CN64xt3U-RHZNZ8h_ X-Authority-Analysis: v=2.4 cv=I5Hw19gg c=1 sm=1 tr=0 ts=6abb897d cx=c_pps a=PfFC4Oe2JQzmKTvty2cRDw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=p3y7badNstDnMIU1-wkA:9 a=QEXdDO2ut3YA:10 a=6Ab_bkdmUrQuMsNx7PHu:22 X-Proofpoint-ORIG-GUID: uih1Q22ERhbM-T0CN64xt3U-RHZNZ8h_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI5MDAzOCBTYWx0ZWRfX692efzWqkAWH C8mPKsOl1O522r0zkiv7PfeJFS+lY0OZBOpd14oDgavHbcu0T76p9sCodNOd7V4gBuoEaKrHI61 Y5JbrGZ9oxd01pGJADumBZ7JRSb68l0uNgJq2GLW9+dCjGs47arFsNQ2XX9UnpV/7rnmE7/isA5 8RXrstPA+wlfHKxfQXx8rSQL5q/Ky1QpMC21SK0QREMQTOGmYj8bGMRBtPnoYBTP+qhUbp+TL7f So6e4JcqKg6PPrX4hITzwKh41mF00q5XSOt+2mNdLB93MBXkeGtgkeRuIoPqulzwl8jUFKsBTw5 CBOzHlV6Ms7xwUBOGDSSQ6qQ/mR1UHv1MGhlg5dB9qtbi1mY0BUASP0Xn4gMOb9jW1ArWT1pT02 Fm5QMg6OuvhERq8sAkhFqkcMkNyFp6Lkr+tQUa0DkYKObTSjmpTtnzYP6HbkXOr9Sth2JgWU7ql iWkaqAxl3Clquz9HNog== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-29_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 clxscore=1015 impostorscore=0 suspectscore=0 adultscore=0 spamscore=0 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609290038 The QUP wrapper maps its serial engines 1:1 into the parent bus. On 64-bit Qualcomm SoCs that bus uses two address and size cells, but on 32-bit SoCs such as Kuno the soc node uses one. Requiring two cells forces those SoCs to spell out an explicit ranges property instead of the plain empty "ranges;" which dtc only accepts when the child and parent cell counts match. Allow either one or two cells so the wrapper can follow its parent bus. Signed-off-by: Hardeep Sharma --- Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b= /Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml index 54cd585f19e3..c01ad421a122 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml @@ -36,10 +36,10 @@ properties: maxItems: 2 =20 "#address-cells": - const: 2 + enum: [ 1, 2 ] =20 "#size-cells": - const: 2 + enum: [ 1, 2 ] =20 ranges: true =20 --=20 2.43.0 From nobody Tue Sep 29 11:19:37 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 583473559E1 for ; Tue, 29 Sep 2026 09:48:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790675336; cv=none; b=HWl9T1WKrqs1xdFjvX1W0FqbFKZb8JJOXvxvei3kO/JXldNF8/MsV3cQKS8sgYfI27Q6N2gnUgYtmiW4Vd3JWZNrcJJn8ZxsJm5o8NZz/XfZ7uxV9XKBiJdPFtyCAygVAYYE1oflvwp+nppvOKFw0oWjLwMG1vfIGdkzulbLga0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790675336; c=relaxed/simple; bh=AfHO8BmKa55rMJwC9Z6OIJCGOHxcreSI1r4oQXYYJlg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=f0rGbZuz0gKnpN64+U2H2aRjdNHU5P41fqr++spgAAMx16s/CynnPNehfyQZ547VwX0TtzOP/qhYeq45zxFqRXd2nw6LaPworRB6JFA22S+ZxfkLBs4Qs/Pf0qTWUqWkFc2XG4cOdcJEA5ueqfUZk+AkJ3dpXfgVVQVtHhKmnuU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=A0pd/Ev0; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=ARrJLWJf; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="A0pd/Ev0"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="ARrJLWJf" Received: from pps.filterd (m0279868.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68T7U1MK3684787 for ; Tue, 29 Sep 2026 09:48:51 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= RJ0/Tt/kuxDEq0whlqJss+EhIMv/omiTAfRt3e6XHWs=; b=A0pd/Ev0L3SBo6aA F6xqd5F0m2zXrAMhehv88KPNhuv2d21TxbnhgTUBVyqtTG61cZN8sI91pPExbVOl 0J0zfLk/tJkPA9fjVkcK+6D9zVumZQuU+xR7JcuB3oy0RXjRcxxXoBXp/mYhYE37 tI2btw+vHN/ziST7ZD6ZeXuvrJqSzuh6c+TsheucFHVfskjcdZA1wblofjF0eNmo bix9iVfi75WT9/e2PnHKu36oOtloHYD3njtIAUepVIWa9upKqAigJczhPEAFO2jK HPv1TJhTKpsf5AI1/LvrU6wTghDoHQuk5HJzw0ipeF/Kzmx5Vw3FnA0rT+AupMfP KzXaJQ== Received: from mail-dl1-f69.google.com (mail-dl1-f69.google.com [74.125.82.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4h0144t9w7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 29 Sep 2026 09:48:51 +0000 (GMT) Received: by mail-dl1-f69.google.com with SMTP id a92af1059eb24-1383723dfddso2823526c88.0 for ; Tue, 29 Sep 2026 02:48:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790675330; x=1791280130; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=RJ0/Tt/kuxDEq0whlqJss+EhIMv/omiTAfRt3e6XHWs=; b=ARrJLWJfQkxn4s+d4/WA1WX90eON0hz7qyxupBlfaJOn/UA6f5Nxijv8YdmUO/TQzL pWF4qa9gBDV56AKXzXOyDEz6+I6FFefQ1IHqM6lTtFFnygLfjgUBfrmVv/FKS1RzGx3n vFZXRTVod/dL7klN7M35y9+NBXHLikb9K5SUQy3DiftgA0w6KNxC4dEBbI8B+DYZVH3J brXEr2OF39nDymKtd58fvpHqc+uIn0cK0D/Q5NZdSnbU1aK52pJmIqrBsjuckGBzdBAs zFYBy26UzspXzQp0artaiJuVaRrgzFfAjoQRWn8ZlinrT42Eb5h8G9OrSsEnrYnJOEPa /mvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790675330; x=1791280130; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=RJ0/Tt/kuxDEq0whlqJss+EhIMv/omiTAfRt3e6XHWs=; b=24V5oVxz87B7/VNO4jyWbZfDDs3ZITiSnGRlndMJfqtLh3I93mCfaN5uMcPnZN10sC qCULI4dM/J/dRmBJR2Qj6vBRiggJCBTic+6DnC+1TfVZ5FrPZbm0A5FiN0qVi5Ndq7K5 2HqLFmr6CDH4ubSzHUc8GnrHg0XxkCOxNJtFAoOKg1PjTwIYZ6pteXZ/043+fb0bP7HJ 4/D8AVywHVHGxg58qJWQpNv7lBm9VzwfCnCH/YO0rSRWXorhb+X5r5tfpxOncEy1WSrO BJtJHnNWnHQnJrIOttBBjyB2l4MW6mS0jznt01+TFYXkGoRdUU/ahTzYMkPSkVQ+r4nU 5/8A== X-Forwarded-Encrypted: i=1; AKwUvBwMnhnYWnt1ftAdjss+rHPROfH2um6uBWUj+NNiEGceERjnHR1ZE56o/0oLe4/w+yU5Y3WuYPjJtnZkobE=@vger.kernel.org X-Gm-Message-State: AFuF++lEVmxPOFF5GACWATYjNxDvoBagUwLaMT3bI56TxYfvW/ncM4II a02IDI5+DtUVgikYLWPBfW3Tu2qDHZA/NZTA/1JrTU1x3yvV9HrxD3rGRKY9W7FnGPmsgTbfcGn 6Bn9Ex4LnXFnZ0HZR1MeZGh5ZfYq8kjMHvabnXQeFL2aLiaKe4Kyf+smLYWhlvU4kBKI= X-Gm-Gg: AYBFou2BIlng3OJBr7S7wEXvZTHcoX7Xwt2YvlijO0MH3ftGqofmK6ezJJirqLiPSq6 rVG+PDTzHMMRynj0MPx3y9PgIHTfIE4QK+QqXmR9OYgNBUDQLayZDuy0VCgw5a+0YS43Lfnwb3x V+G1t2Umz4t4Svl4OES4/BeGAxwT2nnWuJVS/iykR3MbtFI+zox27swGlpiZkLbvt/qnH4KfR0W SuoPAnibB/XEMELSqLJI5eQ6JYbiowzJYPYdKGSKagFqwP5hgAr+ULOTMDwcu3U0ln+WgAlID6D no7s9ZffsfWHWoJwmmupjbCpWWAxZZHPeB3TUAVeSV+s+x2GkqwDBO0mUUZkRU3KAL/q/jV+r38 RAZ1hYsvPu8jFGorHos8bAxrebCvRVTaWSs+t3ae8UbgUp6kBQn4ZCUdN0GGDJ4JiZOW4+5sbi1 W5tSq/10T0Ob+SNh8hclq7hq0= X-Received: by 2002:a05:7022:f50c:b0:14b:588b:c80f with SMTP id a92af1059eb24-14b588bcbdamr2279003c88.10.1790675330081; Tue, 29 Sep 2026 02:48:50 -0700 (PDT) X-Received: by 2002:a05:7022:f50c:b0:14b:588b:c80f with SMTP id a92af1059eb24-14b588bcbdamr2278972c88.10.1790675329466; Tue, 29 Sep 2026 02:48:49 -0700 (PDT) Received: from hu-hardshar-blr.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. [103.229.18.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-14bfaaa296dsm1056163c88.9.2026.09.29.02.48.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Sep 2026 02:48:48 -0700 (PDT) From: Hardeep Sharma Date: Tue, 29 Sep 2026 15:18:07 +0530 Subject: [PATCH v7 2/2] ARM: dts: qcom: Add initial device tree for Kuno SoC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260929-kuno-soc-support-v7-2-530f62dc4020@oss.qualcomm.com> References: <20260929-kuno-soc-support-v7-0-530f62dc4020@oss.qualcomm.com> In-Reply-To: <20260929-kuno-soc-support-v7-0-530f62dc4020@oss.qualcomm.com> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Abel Vesa , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hardeep Sharma , Dmitry Baryshkov , Linus Walleij , Abel Vesa X-Mailer: b4 0.15-dev-47773 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790675315; l=12716; i=hardeep.sharma@oss.qualcomm.com; s=20260204; h=from:subject:message-id; bh=AfHO8BmKa55rMJwC9Z6OIJCGOHxcreSI1r4oQXYYJlg=; b=OqDzP8VEwoDOXei9+ajzF5PoPQ9stRbrtHyru15+6RAFOdyPSpbZS1/l3gom22avDBB6Ivfmf 8cXmsjqcPFYByYyOiQxb0twWH0WLJzUmM6fkyxCDu9nS3T1hc3vBsTY X-Developer-Key: i=hardeep.sharma@oss.qualcomm.com; a=ed25519; pk=IvwPDKA2xr6jWaCIBBY2ran/H0124QUzVfun+CtEikM= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI5MDAzOCBTYWx0ZWRfX0M2y5H7E05yM bKPpP55praM68tZ56T38W2UWwb/jOSAiMIxT6EO3NEbLyeOVmFoUmrcf9Vas1awHskR3HtPP9np QYku/2T+n7hLf5FY8fSrUmJe7FUZnrDYe6zpdIqViAFGt+dCIZtBFQFWMUj4JgfSNDhso49mXsj ZDTEz0HvW3yR5orDVsfc+0ggb77HTUXLdBC32dgTAlQgX6eXdTVHrZE5yI0El10VeEjJVkRDf/X S82LRa4FVAxWaksKC0KfyT6U0dBfgpPHspLRAymInaAF2AA+Vq8pd95YIgYFfSXzEx3fCii6BFZ 2YoGua/YBIctoQ+kKRaQeN2M+kckUUQz1a8CuUIr+eoBfoQnmjpzCJnExLj8sHkTsWrbt+Uwywy CtxZT6fL2wkXkue6GfCsz8PdfAvcNXJ8CWv9i7crnqtVv6c5J7OPa0WsBVtzEt3i83k6UOz7dmH jguEedPc2axTYP9nveA== X-Authority-Analysis: v=2.4 cv=FJSOVOos c=1 sm=1 tr=0 ts=6abb8983 cx=c_pps a=kVLUcbK0zfr7ocalXnG1qA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=9-UI-1Rtod8VBy9dXc4A:9 a=QEXdDO2ut3YA:10 a=vr4QvYf-bLy2KjpDp97w:22 X-Proofpoint-ORIG-GUID: A4VNYIl0Pelrj-U4ISyMkfS3GYQk3Zlp X-Proofpoint-GUID: A4VNYIl0Pelrj-U4ISyMkfS3GYQk3Zlp X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI5MDAzOCBTYWx0ZWRfX47q5LEknRRCI BIZbYivYce75pBvEHPhB0NxeB2Gxg2V0mz9ZJb+cusRPO8QtWqqB15azr6imOhe0pMGdMFy8Pkg zZjioVNR32BctFfSmB/0fsQ+x8IBlok= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-29_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 clxscore=1015 malwarescore=0 bulkscore=0 lowpriorityscore=0 phishscore=0 suspectscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609290038 Add SoC-level DTSI (qcom-kuno.dtsi) and IDP board DTS (qcom-kuno-idp.dts) for the Qualcomm Kuno SoC. Peripherals included in this initial set: - Single Cortex-A7 CPU with PSCI idle states - RPMh RSC with clock controller, power domains, and BCM voter - GCC (Global Clock Controller) - TLMM pin controller (110 GPIOs) - Interconnect (aggre-noc, cnoc-main) - GENI UART console (QUP SE3) - SMEM, hardware spinlocks (TCSR mutex) Reviewed-by: Dmitry Baryshkov Reviewed-by: Linus Walleij Reviewed-by: Abel Vesa Signed-off-by: Hardeep Sharma --- arch/arm/boot/dts/qcom/Makefile | 1 + arch/arm/boot/dts/qcom/qcom-kuno-idp.dts | 25 ++ arch/arm/boot/dts/qcom/qcom-kuno.dtsi | 444 +++++++++++++++++++++++++++= ++++ 3 files changed, 470 insertions(+) diff --git a/arch/arm/boot/dts/qcom/Makefile b/arch/arm/boot/dts/qcom/Makef= ile index 026d5b682b2b..7327a7b8180e 100644 --- a/arch/arm/boot/dts/qcom/Makefile +++ b/arch/arm/boot/dts/qcom/Makefile @@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_QCOM) +=3D \ qcom-ipq4019-ap.dk07.1-c2.dtb \ qcom-ipq8064-ap148.dtb \ qcom-ipq8064-rb3011.dtb \ + qcom-kuno-idp.dtb \ qcom-msm8226-microsoft-dempsey.dtb \ qcom-msm8226-microsoft-makepeace.dtb \ qcom-msm8226-microsoft-moneypenny.dtb \ diff --git a/arch/arm/boot/dts/qcom/qcom-kuno-idp.dts b/arch/arm/boot/dts/q= com/qcom-kuno-idp.dts new file mode 100644 index 000000000000..c2f6650d3fe6 --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-kuno-idp.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +/dts-v1/; + +#include "qcom-kuno.dtsi" + +/ { + model =3D "Qualcomm Technologies, Inc. Kuno IDP"; + compatible =3D "qcom,kuno-idp", "qcom,kuno"; + + aliases { + serial0 =3D &uart3; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; +}; + +&uart3 { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/qcom/qcom-kuno.dtsi b/arch/arm/boot/dts/qcom= /qcom-kuno.dtsi new file mode 100644 index 000000000000..9b111525e12b --- /dev/null +++ b/arch/arm/boot/dts/qcom/qcom-kuno.dtsi @@ -0,0 +1,444 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include + +/ { + #address-cells =3D <1>; + #size-cells =3D <1>; + interrupt-parent =3D <&intc>; + + clocks { + xo_board: xo-board { + compatible =3D "fixed-clock"; + clock-frequency =3D <38400000>; + #clock-cells =3D <0>; + }; + + sleep_clk: sleep-clk { + compatible =3D "fixed-clock"; + clock-frequency =3D <32000>; + #clock-cells =3D <0>; + }; + }; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "arm,cortex-a7"; + reg =3D <0x0>; + enable-method =3D "psci"; + cpu-idle-states =3D <&little_cpu_sleep_0>, + <&little_cpu_sleep_1>; + power-domains =3D <&cpu_pd0>; + power-domain-names =3D "psci"; + }; + + idle-states { + entry-method =3D "psci"; + + little_cpu_sleep_0: cpu-sleep-0 { + compatible =3D "arm,idle-state"; + idle-state-name =3D "standalone-pc"; + entry-latency-us =3D <350>; + exit-latency-us =3D <450>; + min-residency-us =3D <1774>; + arm,psci-suspend-param =3D <0x40000003>; + local-timer-stop; + }; + + little_cpu_sleep_1: cpu-sleep-1 { + compatible =3D "arm,idle-state"; + idle-state-name =3D "pc"; + entry-latency-us =3D <550>; + exit-latency-us =3D <750>; + min-residency-us =3D <6700>; + arm,psci-suspend-param =3D <0x40000004>; + local-timer-stop; + }; + }; + + domain-idle-states { + cluster_sleep_0: cluster-sleep-0 { + compatible =3D "domain-idle-state"; + idle-state-name =3D "cx-min"; + entry-latency-us =3D <750>; + exit-latency-us =3D <2350>; + min-residency-us =3D <9144>; + arm,psci-suspend-param =3D <0x40000008>; + }; + }; + }; + + firmware { + scm { + compatible =3D "qcom,scm-kuno", "qcom,scm"; + }; + }; + + memory { + device_type =3D "memory"; + /* Bootloader will fill base and size */ + reg =3D <0x0 0x0>; + }; + + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + + cpu_pd0: power-domain-cpu0 { + #power-domain-cells =3D <0>; + power-domains =3D <&cluster_pd>; + }; + + cluster_pd: power-domain-cluster { + #power-domain-cells =3D <0>; + domain-idle-states =3D <&cluster_sleep_0>; + }; + }; + + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + quickboot@82100000 { + reg =3D <0x82100000 0x100000>; + no-map; + }; + + aop-image@82200000 { + reg =3D <0x82200000 0x20000>; + no-map; + }; + + aop-cmd-db@82220000 { + compatible =3D "qcom,cmd-db"; + reg =3D <0x82220000 0x20000>; + no-map; + }; + + aop-config@82240000 { + reg =3D <0x82240000 0x20000>; + no-map; + }; + + uefi-log@82260000 { + reg =3D <0x82260000 0x10000>; + no-map; + }; + + ipa-fw@82270000 { + reg =3D <0x82270000 0x10000>; + no-map; + }; + + smem@82280000 { + compatible =3D "qcom,smem"; + reg =3D <0x82280000 0xc0000>; + hwlocks =3D <&tcsr_mutex 3>; + no-map; + }; + + tme-crashdump@82340000 { + reg =3D <0x82340000 0x40000>; + no-map; + }; + + tme-log@82380000 { + reg =3D <0x82380000 0x4000>; + no-map; + }; + + access-control-db@82384000 { + reg =3D <0x82384000 0x40000>; + no-map; + }; + + secdata@823c4000 { + reg =3D <0x823c4000 0x1000>; + no-map; + }; + + modem-efs@823c5000 { + reg =3D <0x823c5000 0x10000>; + no-map; + }; + + cpucp-fw@82400000 { + reg =3D <0x82400000 0x80000>; + no-map; + }; + + xbl-dt-log@824c0000 { + reg =3D <0x824c0000 0x20000>; + no-map; + }; + + qtee@82500000 { + reg =3D <0x82500000 0x180000>; + no-map; + }; + + trusted-apps@82680000 { + reg =3D <0x82680000 0x600000>; + no-map; + }; + + mpss-audio@82e00000 { + reg =3D <0x82e00000 0x5a00000>; + no-map; + }; + }; + + soc: soc { + compatible =3D "simple-bus"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + gcc: clock-controller@80000 { + compatible =3D "qcom,kuno-gcc"; + reg =3D <0x00080000 0x1f4200>; + clocks =3D <&rpmhcc RPMH_CXO_CLK>, + <&rpmhcc RPMH_CXO_CLK_A>, + <&sleep_clk>, + <0>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + #power-domain-cells =3D <1>; + }; + + qup0: geniqup@9c0000 { + compatible =3D "qcom,geni-se-qup"; + reg =3D <0x009c0000 0x2000>; + clocks =3D <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + clock-names =3D "m-ahb", "s-ahb"; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + uart3: serial@98c000 { + compatible =3D "qcom,geni-debug-uart"; + reg =3D <0x0098c000 0x4000>; + interrupts =3D ; + clocks =3D <&gcc GCC_QUPV3_WRAP0_S3_CLK>; + clock-names =3D "se"; + pinctrl-0 =3D <&uart_console_active>; + pinctrl-1 =3D <&uart_console_sleep>; + pinctrl-names =3D "default", "sleep"; + + status =3D "disabled"; + }; + }; + + cnoc_main: interconnect@1580000 { + compatible =3D "qcom,kuno-cnoc-main"; + reg =3D <0x01580000 0x19200>; + #interconnect-cells =3D <1>; + qcom,bcm-voters =3D <&apps_bcm_voter>; + }; + + aggre_noc: interconnect@1640000 { + compatible =3D "qcom,kuno-aggre-noc"; + reg =3D <0x01640000 0x33400>; + clocks =3D <&gcc GCC_SYS_NOC_USB_SF_AXI_CLK>, + <&rpmhcc RPMH_IPA_CLK>; + #interconnect-cells =3D <1>; + qcom,bcm-voters =3D <&apps_bcm_voter>; + }; + + tcsr_mutex: hwlock@1f40000 { + compatible =3D "qcom,tcsr-mutex"; + reg =3D <0x01f40000 0x40000>; + #hwlock-cells =3D <1>; + }; + + pdc: interrupt-controller@b220000 { + compatible =3D "qcom,kuno-pdc", "qcom,pdc"; + reg =3D <0x0b220000 0x10000>; + qcom,pdc-ranges =3D <1 148 6>, + <9 156 2>, + <17 164 7>, + <26 173 1>, + <29 176 1>, + <40 187 1>, + <46 193 6>, + <52 266 32>, + <84 249 1>, + <85 256 1>, + <86 315 4>, + <90 43 1>, + <91 45 1>, + <92 154 2>, + <94 158 6>, + <100 171 2>, + <102 174 1>, + <103 23 7>, + <110 147 1>, + <111 31 4>, + <115 175 1>, + <116 177 10>, + <126 188 5>; + #interrupt-cells =3D <2>; + interrupt-parent =3D <&intc>; + interrupt-controller; + }; + + restart@c264000 { + compatible =3D "qcom,pshold"; + reg =3D <0x0c264000 0x1000>; + }; + + tlmm: pinctrl@f000000 { + compatible =3D "qcom,kuno-tlmm"; + reg =3D <0x0f000000 0x400000>; + interrupts =3D ; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&tlmm 0 0 110>; + interrupt-controller; + #interrupt-cells =3D <2>; + wakeup-parent =3D <&pdc>; + + uart_console_active: uart-console-active-state { + pins =3D "gpio8", "gpio9"; + function =3D "qup0_se3_mira"; + drive-strength =3D <2>; + bias-disable; + }; + + uart_console_sleep: uart-console-sleep-state { + pins =3D "gpio8", "gpio9"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + intc: interrupt-controller@17000000 { + compatible =3D "qcom,msm-qgic2"; + reg =3D <0x17000000 0x1000>, + <0x17002000 0x1000>; + interrupt-controller; + #interrupt-cells =3D <3>; + }; + + timer@17020000 { + compatible =3D "arm,armv7-timer-mem"; + reg =3D <0x17020000 0x1000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + frame@17021000 { + reg =3D <0x17021000 0x1000>, + <0x17022000 0x1000>; + frame-number =3D <0>; + interrupts =3D , + ; + }; + }; + + apps_rsc: rsc@17040000 { + compatible =3D "qcom,rpmh-rsc"; + reg =3D <0x17040000 0x10000>, + <0x17050000 0x10000>, + <0x17060000 0x10000>; + reg-names =3D "drv-0", + "drv-1", + "drv-2"; + interrupts =3D , + /* drv-1: placeholder (unused) */ + , + ; + qcom,tcs-offset =3D <0xd00>; + qcom,drv-id =3D <2>; + qcom,tcs-config =3D , + , + , + ; + power-domains =3D <&cluster_pd>; + + rpmhcc: clock-controller { + compatible =3D "qcom,kuno-rpmh-clk"; + clocks =3D <&xo_board>; + clock-names =3D "xo"; + #clock-cells =3D <1>; + }; + + rpmhpd: power-controller { + compatible =3D "qcom,kuno-rpmhpd"; + #power-domain-cells =3D <1>; + operating-points-v2 =3D <&rpmhpd_opp_table>; + + rpmhpd_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + rpmhpd_opp_ret: opp1 { + opp-level =3D ; + }; + + rpmhpd_opp_min_svs: opp2 { + opp-level =3D ; + }; + + rpmhpd_opp_low_svs: opp3 { + opp-level =3D ; + }; + + rpmhpd_opp_svs: opp4 { + opp-level =3D ; + }; + + rpmhpd_opp_svs_l1: opp5 { + opp-level =3D ; + }; + + rpmhpd_opp_nom: opp6 { + opp-level =3D ; + }; + + rpmhpd_opp_nom_l1: opp7 { + opp-level =3D ; + }; + + rpmhpd_opp_nom_l2: opp8 { + opp-level =3D ; + }; + + rpmhpd_opp_turbo: opp9 { + opp-level =3D ; + }; + + rpmhpd_opp_turbo_l1: opp10 { + opp-level =3D ; + }; + }; + }; + + apps_bcm_voter: bcm-voter { + compatible =3D "qcom,bcm-voter"; + }; + }; + }; + + timer { + compatible =3D "arm,armv7-timer"; + interrupts =3D , + , + , + ; + }; +}; --=20 2.43.0