From nobody Fri Oct 2 09:22:52 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BD44D3A6F04 for ; Mon, 28 Sep 2026 06:09:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575786; cv=none; b=nBrMnOW0I0pG+Xm4EhtP3ytzecqgDRyyA84Zku2zpL3NZmjbcc/eu2+3NNF5xuaDqoZvV5IESqSJ7S7JhKDHwq9aNX9HlHutvfjvcsUXwDcvvR+ZQ0WGmfmDkU6cv3Kg4B0SoxO9cIyuqlpLhvAm5Sc03XXYr7x7RYgF4APhh7w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575786; c=relaxed/simple; bh=3jZJCDBmdKair7R/qKaAWXxKmatvkMOd5u4ong8jp54=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PhuTZZMalPeRuRpvzH5nmb5GI8YZLH3OGF1ADPWQ5yBSg4icHBFoAd+d710NWf6VNUota9nTfhjIew4sM8v95R1YCtuDFfIrlReMo847UjbDQ92+5lb4MiGoCgkIpjTGj1xJuX+VLqYO0+doIiRuVThcLlbvpTGwhXwhbp/4FDs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Qu6vcqH7; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=QOswu39z; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Qu6vcqH7"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="QOswu39z" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68RJP2KK3891648 for ; Mon, 28 Sep 2026 06:09:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 8+ql9HRxwiF7Hsvr+2veecKSO1rWsvRUfuJvm2uvKQo=; b=Qu6vcqH7S4kRiMyv i07dUB9ZPuUXS2A1oPiLsOegxUYPHLPLw1wJ+OoJ7RNr0p3FF9+CmtRAhC6FUEfd zlUwZxAsVcDJJGmE5Je2B8gWng00cPxdjVKpB/aShU4U1S0psa29+ELZ364CKT6O UsejVbsaGWiqUk/jxZ/tmmRUvCRKkWsp68jmCZukO4J4dHxPRKoyA0BILvvEzKa7 Je3aXnJCxGZP25vNaxQQsu11VHTiRai5CWRa8fX0YHiBQwXp/zvZixE8EWUjm+vB U4grO12+/Z2w2Bf56XMRSHTot6X2G0OE4rY5IHcDAF2VbibXbSwDxrUm5BI1cZsY pxdcKQ== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gx526muas-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:09:43 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-39533bb224cso4056061a91.3 for ; Sun, 27 Sep 2026 23:09:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575783; x=1791180583; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=8+ql9HRxwiF7Hsvr+2veecKSO1rWsvRUfuJvm2uvKQo=; b=QOswu39zXZxFg5P0ZCwF4XIdzN4rRYaBTxX4bVUKqm+wtk7YKlS1JETFB1PJBfEtcu gfS3cAJkdqPO8LXx6Flc+ZnMnu6qGRo07q9fD1sRrY7XpOdnzNRlT3JZlquLscHv0DBA 7sHzLvqbZeS4azAzo/df+clmgqkL9jaFcuWvD+xwDSBtG1PEfKULMD6Rr5NpmgxzmsFn 2f1NnBBrJpJB5UAisBgEu9zrUeGtB4Z1P8LD4pS9cCx2Ft0mLB8zeG+jmUsSN+FedrLY QSZpmWdm2IvyQJ5CdyYQL7eKBhqnkH1r4pe6RKtrV3RpuJEcCGiZnym6wB8R1O9V48+K x7PQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575783; x=1791180583; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=8+ql9HRxwiF7Hsvr+2veecKSO1rWsvRUfuJvm2uvKQo=; b=aPOaEK25xP/ptMMcWN6RCJZPgh+2DC+EqkvwBe/toyls5pWu7l2VTjQ/dhk9xlOcS6 yrnRUCcRNbRFoLhphNOdNyqCV+aBC2L/1VhAHfdPirhpkSiFgph74XIFH5hWihOXOfEy IPrZMh7P6Y/g+t8g0wn4Rgrcy/5w7gTHSyWxsjvZpLwO0Lya7Uqg8EivhOviFOvJsZKn Gi8KzBYHX7XPuScwBmnkLDAna4FqAX6T6p0P4lYcw2U+j9nfgPLujH3i6fk0NR+XUfj8 8mmuapy9ydvK9AoiGq2lf9EidP1h05grb7dy7Rb1cE6gvQgQo48ScfROWSVaYVvdyfkU cfoQ== X-Forwarded-Encrypted: i=1; AKwUvBwVfHxnxVb60RphHiusIiyu1f7UuYYWy0Tt/ZNK7qfxJh5ktpRCnDeFNwfV06UMJs5VyoXS3ezeH9VkLAc=@vger.kernel.org X-Gm-Message-State: AFq9FYL6suT7LZ7WuUMo3yGqpOvBmLccTMFwNoRrilyvxM3Xpr09HYd4 6omcV+a1+Z95kj7eqTR5RipiCFnyMapmZghtj+RVY30HSz76hC0OeLikFv+vzU7Fber3s1TMVa8 J0RajSiqcBwCEMuCi6Br8fqDDxX/qEKevfa0E5BluQ3k7TOjFuDuW6vywa8OORR7cfA4= X-Gm-Gg: AYBFou000XH928p8y02F09GbLpEe7T/ioKHCbEM1GKlbwIy0umqj3FBXTkMvO2ny+dj IVsCxwht+Y/EeDAma56oncThzTB14PzthPRj/wlNYJN682pZmpVKc2rowJfCxx1RILjKBsmJqz/ 7VqmHgDPP9+eOsCn8lW+V27rxacATkQuJLJoMe8Nb6QTj3QwODGa8qpUETcBXa2/0G5v3JDz1Er FoMyBHvHzWJEKaEO84apYyj8mmUKfdlXktpf3LIB4Y/gMnujP6h1do2uQNFVlkSCrRAXV365x1N WxupIO0iP3uVDkGcScJM3hOl1Fi7fX8+dpTrXZ1PhU8Mgx3lST+sXPkWZ+bMOkxKUn44efhGw8P UgmBHbpeS6Y45VHTrcOd8sHl1k2aIgPCYkkeI X-Received: by 2002:a17:90b:184c:b0:39e:2e79:7ce7 with SMTP id 98e67ed59e1d1-3a098ad9d5amr9242811a91.6.1790575782684; Sun, 27 Sep 2026 23:09:42 -0700 (PDT) X-Received: by 2002:a17:90b:184c:b0:39e:2e79:7ce7 with SMTP id 98e67ed59e1d1-3a098ad9d5amr9242801a91.6.1790575782242; Sun, 27 Sep 2026 23:09:42 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.09.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:09:41 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:13 +0530 Subject: [PATCH v26 01/10] power: reset: reboot-mode: Support up to 3 magic values per mode Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-1-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=4572; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=3jZJCDBmdKair7R/qKaAWXxKmatvkMOd5u4ong8jp54=; b=QeAHZsAp20Q/jJCfU0sVRC8qYt8yx1L7bKt60XOL6rRI3iIvey7f0Eo5M5KzqJEpqT21hBH0Q gWQU/cZslhvCN8sZaKkCtwPVaE3vcptPiB9jjJgHgb1268rdRDxu5zl X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Authority-Analysis: v=2.4 cv=VvS2kO2n c=1 sm=1 tr=0 ts=6aba04a7 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=EUspDBNiAAAA:8 a=_usNffLPL2KliZ4tEdwA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-GUID: 1-hUkT4OkE8n7-rU73FVKc-qpqh4-THJ X-Proofpoint-ORIG-GUID: 1-hUkT4OkE8n7-rU73FVKc-qpqh4-THJ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX6yXt+ZygUobU qd0gJHWl50nST0AF9o9zd3B9GyPgvORK8LikUld/c+c+1V37N2l76cCNIaAGoUWV/UDemIeB89v jiSOEyemc1VPYhOhlJN8wp2K92HDdkwlPwZFfcyWl0S8qMzHwcFj6U/51CU9zkk92eQtbphSHaK HC/RFWAveM8ueulNKW272/KH9yuvC23Th//GR0e8MpfTI3o0SekQSSB8l22qnYajeOzaxtxf9rJ RT/kI++KK6jzXjE2RG/XeJVMTS51x9oXPzT1q7OYP+Ft0guf/Eb29Y8YbRpa0U70vx7Sf776zkr cdS19PQNkpLxsobBbhu7jHV2rE9PW/PyOaE+e0x8AKYQMBxDUVAccP6t6W58zzG/mOc/yOjGBR6 LA0kEkzqqcE4DMhI9t/EZ+HIUeJmBonppiFK1bEGVMTxgBnRs30X0uJgmgAMDTEhWIE4d6e1zCv FPCviFbvajeZAZtCaGQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX9y1PIAv0/zPu txBoSRo7AedpRdI4gY4+R670xbSjwdwQ+XX+1+4E6k6Sb8aFGqKX/Q1d7Lrx8nSX5MgvXB2f8re X7S8f6KahshjNB+5/j6xNkph+wCmq4k= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 clxscore=1015 priorityscore=1501 spamscore=0 malwarescore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 ARM PSCI vendor-specific resets, require a 32-bit reset_type and a 64-bit cookie as arguments. This cannot be implemented via the reboot-mode framework, which supports a single 32-bit argument as magic value. Extend the reboot-mode framework to support up to three 32-bit arguments as magic, per reboot-mode. Signed-off-by: Shivendra Pratap --- drivers/power/reset/reboot-mode.c | 46 +++++++++++++++++++++++++++--------= ---- include/linux/reboot-mode.h | 3 +++ 2 files changed, 35 insertions(+), 14 deletions(-) diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot= -mode.c index 3611bed341e1..328fa37598df 100644 --- a/drivers/power/reset/reboot-mode.c +++ b/drivers/power/reset/reboot-mode.c @@ -20,7 +20,8 @@ =20 struct mode_info { const char *mode; - u32 magic; + u32 magic[3]; + u32 count; struct list_head list; }; =20 @@ -72,8 +73,7 @@ static const struct class reboot_mode_class =3D { .dev_groups =3D reboot_mode_groups, }; =20 -static unsigned int get_reboot_mode_magic(struct reboot_mode_driver *reboo= t, - const char *cmd) +static struct mode_info *get_reboot_mode_info(struct reboot_mode_driver *r= eboot, const char *cmd) { const char *normal =3D "normal"; struct mode_info *info; @@ -84,11 +84,11 @@ static unsigned int get_reboot_mode_magic(struct reboot= _mode_driver *reboot, =20 list_for_each_entry(info, &reboot->head, list) if (!strcmp(info->mode, cmd)) - return info->magic; + return info; =20 /* try to match again, replacing characters impossible in DT */ if (strscpy(cmd_, cmd, sizeof(cmd_)) =3D=3D -E2BIG) - return 0; + return NULL; =20 strreplace(cmd_, ' ', '-'); strreplace(cmd_, ',', '-'); @@ -96,21 +96,25 @@ static unsigned int get_reboot_mode_magic(struct reboot= _mode_driver *reboot, =20 list_for_each_entry(info, &reboot->head, list) if (!strcmp(info->mode, cmd_)) - return info->magic; + return info; =20 - return 0; + return NULL; } =20 static int reboot_mode_notify(struct notifier_block *this, unsigned long mode, void *cmd) { struct reboot_mode_driver *reboot; - unsigned int magic; + struct mode_info *info; =20 reboot =3D container_of(this, struct reboot_mode_driver, reboot_notifier); - magic =3D get_reboot_mode_magic(reboot, cmd); - if (magic) - reboot->write(reboot, magic); + info =3D get_reboot_mode_info(reboot, cmd); + if (info && info->count) { + if (reboot->write_array) + reboot->write_array(reboot, info->magic, info->count); + else if (reboot->write && info->magic[0]) + reboot->write(reboot, info->magic[0]); + } =20 return NOTIFY_DONE; } @@ -173,16 +177,22 @@ int reboot_mode_register(struct reboot_mode_driver *r= eboot) struct property *prop; struct device_node *np =3D reboot->dev->of_node; size_t len =3D strlen(PREFIX); - u32 magic; + u32 magic[3]; + int count; int ret; =20 INIT_LIST_HEAD(&reboot->head); =20 for_each_property_of_node(np, prop) { + memset(magic, 0, sizeof(magic)); + if (strncmp(prop->name, PREFIX, len)) continue; =20 - if (device_property_read_u32(reboot->dev, prop->name, &magic)) { + count =3D device_property_count_u32(reboot->dev, prop->name); + + if (count <=3D 0 || count > ARRAY_SIZE(magic) || + device_property_read_u32_array(reboot->dev, prop->name, magic, count= )) { dev_dbg(reboot->dev, "reboot mode %s without magic number\n", prop->name); continue; @@ -194,7 +204,15 @@ int reboot_mode_register(struct reboot_mode_driver *re= boot) goto error; } =20 - info->magic =3D magic; + if (!memchr_inv(magic, 0, count * sizeof(u32))) { + dev_dbg(reboot->dev, "reboot mode %s with zero magic values\n", + prop->name); + info->count =3D 0; + } else { + memcpy(info->magic, magic, count * sizeof(u32)); + info->count =3D count; + } + info->mode =3D kstrdup_const(prop->name + len, GFP_KERNEL); if (!info->mode) { ret =3D -ENOMEM; diff --git a/include/linux/reboot-mode.h b/include/linux/reboot-mode.h index 4a2abb38d1d6..29ae39935d69 100644 --- a/include/linux/reboot-mode.h +++ b/include/linux/reboot-mode.h @@ -2,10 +2,13 @@ #ifndef __REBOOT_MODE_H__ #define __REBOOT_MODE_H__ =20 +#include + struct reboot_mode_driver { struct device *dev; struct list_head head; int (*write)(struct reboot_mode_driver *reboot, unsigned int magic); + int (*write_array)(struct reboot_mode_driver *reboot, const u32 *magic, i= nt count); struct notifier_block reboot_notifier; }; =20 --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA7EF3A169F for ; Mon, 28 Sep 2026 06:09:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575797; cv=none; b=kVb/1vlsE6Zmz9QMYJD6UPLWIuAxEwFLi+5ip2ocBh8GMBScAb7vy9hEsT9eppDa7QiyeduD1Ff4gr4ojhnCLD1YhdK8ketEx21zUPaTTeXO0VraigeJFep2nxc1bScX6ko+CfFZBA1wJdNG9ptSHo5gTw3BZSBed/HTEm07oFQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575797; c=relaxed/simple; bh=PrRAHImr6yIYsW7KLCHcHGI0oKMKMwPmNh0f+s4qJFU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=TCdWWOEPrLKJHRehOy9O95NpB7ls+g4EU+Vf+yNvnCI60dCZlGoWZnjJNqS7uwnevQ4ss4Fn4TV7eHBONwzd2vPRbIuglayaZk27UvBQ+qvrVOS5lcIPsYjJfMbFGtPsar/I3vPSAU6tjY5eA1AbVMouYcZYuuUldGuiLPRsLJo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=gse6erAt; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=ZekmQa13; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="gse6erAt"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="ZekmQa13" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S1G2W53993216 for ; Mon, 28 Sep 2026 06:09:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= UQixMKmo4tOht+KG0/AfOgWsqoDK9/2xnAOGm0oQgkM=; b=gse6erAtmra+Qkju elfPv/sjrqWQEMVbv8JPJuGq5PhkI5pIpRm0NYk33JPH6XqxpLhU6exeAg1OiHAL ZCafNQcaV08VXI814+b1IzfJqbrWr7HYBlCEcAqMTXXPMVUtW1uZTfMHtd/umd9b LNywOrFZe3Idx2//Tl5zltarbzm3LeadWJsp1tgL87JQAQMXWHAoLsx8cy25i+zX zULnTaipNB7ANrkxw2ZMR4Utp8Yq3Z49bWONwJMPnVAcaB+l0p0WeA8koA8UrcKz 573ARawlnI26LYeqMQsWzd9upsuAAxFx2eXMDEBodLaF0ztjIll+mT5tj/16H7hW peboEQ== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gx77jvmcc-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:09:54 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-38e8e864ef0so2926911a91.0 for ; Sun, 27 Sep 2026 23:09:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575794; x=1791180594; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=UQixMKmo4tOht+KG0/AfOgWsqoDK9/2xnAOGm0oQgkM=; b=ZekmQa13zbocfx4DRp/MTBhkSkyyQH3ZpXCE5up/+ofGImmqWh1gw4chFVNvJDOIxW L5k5S8Z+wMM84ulyptAexDLA5Wgff9/CoDr1cy77BU4rmT+xWvsYc2Fq0En4UBipR2KR NJecNB67sBS60fX5pNjfS9bbP8oWWDWvp/Bo9WEq2xekMudiOMwgjCuANAhgZsZwFNFd bqzpcARvAJFnWiYpA8G0dQmyTPrdZj2l5pB3nBRjQ7igTsEgm7nD+YnmHTYNbRYaHTvN 3d+Do9jItoHHVVWMmCtTf0jedFpH5NsBk9AZXMd2WvCfqgdcpynp4LCfk4HMqLkp1gKa ojcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575794; x=1791180594; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=UQixMKmo4tOht+KG0/AfOgWsqoDK9/2xnAOGm0oQgkM=; b=SME7AHjakIg/5oljiP/7TPinFWd1xentvQP6ByFXac/56oWFtCkZbxeFaRkgx64w1Y 3litrx7yQKT1dLi5dQRtvSq2KPqiZ2W98q0v2TmVGc6PS61WQ6zFBOjm0U3nBhNIAc1G W+e33NtyQm+1RMnCYVaIBV4J90NYwJCtz9mxy+ewavdDgQ6gRf99EczdX4/K+EdV7Scq IouTNsmXcfbFsqRkk7+xh13P2nKh0JTcQoiRONTFd8RKepa0UURMaWaYkLd1lOCT0dH+ j5g3JA+8oqF3P2TOAMh2wKguESWg1XwyPHididsZibsn7FMXOVQSuJ/gk3SKc3bFwCSM 2LqQ== X-Forwarded-Encrypted: i=1; AKwUvBzDGD9tmLIq0fHUli1bIbG0fd9X5g0Fe4M6BluB5ulaQ2nUPifDS2x0wVwW6JtYMyUbY9hNo7jlZFJBTHU=@vger.kernel.org X-Gm-Message-State: AFq9FYI3Bxbd6hCB3Hxkn1QYDHoXbd72NBa1r6oI0T9FpRo0URBv5cRy tqoj3w4oUxE6JwlR9XKfUlOt7pOnfhuC96ABPoacbP2qTfQ11nTegOygi9n5tqyayO2Rw841Sdn k4En3vgaUZ3A2y4k/j1oPJJ/yk0hRMlNh5Zubjqhkqjurk2OhI3CXzrk1QbJ6REhYGDQ= X-Gm-Gg: AYBFou02NWDJMqB9LCoFOprH+SjrpRy79dPWejTHR57dnZ1JO+QHeW7ncq6V86ro0Uy YK9e4OdeeEFwzSiCE1WCcTVp1R4L5S3GpNCpuY7bV15UTGUYmW0KvWBpc2R3Grp1bbTKUiKlDIG 5qEgSXj0gMVRtOcvt6dqUjZd/Oo1e9+WvqtoESVPZ97psfR7+sQNwvK7DLplV13IBq81I16DzM0 /P9oP3gcmAeH+sZGIy5/NvzNweEn14oISciy300K2JTSdtRBe25ugVUx9V5yyTaTW9YGEQbiSKZ njF9BKuBeR5v7zTE+CZR3D0zqJI3z1I+WKdsvSr/IOtsRFymeDxFbmnRLpH/MnZ/WYSVdbofbAe VHeEPA7UGic5sUQ5VlTV5S3/u0r2Ubcuk0I9n X-Received: by 2002:a17:90a:fc48:b0:3a4:7bd0:2821 with SMTP id 98e67ed59e1d1-3a47bd02e51mr233548a91.6.1790575794102; Sun, 27 Sep 2026 23:09:54 -0700 (PDT) X-Received: by 2002:a17:90a:fc48:b0:3a4:7bd0:2821 with SMTP id 98e67ed59e1d1-3a47bd02e51mr233518a91.6.1790575793551; Sun, 27 Sep 2026 23:09:53 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.09.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:09:52 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:14 +0530 Subject: [PATCH v26 02/10] power: reset: reboot-mode: Add support for predefined reboot modes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-2-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=12507; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=PrRAHImr6yIYsW7KLCHcHGI0oKMKMwPmNh0f+s4qJFU=; b=xbzG2eDF0HzfEQdZRvPxk4mlFdIoqiaqivT51k9hUtDx0fa2QCAPFYxII0CzbWFpz6YiFpzO9 4NvzNmVVfRbC4/Eh2+hKsDT0PxIT3LIkNlCrfdaoV8Ck4cvahcyFZpD X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfXwlAcRfkJhY7e UeRDIxh5FoaphTQs4Xu/MmOgivtSq4mFjVm0M+GP3HuCqAgfTqIHcen2f1bSZboUbOlFlrupu39 fegvclPNyKoLrU6qUB8tDxNnd38eDfY= X-Proofpoint-GUID: K2j1wRIxYAXJbmeo7MwyzIhPxTqWjkup X-Proofpoint-ORIG-GUID: K2j1wRIxYAXJbmeo7MwyzIhPxTqWjkup X-Authority-Analysis: v=2.4 cv=J8U/fwnS c=1 sm=1 tr=0 ts=6aba04b2 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=S_7UqdFmbgqGN4e7PDYA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfXyaymzq5EBG8b sMxKtnPsD4imJMbEKGtP1W+3lGnIe1JK99gRtkk5Kmh3r+HxZQz9irfE/AWfKcaSGKJY1Wh32Vj F60Zg51xxqjn9Wi55Nec9Rzb9Zny5nRvjXGgdxdc+9JuAFJD3sTm/Vm3ufvwlFQ0xxniGkM8UMA XRHBJf9fZEK2NuC4+ayhX5c3PdH1PLj5NADpXRh1esEI52Id8AHiercSDj5nOcdszH5+FlRhqzm qxZTYBimpsOpT+CX6ZUUcmlLy8VSpOcKWMcMDpWFi1YIspdhCCDrIMUbqqDj26VfAVJSLNmF9xw CHwdy2hFKKX4eOkgtVf0TmsFz5s0JPLgetAmu604vcHQDOu1iswGxf7sL8Zq36tpo7owGgkzV2l jxvNvAF4+LaXhtzpz0FqTjGqKCWwCZ2jMItj9+VmpreapndGri5Qo8HUx7aOiHKDWDVYL75hyff LCE0MSxOzn1cGBYFEuw== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 spamscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 suspectscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 reboot-mode based drivers can define a reboot-mode by adding it under the reboot-mode node in device tree. This limits such drivers, to define any predefined reboot-modes statically within the driver and creates a dependency on device-tree. Extend the reboot-mode framework to support driver-defined predefined reboot modes. Add a centralized initcall to initialize driver state along with predefined modes. Signed-off-by: Shivendra Pratap --- drivers/power/reset/nvmem-reboot-mode.c | 7 +- drivers/power/reset/qcom-pon.c | 7 +- drivers/power/reset/reboot-mode.c | 192 ++++++++++++++++++++++-----= ---- drivers/power/reset/syscon-reboot-mode.c | 7 +- include/linux/reboot-mode.h | 26 ++++- 5 files changed, 175 insertions(+), 64 deletions(-) diff --git a/drivers/power/reset/nvmem-reboot-mode.c b/drivers/power/reset/= nvmem-reboot-mode.c index d260715fccf6..700732ed0f5b 100644 --- a/drivers/power/reset/nvmem-reboot-mode.c +++ b/drivers/power/reset/nvmem-reboot-mode.c @@ -51,8 +51,11 @@ static int nvmem_reboot_mode_probe(struct platform_devic= e *pdev) if (!nvmem_rbm) return -ENOMEM; =20 - nvmem_rbm->reboot.dev =3D &pdev->dev; - nvmem_rbm->reboot.write =3D nvmem_reboot_mode_write; + ret =3D reboot_mode_driver_init(&nvmem_rbm->reboot, &pdev->dev, + nvmem_reboot_mode_write, NULL, + NULL, 0); + if (ret) + return ret; =20 nvmem_rbm->cell =3D devm_nvmem_cell_get(&pdev->dev, "reboot-mode"); if (IS_ERR(nvmem_rbm->cell)) { diff --git a/drivers/power/reset/qcom-pon.c b/drivers/power/reset/qcom-pon.c index 7e108982a582..f63996994a25 100644 --- a/drivers/power/reset/qcom-pon.c +++ b/drivers/power/reset/qcom-pon.c @@ -70,9 +70,12 @@ static int qcom_pon_probe(struct platform_device *pdev) reason_shift =3D (long)of_device_get_match_data(&pdev->dev); =20 if (reason_shift !=3D NO_REASON_SHIFT) { - pon->reboot_mode.dev =3D &pdev->dev; + error =3D reboot_mode_driver_init(&pon->reboot_mode, &pdev->dev, + qcom_pon_reboot_mode_write, NULL, + NULL, 0); + if (error) + return error; pon->reason_shift =3D reason_shift; - pon->reboot_mode.write =3D qcom_pon_reboot_mode_write; error =3D devm_reboot_mode_register(&pdev->dev, &pon->reboot_mode); if (error) { dev_err(&pdev->dev, "can't register reboot mode\n"); diff --git a/drivers/power/reset/reboot-mode.c b/drivers/power/reset/reboot= -mode.c index 328fa37598df..fd61de226383 100644 --- a/drivers/power/reset/reboot-mode.c +++ b/drivers/power/reset/reboot-mode.c @@ -30,12 +30,12 @@ struct reboot_mode_sysfs_data { struct list_head head; }; =20 -static inline void reboot_mode_release_list(struct reboot_mode_sysfs_data = *priv) +static void reboot_mode_release_list(struct list_head *head) { struct mode_info *info; struct mode_info *next; =20 - list_for_each_entry_safe(info, next, &priv->head, list) { + list_for_each_entry_safe(info, next, head, list) { list_del(&info->list); kfree_const(info->mode); kfree(info); @@ -119,6 +119,80 @@ static int reboot_mode_notify(struct notifier_block *t= his, return NOTIFY_DONE; } =20 +/** + * reboot_mode_driver_init - Initialize reboot-mode state + * @reboot: reboot mode driver object to initialize + * @dev: backing device + * @write: write callback to program a single magic value + * @write_array: write callback to program multiple magic values + * @predefined_modes: optional predefined reboot-mode table + * @predefined_mode_count: number of entries in @predefined_modes + * + * Exactly one write callback must be provided by the driver. + * + * This function must be called with a valid @dev before calling + * reboot_mode_register(). + * + * Returns: 0 on success or -EINVAL if callback/predefined mode configurat= ion + * is invalid. + */ +int reboot_mode_driver_init(struct reboot_mode_driver *reboot, + struct device *dev, + int (*write)(struct reboot_mode_driver *reboot, unsigned int magic), + int (*write_array)(struct reboot_mode_driver *reboot, + const u32 *magic, u32 count), + const struct reboot_mode_entry *predefined_modes, + size_t predefined_mode_count) +{ + if (!reboot || !dev) + return -EINVAL; + + if (!write =3D=3D !write_array) + return -EINVAL; + + memset(reboot, 0, sizeof(*reboot)); + reboot->dev =3D dev; + reboot->write =3D write; + reboot->write_array =3D write_array; + reboot->predefined_modes =3D predefined_modes; + reboot->predefined_mode_count =3D predefined_mode_count; + INIT_LIST_HEAD(&reboot->head); + + return 0; +} +EXPORT_SYMBOL_GPL(reboot_mode_driver_init); + +static struct mode_info *reboot_mode_create_info(struct device *dev, const= char *mode, + const u32 *magic, int count) +{ + struct mode_info *info; + + if (!mode || mode[0] =3D=3D '\0') { + dev_err(dev, "invalid mode name\n"); + return ERR_PTR(-EINVAL); + } + + info =3D kzalloc_obj(*info, GFP_KERNEL); + if (!info) + return ERR_PTR(-ENOMEM); + + info->mode =3D kstrdup_const(mode, GFP_KERNEL); + if (!info->mode) { + kfree(info); + return ERR_PTR(-ENOMEM); + } + + if (!memchr_inv(magic, 0, count * sizeof(u32))) { + dev_dbg(dev, "reboot mode %s with zero magic values\n", mode); + info->count =3D 0; + } else { + memcpy(info->magic, magic, count * sizeof(u32)); + info->count =3D count; + } + + return info; +} + static int reboot_mode_create_device(struct reboot_mode_driver *reboot) { struct reboot_mode_sysfs_data *priv; @@ -160,11 +234,38 @@ static int reboot_mode_create_device(struct reboot_mo= de_driver *reboot) return 0; =20 error: - reboot_mode_release_list(priv); + reboot_mode_release_list(&priv->head); kfree(priv); return ret; } =20 +static int reboot_mode_add_predefined_modes(struct reboot_mode_driver *reb= oot) +{ + const struct reboot_mode_entry *modes =3D reboot->predefined_modes; + struct mode_info *info; + size_t i; + + if (!modes) + return 0; + + for (i =3D 0; i < reboot->predefined_mode_count; i++) { + if (modes[i].name && strpbrk(modes[i].name, "\n ,/")) + return -EINVAL; + + if (!modes[i].count || modes[i].count > ARRAY_SIZE(modes[i].magic)) + return -EINVAL; + + info =3D reboot_mode_create_info(reboot->dev, modes[i].name, + modes[i].magic, modes[i].count); + if (IS_ERR(info)) + return PTR_ERR(info); + + list_add_tail(&info->list, &reboot->head); + } + + return 0; +} + /** * reboot_mode_register - register a reboot mode driver * @reboot: reboot mode driver @@ -173,7 +274,7 @@ static int reboot_mode_create_device(struct reboot_mode= _driver *reboot) */ int reboot_mode_register(struct reboot_mode_driver *reboot) { - struct mode_info *info =3D NULL; + struct mode_info *info; struct property *prop; struct device_node *np =3D reboot->dev->of_node; size_t len =3D strlen(PREFIX); @@ -183,52 +284,36 @@ int reboot_mode_register(struct reboot_mode_driver *r= eboot) =20 INIT_LIST_HEAD(&reboot->head); =20 - for_each_property_of_node(np, prop) { - memset(magic, 0, sizeof(magic)); - - if (strncmp(prop->name, PREFIX, len)) - continue; - - count =3D device_property_count_u32(reboot->dev, prop->name); - - if (count <=3D 0 || count > ARRAY_SIZE(magic) || - device_property_read_u32_array(reboot->dev, prop->name, magic, count= )) { - dev_dbg(reboot->dev, "reboot mode %s without magic number\n", - prop->name); - continue; - } - - info =3D kzalloc_obj(*info); - if (!info) { - ret =3D -ENOMEM; - goto error; - } - - if (!memchr_inv(magic, 0, count * sizeof(u32))) { - dev_dbg(reboot->dev, "reboot mode %s with zero magic values\n", - prop->name); - info->count =3D 0; - } else { - memcpy(info->magic, magic, count * sizeof(u32)); - info->count =3D count; - } - - info->mode =3D kstrdup_const(prop->name + len, GFP_KERNEL); - if (!info->mode) { - ret =3D -ENOMEM; - goto error; - } else if (info->mode[0] =3D=3D '\0') { - kfree_const(info->mode); - ret =3D -EINVAL; - dev_err(reboot->dev, "invalid mode name(%s): too short!\n", - prop->name); - goto error; + if (np) { + for_each_property_of_node(np, prop) { + memset(magic, 0, sizeof(magic)); + if (strncmp(prop->name, PREFIX, len)) + continue; + + count =3D device_property_count_u32(reboot->dev, prop->name); + + if (count <=3D 0 || count > ARRAY_SIZE(magic) || + device_property_read_u32_array(reboot->dev, prop->name, magic, coun= t)) { + dev_dbg(reboot->dev, "reboot mode %s without magic number\n", + prop->name); + continue; + } + + info =3D reboot_mode_create_info(reboot->dev, prop->name + len, + magic, count); + if (IS_ERR(info)) { + ret =3D PTR_ERR(info); + goto error; + } + + list_add_tail(&info->list, &reboot->head); } - - list_add_tail(&info->list, &reboot->head); - info =3D NULL; } =20 + ret =3D reboot_mode_add_predefined_modes(reboot); + if (ret) + goto error; + reboot->reboot_notifier.notifier_call =3D reboot_mode_notify; register_reboot_notifier(&reboot->reboot_notifier); =20 @@ -239,7 +324,6 @@ int reboot_mode_register(struct reboot_mode_driver *reb= oot) return 0; =20 error: - kfree(info); reboot_mode_unregister(reboot); return ret; } @@ -272,7 +356,7 @@ static inline void reboot_mode_unregister_device(struct= reboot_mode_driver *rebo if (!priv) return; =20 - reboot_mode_release_list(priv); + reboot_mode_release_list(&priv->head); kfree(priv); } =20 @@ -282,17 +366,11 @@ static inline void reboot_mode_unregister_device(stru= ct reboot_mode_driver *rebo */ int reboot_mode_unregister(struct reboot_mode_driver *reboot) { - struct mode_info *info; - struct mode_info *next; - unregister_reboot_notifier(&reboot->reboot_notifier); + reboot->reboot_notifier.notifier_call =3D NULL; reboot_mode_unregister_device(reboot); =20 - list_for_each_entry_safe(info, next, &reboot->head, list) { - list_del(&info->list); - kfree_const(info->mode); - kfree(info); - } + reboot_mode_release_list(&reboot->head); =20 return 0; } diff --git a/drivers/power/reset/syscon-reboot-mode.c b/drivers/power/reset= /syscon-reboot-mode.c index e0772c9f70f7..7d3a95e8dfd7 100644 --- a/drivers/power/reset/syscon-reboot-mode.c +++ b/drivers/power/reset/syscon-reboot-mode.c @@ -45,8 +45,11 @@ static int syscon_reboot_mode_probe(struct platform_devi= ce *pdev) if (!syscon_rbm) return -ENOMEM; =20 - syscon_rbm->reboot.dev =3D &pdev->dev; - syscon_rbm->reboot.write =3D syscon_reboot_mode_write; + ret =3D reboot_mode_driver_init(&syscon_rbm->reboot, &pdev->dev, + syscon_reboot_mode_write, NULL, + NULL, 0); + if (ret) + return ret; syscon_rbm->mask =3D 0xffffffff; =20 syscon_rbm->map =3D syscon_node_to_regmap(pdev->dev.parent->of_node); diff --git a/include/linux/reboot-mode.h b/include/linux/reboot-mode.h index 29ae39935d69..560d8b4d67ac 100644 --- a/include/linux/reboot-mode.h +++ b/include/linux/reboot-mode.h @@ -4,14 +4,38 @@ =20 #include =20 +struct reboot_mode_entry { + const char *name; + u32 magic[3]; + u32 count; +}; + struct reboot_mode_driver { struct device *dev; struct list_head head; + /* + * Optional predefined reboot-mode table. + * + * Must be initialized before reboot_mode_register() and remain valid + * until reboot_mode_unregister(). + * + * If a predefined mode name duplicates a DT-defined mode name, + * the DT-defined mode takes precedence. + */ + const struct reboot_mode_entry *predefined_modes; + size_t predefined_mode_count; + int (*write_array)(struct reboot_mode_driver *reboot, const u32 *magic, u= 32 count); int (*write)(struct reboot_mode_driver *reboot, unsigned int magic); - int (*write_array)(struct reboot_mode_driver *reboot, const u32 *magic, i= nt count); struct notifier_block reboot_notifier; }; =20 +int reboot_mode_driver_init(struct reboot_mode_driver *reboot, + struct device *dev, + int (*write)(struct reboot_mode_driver *reboot, unsigned int magic), + int (*write_array)(struct reboot_mode_driver *reboot, + const u32 *magic, u32 count), + const struct reboot_mode_entry *predefined_modes, + size_t predefined_mode_count); int reboot_mode_register(struct reboot_mode_driver *reboot); int reboot_mode_unregister(struct reboot_mode_driver *reboot); int devm_reboot_mode_register(struct device *dev, --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 242EC3A382F for ; Mon, 28 Sep 2026 06:10:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575808; cv=none; b=mg1uEiwWRKrBSHxIcI1tifTc8V5NTsXtOKzb6Gpe0Ll/rr2tq15yf+ST6CLQBvMmXAnOvtmSfK4uxSj1JzErL/R6sbN9U1R8A9gSdbuGg8KnZ2xPNgxrp2vdNZiyZDFxoCJZZxECcPcU0AEawXR6p2/zy6vfK6DLNWQXH0OwZm8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575808; c=relaxed/simple; bh=ePR4OuoTlUavycOVnXKN78dPp96WxpPQP3RUTs/YnxU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QGUUhdpl/HOmysPXa/qiDiLkLRxg0Otk3NxNHcRKBMBisokTJlQzr8Br99n2tqiMQhi4z9t7TrKI91x/mmWtyQ+FyLIv9nuqz6v7WXPYnTGhEHmthDiSNEhbpsKISQRa+TR8jIIm4LMftCV1CnNJ3u085r4leWHlFzkuBr9zXNI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Iv7cx0qX; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=V1bZRMPe; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Iv7cx0qX"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="V1bZRMPe" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S59SRx1501652 for ; Mon, 28 Sep 2026 06:10:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 6c7FsVt+6kZf0MJjLIZNdKyh8QTMehkeel45ASz2OUw=; b=Iv7cx0qX1gx7MWz1 WSCBwfI2KXy/oCxPYSdLE9KzjlFsVMJgZTqAtyWkjPe/rWV4KggO0qcT1WJdk7GK drS3tLzeS5PVbG6i5NrygohuGdoN1P3qYcRBZDgHqU/ftGQQVTTdiwxPfO2mKgLP XABYkF+DrsMpY7zPN1jcGDCWIMNwyZhncM2EOrcgQbxevzLlDeCnFSmhSqEoM9/H lLT60CiA8lAM+GzvgKGkS0b3oap2wIwkYZ87QyoQAeoH+/MBEYxkomL7788ZTs9b iww+MI5Z+ptw7G4kSBePbNxNYYIrN1UzmfnQQw5j+E/AazGsxd0n71LFAOKAaz1N FoxuFQ== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gyhubg5rq-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:10:05 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-39d865b11b4so3264297a91.3 for ; Sun, 27 Sep 2026 23:10:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575804; x=1791180604; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=6c7FsVt+6kZf0MJjLIZNdKyh8QTMehkeel45ASz2OUw=; b=V1bZRMPedb4lzYUX+iEg/7cRc5zmQVYUabufPIcobELNaiQ1UoLMbIWQeZlKMyC3vI QH3SNgeFClw2KaGFLGwBSy8e6DwJ7fb5rkT+Dl4a2f1ypBo0lV0GsvRx5Nbx4LkGSfKk mso76rqkO5lrSt6+teVco146Pa2PCGen599aXjaqVBAFlTDEpXrtvDJF8CugdO4Grc3p wqZUlYNQFicB8w8oGkNqmwyvM2i3HAdYQ3UKsP7mG3zlEGA+SjOl/65M4073SiioqfiP zM3yJRT4eGe8nh/z4dg0Om+b3HdsnS8tz477tH55hylSpZZFvXIGzrCYBo2gkLzp/o0b h3PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575804; x=1791180604; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=6c7FsVt+6kZf0MJjLIZNdKyh8QTMehkeel45ASz2OUw=; b=qRoXVtbAI+eFknNX8yYrWNrr4h7hRlIo+sa2YP5PmFN6XfzkJSgH1mAPZa4d2McLS6 gSA+HY+FV2ugAebImtc/aXTbHXow2oilI4PPDj9/RhPCDEEkkqVwLXKPJkNDVAKXa6mB NrH7nIC+Hi3xNWJmgS75NVFQRS0oeMV2C0EX0nDfIdMetnZFnOw0uleYadcKOYNdrsEX TBFeNhluvIPsSwmv1iEgzZaAWJxSCwFNsTCOkG9lmiMFx8DonpzLAr5dm6g019Fyaykw PpqdAwC4dFUq3FkdaoUvXlJK0NRgk6gnKDa8qo/kYztlL7uHT420juvyL2Bz1yB5D29J l7DQ== X-Forwarded-Encrypted: i=1; AKwUvBzDOP6WeOIykJO6LzJyJKNasCpeJOvHMHOQ8b101/1c5dD2yhoABokqzE8DZKYZEm7HQiy5X+T4XznqJ24=@vger.kernel.org X-Gm-Message-State: AFq9FYJczAqlI0GQ5kwdZ2lRY6UkqpCSFcQxANPcVo/7ARm+GTrPGoCo wcECJJ7P0N40m4uaiBBhrnLxvn8vUn2UZ8gvcatrCYLEisp3CM3RPJ30r8+WwHdP4seclF3wMB2 BPgOQ0ZKTl9zLZNtvCqfEdu/v5XNRbl8Yljc/9v8lg2AWog2R+p6+Iqqn8KcXoIVqGqo= X-Gm-Gg: AYBFou1uKtRP4oWjfiXEYB2YFP2PHV8TUpkXIF1dzAuvfWpbbQ4mZzR6y5TI5k3TNae B09F000127GASrZmtzEZn76Q7PwGuzIt94xH6IZRqsoJKNe2PAsJBE28j982soXNz9dEwbsXhb1 ER2AfNE+JLl20J2m5ESAWxqa6fiiH/sH5bi8ghu+RJBPDx6NIr5jG/M8EFhadSwK97J8fzFQ6Sx MVTdEu2nLS3IhM2PeJF+GoYKfWu6bPy4j9XtMRFEHrxAjS559F1sTQVg+l50FDB5pg/BItrTgxL wC9ciXEXAABVd1RdqwUJH1Tyi8mZRZi01CYDoQ7qAg0jqJBHnjjMV70corX+7MLvDHvWmefdKvH +gKo2L7kS1RTmquxd30j20gU6MQTMAHEtod4u X-Received: by 2002:a17:90b:3888:b0:3a0:cc33:2287 with SMTP id 98e67ed59e1d1-3a0cc3324ccmr6288158a91.6.1790575804340; Sun, 27 Sep 2026 23:10:04 -0700 (PDT) X-Received: by 2002:a17:90b:3888:b0:3a0:cc33:2287 with SMTP id 98e67ed59e1d1-3a0cc3324ccmr6288122a91.6.1790575803829; Sun, 27 Sep 2026 23:10:03 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.09.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:10:03 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:15 +0530 Subject: [PATCH v26 03/10] firmware: psci: Introduce command-based resets Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-3-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=8099; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=ePR4OuoTlUavycOVnXKN78dPp96WxpPQP3RUTs/YnxU=; b=GxnsJNhmONXIPvOcYSq9f3MtvcokFzprH757PwLANhDRUhmbthb2ITWlhn8L+U+kczUilSCAA AGrmTNDr15kCs6TsLosRm8AC9SVkbqj/4vxhMgZwkABCpu5moTT9X/j X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-GUID: 0Tq219x8sYqaB213bbIS_ZiUzyHFnbEt X-Authority-Analysis: v=2.4 cv=C7F8WgP+ c=1 sm=1 tr=0 ts=6aba04bd cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8 a=njxsUegImOJjkw56WvUA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-ORIG-GUID: 0Tq219x8sYqaB213bbIS_ZiUzyHFnbEt X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX8ub6V0UuKmtN +lWaP7/W0z6EQw1Wev3cxVTfsbt4+2FctzO+EH6bV81rULkPHSpNKyynOmGJ75URJ/AGR9oqhCy 6uo5sY4hsdPzP+Xepula+xONCDGiCdtuAhEs38whDkYwg7kv4cJ1Gft/brc1dPiZmlCU9jJ8zEd xGFS3KFazQq8xwJhyCPEFMaavRS9piBk5vk4i9eKF2Fmitsy3g1aAlsSWzOjypOLd3KDk/GtOXf R8lU8iAIDw8JU5Bh9cGYeLk5F5n/bvqdDvqrM9REpvqA6uRSvKucZMEaDKPIi5z4M0Xdh8KCnOO jJ7UfQnFJDZSWOq2fmooI/1GMA3BXTTgMsxVmSTQ4I/nN8AAYz79zXH5JTL2gkynlQO2ge+w03i lXYYyiHPzghCCiKoJWPQ36sQ/cD44lZbv1dIlyyQGf5h2dGAkS56eHW0jScyNtfveB5CbPnO3vW 3sQUitNp+3rN7Q+tpJw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX1Of1wWbah46k 1LrdLdiXZGFA75n1nN2DMGWoNzOgxzAV5ptmxKYS84kVvl0vUq4zkeYfq6OhYovzcrsYLEIkFGm qvpOUJunLOwkyBSpvSFKYFruzASxD18= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 impostorscore=0 adultscore=0 suspectscore=0 spamscore=0 malwarescore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 PSCI currently supports only two resets - SYSTEM_RESET and SYSTEM_RESET2 ARCH WARM reset. The reset patch is selected based on the Linux reboot_mode variable. The PSCI specification now includes SYSTEM_RESET2 for vendor-specific resets but there's no mechanism to issue these through psci_sys_reset(). Add a command-based reset mechanism that allows reboot-mode drivers to set the PSCI reset command by passing a reset_type and a cookie. Add support for the following reset commands: - SYSTEM_RESET2 vendor-specific resets. - SYSTEM_RESET2 ARCH WARM reset and SYSTEM_RESET (reset_type =3D 0 and cookie one of psci_standard_resets). Unsupported commands fall back to the regular PSCI reset path. Default to the existing reboot_mode-based reset flow unless a reset command is configured. If a kernel panic() or a emergency_restart() occurs after a reset command is set but before the final PSCI reset is issued, ignore the reset command and follow the normal reboot_mode-based reset path. Signed-off-by: Shivendra Pratap --- drivers/firmware/psci/psci.c | 117 +++++++++++++++++++++++++++++++++++++++= +++- include/linux/psci.h | 15 ++++++ 2 files changed, 130 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index e73bae6cb23a..d489ba5d147c 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -11,17 +11,22 @@ #include #include #include +#include #include +#include #include +#include #include #include #include #include #include #include +#include =20 #include =20 +#include #include #include #include @@ -51,6 +56,15 @@ static int resident_cpu =3D -1; struct psci_operations psci_ops; static enum arm_smccc_conduit psci_conduit =3D SMCCC_CONDUIT_NONE; =20 +struct psci_system_reset_cmd { + u32 reset_type; + u64 cookie; +}; + +static struct psci_system_reset_cmd reset_cmd_data; +static struct psci_system_reset_cmd *reset_cmd; +static DEFINE_MUTEX(reset_cmd_mutex); + bool psci_tos_resident_on(int cpu) { return cpu =3D=3D resident_cpu; @@ -80,6 +94,64 @@ static u32 psci_cpu_suspend_feature; static bool psci_system_reset2_supported; static bool psci_system_off2_hibernate_supported; =20 +static u32 psci_get_sys_reset_fn(const struct psci_system_reset_cmd *cmd) +{ + switch (cmd->cookie) { + case PSCI_SYSTEM_RESET2_ARCH_WARM_RESET: + if (psci_system_reset2_supported) + return PSCI_FN_NATIVE(1_1, SYSTEM_RESET2); + return 0; + case PSCI_SYSTEM_RESET_COLD_RESET: + return PSCI_0_2_FN_SYSTEM_RESET; + default: + return 0; + } +} + +/** + * psci_set_reset_cmd() - Configure the PSCI reset command + * @reset_type: PSCI SYSTEM_RESET2 reset_type, or 0 for a standard reset s= elector + * @cookie: Vendor-defined SYSTEM_RESET2 cookie, or a value from + * enum psci_standard_resets when @reset_type is 0 + * + * For vendor-specific SYSTEM_RESET2 resets, @reset_type and @cookie + * must contain platform-defined values. + * + * For standard resets, @reset_type must be 0 and @cookie must be a + * value from enum psci_standard_resets. + * + * The reset command may be configured only once per boot cycle. + */ +int psci_set_reset_cmd(u32 reset_type, u64 cookie) +{ + if (!reset_type && !cookie) + return -EINVAL; + + if (!IS_ENABLED(CONFIG_64BIT) && upper_32_bits(cookie)) + return -EINVAL; + + scoped_guard(mutex, &reset_cmd_mutex) { + if (reset_cmd) + return -EBUSY; + + reset_cmd_data.reset_type =3D reset_type; + reset_cmd_data.cookie =3D cookie; + /* + * Publish the command only after both fields are fully initialized. + * Readers run from the atomic restart notifier path and must not block. + */ + smp_store_release(&reset_cmd, &reset_cmd_data); + } + + return 0; +} + +bool psci_has_system_reset2_support(void) +{ + return psci_system_reset2_supported; +} +EXPORT_SYMBOL_NS_GPL(psci_has_system_reset2_support, "PSCI"); + static inline bool psci_has_ext_power_state(void) { return psci_cpu_suspend_feature & @@ -306,8 +378,25 @@ static int get_set_conduit_method(const struct device_= node *np) return 0; } =20 -static int psci_sys_reset(struct notifier_block *nb, unsigned long action, - void *data) +static void psci_handle_reset_cmd(const struct psci_system_reset_cmd *cmd) +{ + u32 psci_sys_reset_fn; + + /* PSCI_1_1_RESET_TYPE_VENDOR_START identifies vendor reset types. */ + if ((cmd->reset_type & PSCI_1_1_RESET_TYPE_VENDOR_START) && + psci_system_reset2_supported) { + /* PSCI SYSTEM_RESET2 Vendor-specific reset */ + invoke_psci_fn(PSCI_FN_NATIVE(1_1, SYSTEM_RESET2), + cmd->reset_type, cmd->cookie, 0); + } else { + /* Retrieve the psci reset function from reset_cmd */ + psci_sys_reset_fn =3D psci_get_sys_reset_fn(cmd); + if (!cmd->reset_type && psci_sys_reset_fn) + invoke_psci_fn(psci_sys_reset_fn, 0, 0, 0); + } +} + +static void psci_handle_reboot_mode(void) { if ((reboot_mode =3D=3D REBOOT_WARM || reboot_mode =3D=3D REBOOT_SOFT) && psci_system_reset2_supported) { @@ -320,6 +409,30 @@ static int psci_sys_reset(struct notifier_block *nb, u= nsigned long action, } else { invoke_psci_fn(PSCI_0_2_FN_SYSTEM_RESET, 0, 0, 0); } +} + +static int psci_sys_reset(struct notifier_block *nb, unsigned long action, + void *data) +{ + const struct psci_system_reset_cmd *cmd; + + /* The function psci_handle_reboot_mode follows reboot_mode based + * reset flow and psci_handle_reset_cmd uses reset_cmd based reset flow. + * + * The reset_cmd is configured at the reboot_notifier phase. + * If panic() or emergency_restart() occurs between the reboot_notifier + * and this final reset, skip command-based reset and let reboot_mode dri= ve + * the reset flow. + * + * The function psci_handle_reset_cmd invokes non-returning PSCI SYSTEM_R= ESET + * calls to reset the device. If it returns, either the reset failed, or = the + * command was unsupported. Fallback to reboot_mode based reset flow. + */ + cmd =3D smp_load_acquire(&reset_cmd); + if (data && cmd && !panic_in_progress()) + psci_handle_reset_cmd(cmd); + + psci_handle_reboot_mode(); =20 return NOTIFY_DONE; } diff --git a/include/linux/psci.h b/include/linux/psci.h index 4ca0060a3fc4..e81b1cdeca51 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -8,6 +8,7 @@ #define __LINUX_PSCI_H =20 #include +#include #include #include =20 @@ -21,6 +22,16 @@ bool psci_power_state_is_valid(u32 state); int psci_set_osi_mode(bool enable); bool psci_has_osi_support(void); =20 +/** + * enum psci_standard_resets - Standard reset selectors for PSCI reset + * @PSCI_SYSTEM_RESET_COLD_RESET: Standard SYSTEM_RESET command. + * @PSCI_SYSTEM_RESET2_ARCH_WARM_RESET: SYSTEM_RESET2 architectural warm r= eset. + */ +enum psci_standard_resets { + PSCI_SYSTEM_RESET_COLD_RESET =3D 1, + PSCI_SYSTEM_RESET2_ARCH_WARM_RESET, +}; + struct psci_operations { u32 (*get_version)(void); int (*cpu_suspend)(u32 state, unsigned long entry_point); @@ -45,8 +56,12 @@ struct psci_0_1_function_ids get_psci_0_1_function_ids(v= oid); =20 #if defined(CONFIG_ARM_PSCI_FW) int __init psci_dt_init(void); +int psci_set_reset_cmd(u32 reset_type, u64 cookie); +bool psci_has_system_reset2_support(void); #else static inline int psci_dt_init(void) { return 0; } +static inline int psci_set_reset_cmd(u32 reset_type, u64 cookie) { return = -EOPNOTSUPP; } +static inline bool psci_has_system_reset2_support(void) { return false; } #endif =20 #if defined(CONFIG_ARM_PSCI_FW) && defined(CONFIG_ACPI) --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C91912E1DC for ; Mon, 28 Sep 2026 06:10:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575818; cv=none; b=DENPLiImSLVl3C53laokvSsmVKOszDz9xyiO+AiM/4XM3IGL527eYeKaRZY82zAzPYd3NT3AiDHXIVsgpNw2hW6Sw2VUIF+CPvbY4sTCfBIlaGj7tWerQzwj1/mj4lZSEhCvNPxR/GGUORpM+nEae2QH9Gxts9wqzq8pJBU7nto= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575818; c=relaxed/simple; bh=s+F2LpPjY225AXXtAlSq1y6fik/3LpswKtBmQ0eyHlE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Dzw/Dgoeq8YZS1yY/j2tf90PP562uccfRzDIzqop7lpSZ0lG8EdmIO4a6G5x6I2L3gK8femLKUNLSxLoxU686eARnMPDaTHxgFDyu5qkpv18i3w5vPUKD/o8uafaMuhGhlXB0GB1H/+nKwYDaXuopH1h6Z9R0MVJesTAj3/MzJE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=RgKJBeWA; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=PkoxUzDC; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="RgKJBeWA"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="PkoxUzDC" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S1Yhrn4046226 for ; Mon, 28 Sep 2026 06:10:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= t0DqDJ0pB/nmQ/l+KL+PFu1ALELoJnqz5KUly/ibpE8=; b=RgKJBeWA8ByTQm0H 5E6sG1+B+mIiAT4iNnNff0xEQKGCgMw6CzNBA2UmW7/NqI/86hhd0a2hDC/12yh4 6Ng9bvuLGlb22QBkidlLIBfew4ViCBzNWwWFkxpR4wl8dtIa5/2MVzApXZO1CNJR I0aAojh+Dooiy64dPsisLV9p4QOpUGrX5u40cwCkFI0SzBtn+oeiJaF2QbX9cUat zzOafjU9VDvVsJ3Sw2wqimJobHY+/Ihs5f8SaJ7PFylfnCLGugju05RpiPCpAiio LSzU2cYwmCyH6wqkrafUDAvQNj0CmaBE0P91Lm/xw/PPlI5AbWFDZBk9y0oiogHw ivcDhQ== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gx77jvme7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:10:15 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-2df8d1e91c9so40839135ad.0 for ; Sun, 27 Sep 2026 23:10:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575815; x=1791180615; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=t0DqDJ0pB/nmQ/l+KL+PFu1ALELoJnqz5KUly/ibpE8=; b=PkoxUzDCcw2QPfHFyBXJbNsev33skqNdphTJ+hBz9ou8sSHE0fhsg0SS+eYRIH/5QW 8VS4rUttGcX/xZUKbz/OEf04KwxYwpHIrZUaGsvLMByBFTO/wCVCvlShtCtXco6iWZiM cBrOWsgX5g65/GbHPbmDUSTVxL8DJgdMN3G21TxR1IvZXD6N+Vtcd0i+KGg/1L4pDYOh 4CxTFQZXvLqZNdNztCq+OCUCfJgVvCpxazioHSeWh82R8XCZ1t1754NJu3iK3NIkFFcw 4TbZOLnVseH7jtku7SAZ+punkdccx8w81+7esLFhrSam5Jan78y46ZsZhvY8IcjrGHz+ yFCw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575815; x=1791180615; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=t0DqDJ0pB/nmQ/l+KL+PFu1ALELoJnqz5KUly/ibpE8=; b=AgWd8/BGQuqdHqFYtkMgnJG3JhdsDKjIPz4tI0aZyoUkGPQuJRoqopIAQvfkLO+acA dx+fWaaFF32ubBlZo4tnq6i/HtYSOzFUHSzLDiBQ7ssPO1hpZV3yd/9OCZd+nPrRELI2 iDox6GUC9WEkpqct//CJSAUl0x28YyaRGvAPoHF53ru331sOYoqij36ZBI4sirRSEzLZ BmJiZqsEITg0ALZ2J2o03xD6G3Eg51rJ8sT2NEGf9vwgSMmC3HmrbGKY/rV4mmJeW3X8 Vkivx30bKYvgE+DVQ5gMh0h+1gTzIigDQButnwKEV56fXiW+aaJcwNSjuDC1JVhNU7d9 kCOA== X-Forwarded-Encrypted: i=1; AKwUvBztj6b2jN+9wYAH/eRppRq+VgN3I6ZV0x85YL9QB5VzagWX41j2LdggyEcUkUJQLG6z2hhH4aO6EVpMeqk=@vger.kernel.org X-Gm-Message-State: AFq9FYIvv3JsFBqB5Hzeq7CjkX/2kXivQpvJKtT2JQCyKxOfeV/dKvre ty8+7WL0AtfDH9uHahcSvKlTZterpyY6d7sxjiS6BG4jFN7HHRZU6t+yclKJFEv/6B0VzT6b31a u4A33ps0UMqg1AV4joGyAB/yYiSjbxvGljDkmoF5Xc5lmNqnY3Lf3Jz8LeFRFeeQudOk= X-Gm-Gg: AYBFou0J4xW2mohVrQM2PjFMvKeRAvlyjPlRZ6qUo6sMuYBzxlSpU0AnWvy9mTM/zKC MpX5LDbPjrlmCoOgPL+5XIV1ZMvp/qgBZE5t7WuIOd+ibo2G+U5fEy7B4FWmg2hXzhyKH1EyYuX FxTvfGem1/6yuKZCjqAOw1ev7fpCxqOurCm4MGaz78Ore9+jC3PxJ04/jTWgbEzguuSgufmPsgW FUsM1hVGBU/lEzU3KCJfgaPPSxsOEM/7L6LG1MrQ27gI/b3ngPCU3aBI+ZHPL0I60TxmT8Tgg0u VCWK+D9eJxaaqwIOvzGgDMIPHESBP264Bi/wQsdJFaB0vH/9VTDbyISfQNeTwnc+TgeNMM7xuoc WQRQgBGjCbUWrzaTWfsAsRQHf4XRVLmp/jRLH X-Received: by 2002:a17:90b:3c12:b0:3a0:b210:643e with SMTP id 98e67ed59e1d1-3a0b21068bcmr8585840a91.22.1790575814967; Sun, 27 Sep 2026 23:10:14 -0700 (PDT) X-Received: by 2002:a17:90b:3c12:b0:3a0:b210:643e with SMTP id 98e67ed59e1d1-3a0b21068bcmr8585812a91.22.1790575814487; Sun, 27 Sep 2026 23:10:14 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.10.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:10:14 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:16 +0530 Subject: [PATCH v26 04/10] firmware: psci: Add support for PSCI auxiliary devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-4-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla , Ulf Hansson , Bartosz Golaszewski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=8065; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=s+F2LpPjY225AXXtAlSq1y6fik/3LpswKtBmQ0eyHlE=; b=gQbnNfJiFU/qICIAKpI98925/lty16Om6ynYaxb2H4Dv92rzs5I+2hPApuKWT9PwCNT0b+5MD r/XNuai+KN7DfduGXhi19L5aJX9FAm7fm4jzP1cEOdF5idS1rPqp6w7 X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX+x+M9vSjKKoO JecRztib1yTbNmlgZrY5/wrJ1l504Yc9HNoicRA7igDNn4zf66in7X9ZbS0TnUOOPoifQPKaE6q L3l/QvuRoekZpZKctJ7CZx690VrTBJo= X-Proofpoint-GUID: hvvsmguseYc5WpEyq2UpPwzXVt3TF4fS X-Proofpoint-ORIG-GUID: hvvsmguseYc5WpEyq2UpPwzXVt3TF4fS X-Authority-Analysis: v=2.4 cv=J8U/fwnS c=1 sm=1 tr=0 ts=6aba04c7 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=pkOq05zB4EqCiNOTdIkA:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX99w/25IXq3O8 0wluwlp1EiU49NW1HxyVQPv++ZgAmKncGxBi9eBIQcppE5bstwEebWbTYs/oqUMKPpg9SngVITR RfTFcfHX4AqisHcHkpMbT9EtFa0c957HEOlHSNoJn5Z+m7jPV7oN+zK/HBFykG9o2BGje/t8Ej3 vlxWe8AlxhT/DkSlh7Tbhha//N1dDA8Asvj+l5d2iZIFuA4THGrlFj+0qpHnhaVYvEQ9RuzV1Q4 l66m30PI8JIupURx+1Lyf6ysqwetsD/Pju9ktNNURcuvOOQzZ9s6PK24bzS94gl88bTaTDbgScZ t9zA7RkFjqtMnDhGlBH6kTAvIY1kyrxNOY+9HMVneBaCIhzvF+SCMF9ggzMN2++Q7JUurrTbJRW XBrAZJWG0NOJREmVQbMMAvcLe4Jw5nRGTqlPUsEIHv6VyYQrSa6ExtObciHrmFbWENSzFn5BpDH grkaxERgKhUcbP1A+Ng== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 spamscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 suspectscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 PSCI has multiple kernel consumers, such as cpuidle-psci-domain. Currently, both the PSCI core driver and cpuidle-psci-domain bind directly to the same PSCI node "arm,psci-1.0". Additional consumers, if introduced, would also need to bind in the same way, leading to multiple drivers attached to a single device node. Introduce a PSCI auxiliary-device provider that binds to "arm,psci-1.0" and registers PSCI child devices on the auxiliary bus. As the first user, register cpuidle-psci-domain as an auxiliary device. Update cpuidle-psci-domain to probe as an auxiliary driver and use the PSCI device node for power-domain traversal. Allow the probe to succeed if at least one auxiliary device is created. Suggested-by: Ulf Hansson Suggested-by: Lee Jones Suggested-by: Bartosz Golaszewski Signed-off-by: Shivendra Pratap --- drivers/cpuidle/Kconfig.arm | 1 + drivers/cpuidle/cpuidle-psci-domain.c | 33 ++++++---- drivers/firmware/psci/Kconfig | 14 ++++ drivers/firmware/psci/Makefile | 1 + drivers/firmware/psci/psci-devices.c | 116 ++++++++++++++++++++++++++++++= ++++ 5 files changed, 151 insertions(+), 14 deletions(-) diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm index b88b01aa5829..f22e18b05053 100644 --- a/drivers/cpuidle/Kconfig.arm +++ b/drivers/cpuidle/Kconfig.arm @@ -36,6 +36,7 @@ config ARM_PSCI_CPUIDLE_DOMAIN bool "PSCI CPU idle Domain" depends on ARM_PSCI_CPUIDLE depends on PM_GENERIC_DOMAINS_OF + depends on ARM_PSCI_DEVICES select DT_IDLE_GENPD default y help diff --git a/drivers/cpuidle/cpuidle-psci-domain.c b/drivers/cpuidle/cpuidl= e-psci-domain.c index 5722365b943e..199c1494c566 100644 --- a/drivers/cpuidle/cpuidle-psci-domain.c +++ b/drivers/cpuidle/cpuidle-psci-domain.c @@ -9,10 +9,11 @@ =20 #define pr_fmt(fmt) "CPUidle PSCI: " fmt =20 +#include #include #include #include -#include +#include #include #include #include @@ -121,14 +122,10 @@ static void psci_pd_remove(void) } } =20 -static const struct of_device_id psci_of_match[] =3D { - { .compatible =3D "arm,psci-1.0" }, - {} -}; - -static int psci_cpuidle_domain_probe(struct platform_device *pdev) +static int psci_cpuidle_domain_probe(struct auxiliary_device *auxdev, + const struct auxiliary_device_id *id) { - struct device_node *np =3D pdev->dev.of_node; + struct device_node *np =3D auxdev->dev.of_node; bool use_osi =3D psci_has_osi_support(); int ret =3D 0, pd_count =3D 0; =20 @@ -176,16 +173,24 @@ static int psci_cpuidle_domain_probe(struct platform_= device *pdev) return ret; } =20 -static struct platform_driver psci_cpuidle_domain_driver =3D { - .probe =3D psci_cpuidle_domain_probe, +static const struct auxiliary_device_id psci_cpuidle_domain_id_table[] =3D= { + { .name =3D "arm-psci.psci-cpuidle-domain" }, + { } +}; +MODULE_DEVICE_TABLE(auxiliary, psci_cpuidle_domain_id_table); + +static struct auxiliary_driver psci_cpuidle_domain_driver =3D { + .probe =3D psci_cpuidle_domain_probe, .driver =3D { - .name =3D "psci-cpuidle-domain", - .of_match_table =3D psci_of_match, + .suppress_bind_attrs =3D true, }, + .id_table =3D psci_cpuidle_domain_id_table, }; =20 static int __init psci_idle_init_domains(void) { - return platform_driver_register(&psci_cpuidle_domain_driver); + return __auxiliary_driver_register(&psci_cpuidle_domain_driver, + THIS_MODULE, + "psci-cpuidle-domain"); } -core_initcall(psci_idle_init_domains); +arch_initcall(psci_idle_init_domains); diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig index 97944168b5e6..68e381f1a618 100644 --- a/drivers/firmware/psci/Kconfig +++ b/drivers/firmware/psci/Kconfig @@ -2,6 +2,20 @@ config ARM_PSCI_FW bool =20 +config ARM_PSCI_DEVICES + bool "PSCI auxiliary device support" + depends on ARM_PSCI_FW + depends on OF + select AUXILIARY_BUS + default y + help + Say Y here to enable auxiliary device support for PSCI. + + This creates auxiliary devices for PSCI functionality implemented + outside the core PSCI firmware driver. These devices allow PSCI + child drivers to bind through the auxiliary bus while sharing the + PSCI firmware device as their parent. + config ARM_PSCI_CHECKER bool "ARM PSCI checker" depends on ARM_PSCI_FW && HOTPLUG_CPU && CPU_IDLE && !TORTURE_TEST diff --git a/drivers/firmware/psci/Makefile b/drivers/firmware/psci/Makefile index 1956b882470f..8e75a0ed6f74 100644 --- a/drivers/firmware/psci/Makefile +++ b/drivers/firmware/psci/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 # obj-$(CONFIG_ARM_PSCI_FW) +=3D psci.o +obj-$(CONFIG_ARM_PSCI_DEVICES) +=3D psci-devices.o obj-$(CONFIG_ARM_PSCI_CHECKER) +=3D psci_checker.o diff --git a/drivers/firmware/psci/psci-devices.c b/drivers/firmware/psci/p= sci-devices.c new file mode 100644 index 000000000000..d23befc490ed --- /dev/null +++ b/drivers/firmware/psci/psci-devices.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include + +struct arm_psci_device_info { + const char *name; + const char *of_node_name; +}; + +static const struct arm_psci_device_info arm_psci_devices[] =3D { + { + .name =3D "psci-cpuidle-domain", + }, +}; + +static void arm_psci_auxiliary_device_release(struct device *dev) +{ + struct auxiliary_device *auxdev =3D to_auxiliary_dev(dev); + + of_node_put(dev->of_node); + kfree(auxdev); +} + +static int arm_psci_auxiliary_device_create(struct device *dev, + const struct arm_psci_device_info *info) +{ + struct auxiliary_device *auxdev; + struct device_node *np; + int ret; + + auxdev =3D kzalloc_obj(*auxdev); + if (!auxdev) + return -ENOMEM; + + if (info->of_node_name) + np =3D of_get_child_by_name(dev->of_node, info->of_node_name); + else + np =3D dev->of_node; + + auxdev->id =3D 0; + auxdev->name =3D info->name; + auxdev->dev.parent =3D dev; + auxdev->dev.release =3D arm_psci_auxiliary_device_release; + + if (np) + device_set_node(&auxdev->dev, of_fwnode_handle(of_node_get(np))); + + ret =3D auxiliary_device_init(auxdev); + if (ret) { + of_node_put(auxdev->dev.of_node); + kfree(auxdev); + goto out_put_node; + } + + ret =3D __auxiliary_device_add(auxdev, "arm-psci"); + if (ret) { + auxiliary_device_uninit(auxdev); + goto out_put_node; + } + + ret =3D devm_add_action_or_reset(dev, auxiliary_device_destroy, auxdev); + +out_put_node: + if (info->of_node_name) + of_node_put(np); + + return ret; +} + +static int arm_psci_probe(struct platform_device *pdev) +{ + const struct arm_psci_device_info *info; + int auxdev_count =3D 0; + int i, ret; + + for (i =3D 0; i < ARRAY_SIZE(arm_psci_devices); i++) { + info =3D &arm_psci_devices[i]; + ret =3D arm_psci_auxiliary_device_create(&pdev->dev, info); + if (ret) + dev_warn(&pdev->dev, "failed to create %s aux device: %d\n", + info->name, ret); + else + auxdev_count++; + } + + return auxdev_count ? 0 : -ENODEV; +} + +static const struct of_device_id arm_psci_of_match[] =3D { + { .compatible =3D "arm,psci-1.0" }, + { } +}; + +static struct platform_driver arm_psci_driver =3D { + .probe =3D arm_psci_probe, + .driver =3D { + .name =3D "arm-psci", + .of_match_table =3D arm_psci_of_match, + .suppress_bind_attrs =3D true, + }, +}; + +static int __init arm_psci_init(void) +{ + return platform_driver_register(&arm_psci_driver); +} +arch_initcall(arm_psci_init); --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2EE43A6B8D for ; Mon, 28 Sep 2026 06:10:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575828; cv=none; b=F0XMobyEr2GHi9jDxCGNYT0GlwDv6GTDSqktkdVLvlUek6j89lTaPma9hO875ZRZ8cTKQHdtx7R/DKea6298FDaNd/EGIUxqakJYVJeh/lWFQLphzinXyMcxMnGlwYWdQPcp7rJwZcmJIFxODWpJZ4J4MxUTcpsi+NDkvDD0Ymc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575828; c=relaxed/simple; bh=X9KZJr7kgVXbU9Bx9ClV9IK6kpd8uGbGeYXDcH/AfOI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=d+/A5adx5eUh74Ynu3WXPs0CgFPLIubLV8lhxVTROPYXT9aICx2W0ZkgswPPv/spJrtRdflTOo4+M4PsVVSXnz+sqxarGdo9xH63mIL5EBNI1BkNfEDTIpfYIF82efIVrB87bJudAlYXg41JXhJu2mgXuVajbIpTmweXjtRgWwk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=EhrrnYuX; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=d9qvren2; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="EhrrnYuX"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="d9qvren2" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68RLNPAx2368898 for ; Mon, 28 Sep 2026 06:10:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= y/CZep6ohxgA4WGMpffaOg6jtKktfc2ERETEgC6f1UA=; b=EhrrnYuXXGQSe2j5 ZBmFs6ajGq2VD1QuqCFPMgBGBsRoagRPlPtUAXxu3JliojS/AedzfixtldV4Azor RqkVenio3PDtmQf/A6nrgwIB2WUqVIxOslanNkbOZAuMQCxd+2Yf03XJKkqJuFm0 ADQyM4eHLa7w20xQFNWo8h27Q3tEmBNtCOkWQXU6PG3eRIlbqF3wTTAfUuvuwljT Fdoq13YCjDhYoOPX9Q0W4qRZC8PeQ7+gF203bDwZd6D6EtVqZ4HnM6uNcHwolyBT kE0zzfbmqi3vHg/SkfXO75AzzsruuhjLYodMbZzcE04i5UP/dLhy09DOawnjEIV1 lBjOug== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gx77jvmf6-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:10:26 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-38e54b6556aso2886418a91.2 for ; Sun, 27 Sep 2026 23:10:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575825; x=1791180625; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=y/CZep6ohxgA4WGMpffaOg6jtKktfc2ERETEgC6f1UA=; b=d9qvren2Umldo5FCtTn0myGzwkJ801LSgpXOS3bk0rMg2Gs7gh9bSzzX5XCLRBQCEH HlkkJDjfXrVKaKrJ8qv66LXlT7UIBXYcuF/kcy6IkUguLBKSmfWsbYB9wTmJ3ls6q85D LSddJErsE13LVk8+sfJx3BzghxFIshDVh8ViuPawYgkJP3ZLHdJK1ppNAOtMMK5HghIP Xb4iePCbqGNV63N7MUItSSPdsPnyTXC0EXOgfx849F6lEY9m/m6+9KNRDtKIBXdDOqgU N8y9W5yag1PVqEgz0/VfsX/ZAEf6PRJcUcutYrveU1n9TXOkWZOopodyPIk9NQRPAPBf JJ2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575825; x=1791180625; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=y/CZep6ohxgA4WGMpffaOg6jtKktfc2ERETEgC6f1UA=; b=xEgDwvp5zUbcOxIB7yeNb7UhXBO5hjkl2TZYtw4WfJxi3MwquPYOIlZE7uPsaYIm13 JeE2RDkrnZK3tzNA2Z6CX8ySQ8RwM5vFUIgtjr5SW0ZVnQvR925i8IX7DLjs2Jdv1jar AkI0sdJTyEcqpBRRN1KxUKjeTE1ERohe2leDcipXqx/b1YDWiZR7AS6ekdwv3rKVPBGK aWeGgMlXokWyYTKDDw+U7zQeGPsEhzspjfWbnqVRQNOJTNEO23zz9KTdRXZ9x0jMQ9dH SNoAs0LOA33FQBPCk+pO8Yov2lLpuaR887RBZUc3GZrv0K4FwCNW2sMyZZoHV4b3FvEG hT6A== X-Forwarded-Encrypted: i=1; AKwUvBzFXsjS5Q1gpsaiGXoQF8BbAJVOBbuEKGHAFvkrE638cUiz1bpAPn53Az2X2kSwrODBr1/dK6uJAgeSWmQ=@vger.kernel.org X-Gm-Message-State: AFq9FYL9esexhjOZLHbCKTI42+zTp6kQ8D3qKGKNJHi2bEZNUybfsf6k 7Y5JfxbfpqEfTXorIKqoB21WTCHvoypCqXgVzl2TG3Jko5od6ZjIYlDj5hu2DXZXkD5uDLDRFXW 4g/5NVU7OuMql3IEIHwqLcU5Ar21HRNXvdeJD5/KYoWtXbFiUyFZCc+RVIz731ejnHHM= X-Gm-Gg: AYBFou3p6SNAIRuP4q+XZaOKT5HjlIm88QKXqxtuG0kaMPTVYH2uEs9WnB9YyGsegb6 k5wGO7W808OPYjF+7RBaKpnmo2XznyzCZWA4weZHsfEyjnO28zFfiSGr7d8k+sfHIwqK+mYgTHU KB9TBLDofQgQN4r9r78hBJ2vUTV6L2UQcXRz3R7oZ5Wufd0sB2OTxuoGNfmIkt/Ry1irY3O+xpD YIqUMM3P2w5wf51d+Dl8e+syOQCttlKE1zIPCL9O7rrgHFrkFhzbtVvJooVnE0RDkrVynyPOwaj 3yt7UY96S5/C7t97UyP+gxA7S7NnFx77b4rT8Dv8tVCMmxJaOVV/U/f7Ps2rBEuajcShy5OLGaK plPhYtQRvGuiMbQzxSAgmS/+xhiYnbeZvuOU2 X-Received: by 2002:a17:90b:2d8a:b0:3a0:b959:4472 with SMTP id 98e67ed59e1d1-3a0b95947cdmr7634976a91.41.1790575825524; Sun, 27 Sep 2026 23:10:25 -0700 (PDT) X-Received: by 2002:a17:90b:2d8a:b0:3a0:b959:4472 with SMTP id 98e67ed59e1d1-3a0b95947cdmr7634923a91.41.1790575824896; Sun, 27 Sep 2026 23:10:24 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.10.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:10:24 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:17 +0530 Subject: [PATCH v26 05/10] dt-bindings: arm: Document reboot mode magic Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-5-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=3059; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=X9KZJr7kgVXbU9Bx9ClV9IK6kpd8uGbGeYXDcH/AfOI=; b=5901wfsiP2wM4LURUGsDnb2W4ctDY1mmhAlaROpftYaWoGFdJydZj5l5XbdLqRnvkbZJ52h9Y kCUyy0nJYo/D3YQUokIA/EkT/qcy51K7GO1xEIEPoTFPL3VGT50qV6r X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfXz98z/RxpIRMW qPABC3o3LBiHtVg2i0XBqpqmLBSZLB8qmECJ8hHfM2iR8ui4CWgwr9L24qB1D695nAZSY915uDJ wRL41Uk54qBSzlh/h/BHhhcyAm+L8hg= X-Proofpoint-GUID: XdDEmnzgIvnmHXPUhUMyTtzAuYQXg_l9 X-Proofpoint-ORIG-GUID: XdDEmnzgIvnmHXPUhUMyTtzAuYQXg_l9 X-Authority-Analysis: v=2.4 cv=J8U/fwnS c=1 sm=1 tr=0 ts=6aba04d2 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=MLL7hoemGGfarhQ97J0A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX2KFPwQjqaQfw j7az/TCPEiaH/sAWl+tlBwoWr2rq6gL/m42ToXs8Nw4TnZdVJsAjtfi6PBTe/tPQy9C6yEjOAC6 yzfv92pyJoFYC3GCxSzSYqFWUPvfQ15DQy26uA4ifjv9qo8iByLdJEbV+3MJOUgrd/EQTj6N1Bg +pV3HsJWMhHFaeylniOQG5tU5x597OCgwgm50fcThhEBEhyw4ILaqH7Sv8qDBqLj3wS6yGcSEh3 FMybBcGePvjsUz4vp2D45OtXMrOlj+wQWuWEqwZm8+j5PB+BnC10Gj1ZI4sIhIZ+Fa1/Guw8DXb D8HOHtfu+RunHpWf4gXKH/9fU2oU6JfRpw64YsjKmMggeLLuQ4jkBfyH67dQWJFW1JN4J+cQrd7 J/Zp5l3UYsw1KHj5bw9qgnHo9QY9rbgO3VDyzLkWGCCgR96J4v+Pq1R47g51q5FD8b2SdTK/b35 BeYBvmQumwd8nVD9OAA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 spamscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 suspectscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 Add bindings to describe vendor-specific reboot modes. Values here correspond to valid parameters to vendor-specific reset types in PSCI SYSTEM_RESET2 call. Signed-off-by: Shivendra Pratap --- Documentation/devicetree/bindings/arm/psci.yaml | 56 +++++++++++++++++++++= ++++ 1 file changed, 56 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/psci.yaml b/Documentatio= n/devicetree/bindings/arm/psci.yaml index 0d04389c81fa..82ae25e7a338 100644 --- a/Documentation/devicetree/bindings/arm/psci.yaml +++ b/Documentation/devicetree/bindings/arm/psci.yaml @@ -98,6 +98,39 @@ properties: [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/cpu/idle-states.yaml =20 + reboot-mode: + type: object + $ref: /schemas/power/reset/reboot-mode.yaml# + unevaluatedProperties: false + properties: + # "mode-normal" is just SYSTEM_RESET + mode-normal: false + patternProperties: + "^mode-.*$": + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + items: + - description: arg1 (vendor-specific SYSTEM_RESET2 reset_type) + minimum: 0x80000000 + - description: arg2 (cookie_lo in 2-cell form, cookie_hi in 3-ce= ll form) + - description: arg3 (cookie_lo in 3-cell form) + description: | + Describes a PSCI SYSTEM_RESET2 vendor-specific reset type. The s= tring + after "mode-" maps a reboot mode to a vendor-specific reset. + + A vendor-specific reset takes two arguments, a 32-bit reset_type= and a + 64-bit cookie. The arguments are encoded as up to three 32-bit c= ells. + Each mode property is encoded as mode-xxx =3D , + where: + + - arg1 is reset_type and must be >=3D 0x80000000. + - In 2-cell form, arg2 is lower 32 bits of cookie. + - In 3-cell form, arg2 is high 32 bits of cookie + and arg3 is low 32 bits of cookie. + + All values should be provided as per the PSCI SYSTEM_RESET2 + specification. + patternProperties: "^power-domain-": $ref: /schemas/power/power-domain.yaml# @@ -137,6 +170,15 @@ allOf: required: - cpu_off - cpu_on + - if: + not: + properties: + compatible: + contains: + const: arm,psci-1.0 + then: + properties: + reboot-mode: false =20 additionalProperties: false =20 @@ -260,4 +302,18 @@ examples: domain-idle-states =3D <&cluster_ret>, <&cluster_pwrdn>; }; }; + + - |+ + + // Case 5: SYSTEM_RESET2 vendor resets + psci { + compatible =3D "arm,psci-1.0"; + method =3D "smc"; + + reboot-mode { + mode-edl =3D <0x80000000 0x00000001>; + mode-bootloader =3D <0x80010001 0x00000002>; + mode-vendor =3D <0x80000000 0x00000001 0x00000002>; + }; + }; ... --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3690B3B637F for ; Mon, 28 Sep 2026 06:10:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575840; cv=none; b=jdaBzzeGsgy44oIrHwCwNIpB/m3n/DCXm1rqlPe43gvYR6ZSWKmZOrzw5LiorJU7v4k8LnjtKNEd+64S0GQwyIOQk/JsblOxnr2bOut/X1DQ6uvP1bA+6qVcA86wxAUWEfR4TnsAMgonMlsaKAEaZfft+DQT0VVV3KC7aIV07P4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575840; c=relaxed/simple; bh=YqKBMwk1p8eRD80CtubSGjeU5I1v3dA71M7seUihtNE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RvwVsqARSnirsGibDcXoVhOaRJHYu22OZ47xJ1aZKoSDXM3WK7QT2VBzLpGP33ZLvlL9aCzBGoA7B+ZvM2fYuDS7vOqG2R8pHCHGDwUKuouiP2l3xEc9FbtS8wC67nF3gJN7YQwtReuv7pnzidH5CuziGhAHawJ9d6M0i6AVWuk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=g5BLxeAk; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=I3/aWapL; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="g5BLxeAk"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="I3/aWapL" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S1Au5u3455586 for ; Mon, 28 Sep 2026 06:10:37 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= FkoT5PQ+I9v6WNTkSl/FYS9fxH1la1EBihgpFgTTI4U=; b=g5BLxeAk4J8SABaX 0n3VdhzsikJhtR9+e/vzPgBZ7fojXZQzHX/vC9XDnqLed2I9Xo7XYujSNWtD3tO0 dVOVw/Mlq7UMF009VgdU1Ed4AIAmPyPPQsLURMhBMzj1OIkh09t3M+2qVpaXoVhF oJI21fj5tYuPownj1lEt+8P/N5VSNdDqL+85AWS6bq0sX+h7vHD45AXlmT1lFIf6 LNBK0DGTvy1ARKfgRurqnMny6G5dgCAXCNQsPpmnLvy/xWABDZxzo0gLjpyTiMWU FLLce4R+vza7tBxDpqV1B42uGHEtfcnN9TH3iZgl2d767w1rWuZ+YO1Fe05dI7VF rVgerA== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gyebq0rcf-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:10:37 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-3a0ad137e87so4302751a91.1 for ; Sun, 27 Sep 2026 23:10:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575836; x=1791180636; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=FkoT5PQ+I9v6WNTkSl/FYS9fxH1la1EBihgpFgTTI4U=; b=I3/aWapLGuNBev136ZXDoFsqFG3SkVLf6ZWxc0dqUAZvERY8KOsaFbU7+RUFoSXLv/ L6l7ZjD457SHQIRwIV/H9c75dw+nqTP/5wZNMZ+D1Xbn/F093vhdhTMfCaAyeZyFUeRF urt3HI/p7vmln9yKrrBDKjcyMHUuOiGcHQJlabQTcGAxB2Rzh3ug9jTEmylc6LsSE/uU /hP0AhAs2vSJLOXC1J7Rz1wxvy10boPtT12UG7UstIHg2h7hFPmKVGjkHJf23AG4CMKO J94QIcp4IshgyMboyYXUG99gao7tmBH6sKfxgI6c7HpbQHkwQYc1HuCtKtIObTlmBTEo gqXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575836; x=1791180636; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=FkoT5PQ+I9v6WNTkSl/FYS9fxH1la1EBihgpFgTTI4U=; b=SQUfmNjSkU6HCqqViKGE9t93tTttpIIuIqshzYM6vEWVh1BBPctdKO2E635cEP7FNg 9bcgxqddwnZa15xIfYG8gToUG7iGAE8dLXQOjPbokefHxuQR5xdN1Dhu+LSA/vWoJ0kh mhkJ572n1KNCz/ZxVLmTZvP+RC3aIuvFl8Ivo/ozWERciwp6r4e0nQwmZqy8pVqQGDOm P924JB5Q2BP2mmCUp5bjOLSqqb6b9PldPQsMDu098F8m5k8BEz7HiEjeYl6nNHXOJmad ovNGy1skjGe59FYhDG5cvwGa//P1XTRusovpy2nMg6DWpQViPZmGvqpG7x4JwhdvBXrO aLyg== X-Forwarded-Encrypted: i=1; AKwUvBwVQGtjhmIgwVzB4qW0p9C24aCHf2SybiHj4bWVO5InrbF0Gc9aJ7+YOTOTEK977ZE/V6UnZC5QOGiSpx4=@vger.kernel.org X-Gm-Message-State: AFq9FYL+X0xKcfHvD8vHM4qF9xomubJqPFIlhDT9yvIVdyKFISYvt+JI 9EJGRi9D3snBpLajEVwvdKokEzuG62bew0CT5a9les5SkU6DKEdiSRm5o5dlrDqThwEKzqqw++k puHQwVA75RRfJxc4iwsO6Wj0N3sQvfU2aj73Z9+J0cNdqmtjEorFmCZaDbJ0b8XDpMTo= X-Gm-Gg: AYBFou3/YW3t4b7Uaw6PMOjSCmZGKdaIo0ys/7W/bhP/h9mZcL2W3/xLxPTRanjTICj 2ZUQsoFx0LU/TNAC8JSAhhLTXZuR+D+JYOGVCx4MTRZJFZh+swNPGY2uTfzLngTofCyPKXwQw0C pwqpCdhs++FfAgL90IihPFzLIUpTvfkFc0HYOJJKDIKmGcbpzTbocpPaZzjdYrMs37vEQjllJgJ EHavQewhhptIlTx4s5PE3ijVJZpGVq22OfHr1P/Pi0EhoRL7SwQkwOKpaOeI6p3hFkxTLqu3RtX Dw7WLlXP9uRJClMtdVOi3vWNBXZ6nlwfhGFef+gJ1NjlsktnLvNKfD7X021SW1GY1xMFP9koz6e QngEk64Fg0DJdiNzCzWpAbmH5bq6/Ykd5+YsW X-Received: by 2002:a17:90b:2b4b:b0:3a0:c276:1ec0 with SMTP id 98e67ed59e1d1-3a0c27622a2mr6367774a91.28.1790575836164; Sun, 27 Sep 2026 23:10:36 -0700 (PDT) X-Received: by 2002:a17:90b:2b4b:b0:3a0:c276:1ec0 with SMTP id 98e67ed59e1d1-3a0c27622a2mr6367746a91.28.1790575835684; Sun, 27 Sep 2026 23:10:35 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.10.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:10:35 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:18 +0530 Subject: [PATCH v26 06/10] power: reset: Add psci-reboot-mode driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-6-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla , Ulf Hansson , Bartosz Golaszewski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=7067; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=YqKBMwk1p8eRD80CtubSGjeU5I1v3dA71M7seUihtNE=; b=3E1YNxASd5gU46NBpiT33h9AugmPuh2nKUgUe4/iPqhotcRkO3ntGrVjMIs1tgN87ieIRFOBE gCX4lvZLL2MAkCFut8J+9kW57OU5oQmjt78jr/Gu0wfl82AvSJisdKe X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-ORIG-GUID: MAC_xOyDwnvWpgFZ2Vie74wGu0_VJ3pW X-Proofpoint-GUID: MAC_xOyDwnvWpgFZ2Vie74wGu0_VJ3pW X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX96TPCctmUV3I Qtx8q54/Hs7Abity0Bm/K8QqtHw+C9Lh7BawawwmX/AC9HrHNcWzDn3BbJrVqcIdPwMmr2s+Fot S2V15nL6aaWRsv/O1lWojKfvUghoO3I= X-Authority-Analysis: v=2.4 cv=EqRHPicA c=1 sm=1 tr=0 ts=6aba04dd cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=JfrnYn6hAAAA:8 a=OTBdipT0aglEIzt2I9sA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 a=1CNFftbPRP8L7MoqJWF3:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX9VWgnOGZ5Kr+ M6oEGcVI/dtkhBMnsI3N0pU26am3mRYskXDnIXKOP3a58efu1fq0szmlqYbPfah49KaeTa2p601 h05uO2+Fnyn/zaxPxK6YIwE8jwLOGjfwr7+2enw+HQEVYDP1hZ7s1k/rN4V7ybGWxXVz9iBrv3p 5dII2OWX7mMiQnQtXtiYYavzeLkFNO56M5agO78lsGzS6kPZ1rt2zNIofDff8jwPLsVXmi0/2do Z8uuvXlVWmuQDjT34ubgh+keSt3ccntf/1B2zdg2X9Qk5VH66luVkayZSxtMYCS4an+5F5umgTe 0c0YfHZv3LgnMMjn2mgKSvw1T+6m0LvIqj3HH2pgYFMSnvIq/JJW68eGIsgsLTj7S480o/Nb1Ql Kbn9/tW4G37oadRsZqZkOQHT80a9aHYIwZge6wMr26RnbSgt7xDk+Ab+Su0OFBIn+XLrp/Ts/OA sryU5komma5RUrc/AtQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 phishscore=0 clxscore=1015 spamscore=0 malwarescore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 PSCI supports different types of resets like SYSTEM_RESET, SYSTEM_RESET2 ARCH WARM reset and SYSTEM_RESET2 vendor-specific resets. Currently there is no common driver that handles all supported psci resets at one place. Additionally, there is no common mechanism to issue the supported psci resets from userspace. Add psci-reboot-mode as an auxiliary device created by the psci-devices driver. Define two types of PSCI resets, predefined-resets and vendor-specific resets. Predefined-resets are defined by psci driver and vendor-specific resets are defined by SoC vendors, under the psci:reboot-mode node of SoC device tree. Register the driver with the reboot-mode framework to interface these resets to userspace. When userspace initiates a supported command, pass the reset arguments to the PSCI driver to enable command-based reset. This change allows userspace to issue supported PSCI reset commands using the standard reboot system calls while enabling SoC vendors to define their specific resets for PSCI. Suggested-by: Ulf Hansson Suggested-by: Lee Jones Suggested-by: Bartosz Golaszewski Signed-off-by: Shivendra Pratap --- MAINTAINERS | 1 + drivers/firmware/psci/psci-devices.c | 4 ++ drivers/power/reset/Kconfig | 11 ++++ drivers/power/reset/Makefile | 1 + drivers/power/reset/psci-reboot-mode.c | 104 +++++++++++++++++++++++++++++= ++++ 5 files changed, 121 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 70a11f2ff61d..1007d5cd2e13 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -22058,6 +22058,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated = for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/arm/psci.yaml F: drivers/firmware/psci/ +F: drivers/power/reset/psci-reboot-mode.c F: include/linux/psci.h F: include/uapi/linux/psci.h =20 diff --git a/drivers/firmware/psci/psci-devices.c b/drivers/firmware/psci/p= sci-devices.c index d23befc490ed..04f24b8d9943 100644 --- a/drivers/firmware/psci/psci-devices.c +++ b/drivers/firmware/psci/psci-devices.c @@ -20,6 +20,10 @@ static const struct arm_psci_device_info arm_psci_device= s[] =3D { { .name =3D "psci-cpuidle-domain", }, + { + .name =3D "psci-reboot-mode", + .of_node_name =3D "reboot-mode", + }, }; =20 static void arm_psci_auxiliary_device_release(struct device *dev) diff --git a/drivers/power/reset/Kconfig b/drivers/power/reset/Kconfig index bce996bbef28..f165a41d40ed 100644 --- a/drivers/power/reset/Kconfig +++ b/drivers/power/reset/Kconfig @@ -360,6 +360,17 @@ config NVMEM_REBOOT_MODE then the bootloader can read it and take different action according to the mode. =20 +config PSCI_REBOOT_MODE + bool "PSCI reboot mode driver" + depends on ARM_PSCI_DEVICES + select AUXILIARY_BUS + select REBOOT_MODE + help + Say y here to enable the PSCI reboot mode driver. The driver + registers with the reboot-mode framework to configure PSCI + reset commands, which are executed by the PSCI driver during + psci_sys_reset(). + config POWER_MLXBF tristate "Mellanox BlueField power handling driver" depends on (GPIO_MLXBF2 || GPIO_MLXBF3) && ACPI diff --git a/drivers/power/reset/Makefile b/drivers/power/reset/Makefile index e31cab4ba78e..45d8aaaffaa1 100644 --- a/drivers/power/reset/Makefile +++ b/drivers/power/reset/Makefile @@ -41,5 +41,6 @@ obj-$(CONFIG_REBOOT_MODE) +=3D reboot-mode.o obj-$(CONFIG_SYSCON_REBOOT_MODE) +=3D syscon-reboot-mode.o obj-$(CONFIG_POWER_RESET_SC27XX) +=3D sc27xx-poweroff.o obj-$(CONFIG_NVMEM_REBOOT_MODE) +=3D nvmem-reboot-mode.o +obj-$(CONFIG_PSCI_REBOOT_MODE) +=3D psci-reboot-mode.o obj-$(CONFIG_POWER_MLXBF) +=3D pwr-mlxbf.o obj-$(CONFIG_POWER_RESET_QEMU_VIRT_CTRL) +=3D qemu-virt-ctrl.o diff --git a/drivers/power/reset/psci-reboot-mode.c b/drivers/power/reset/p= sci-reboot-mode.c new file mode 100644 index 000000000000..bf2dd6626feb --- /dev/null +++ b/drivers/power/reset/psci-reboot-mode.c @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Predefined modes use two arguments. arg1/magic[0] is always zero and + * arg2/magic[1] is one of the values defined by enum psci_standard_resets. + */ +static const struct reboot_mode_entry psci_resets[] =3D { + { + .name =3D "psci-system-reset", + .magic =3D { 0, PSCI_SYSTEM_RESET_COLD_RESET }, + .count =3D 2, + }, + { + .name =3D "psci-system-reset2-arch-warm-reset", + .magic =3D { 0, PSCI_SYSTEM_RESET2_ARCH_WARM_RESET }, + .count =3D 2, + }, +}; + +static u64 psci_reboot_mode_get_cookie(const u32 *magic, int count) +{ + u64 cookie =3D 0; + int i; + + /* + * For a 3-cell magic, arg2 is the high 32 bits and arg3 is the low 32 bi= ts. + * For a 2-cell magic, arg2 is the low 32 bits. + */ + for (i =3D 1; i < count; i++) + cookie =3D (cookie << 32) | magic[i]; + + return cookie; +} + +static int psci_reboot_mode_write(struct reboot_mode_driver *reboot, + const u32 *magic, u32 count) +{ + if (count < 2 || count > 3) + return -EINVAL; + + /* Unexpected value at magic[1]/arg2 on a 32-bit system. */ + if (!IS_ENABLED(CONFIG_64BIT) && count =3D=3D 3 && magic[1]) + return -EINVAL; + + return psci_set_reset_cmd(magic[0], + psci_reboot_mode_get_cookie(magic, count)); +} + +static int psci_reboot_mode_probe(struct auxiliary_device *auxdev, + const struct auxiliary_device_id *id) +{ + struct reboot_mode_driver *reboot; + struct device *dev =3D &auxdev->dev; + size_t count; + int ret; + + reboot =3D devm_kzalloc(dev, sizeof(*reboot), GFP_KERNEL); + if (!reboot) + return -ENOMEM; + + /* Skip PSCI SYSTEM_RESET2 modes if unsupported. */ + count =3D psci_has_system_reset2_support() ? ARRAY_SIZE(psci_resets) : 1; + + ret =3D reboot_mode_driver_init(reboot, dev, NULL, + psci_reboot_mode_write, psci_resets, + count); + if (ret) + return ret; + + return devm_reboot_mode_register(dev, reboot); +} + +static const struct auxiliary_device_id psci_reboot_mode_id_table[] =3D { + { .name =3D "arm-psci.psci-reboot-mode" }, + { } +}; +MODULE_DEVICE_TABLE(auxiliary, psci_reboot_mode_id_table); + +static struct auxiliary_driver psci_reboot_mode_driver =3D { + .probe =3D psci_reboot_mode_probe, + .id_table =3D psci_reboot_mode_id_table, +}; + +static int __init psci_reboot_mode_init(void) +{ + return __auxiliary_driver_register(&psci_reboot_mode_driver, THIS_MODULE, + "psci-reboot-mode"); +} +subsys_initcall(psci_reboot_mode_init); --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2E03353A82 for ; Mon, 28 Sep 2026 06:10:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575849; cv=none; b=ss6OdtsJi3H80AFS8Au/iJH2Qrncf5Kmg8KPVhXbOMoZuL6F89WG+Nk6tQWaAt6amcoz2qG27l/SoHrZGYd+gt+hpjsBy1s189ojL0K9JfQFz8Gbi9QpZENkyex1QjKgpO8b216J2m0/+QqJoO30KF/3BEincBWmF0MgEUfrwG4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575849; c=relaxed/simple; bh=Pc+ikFCDBvxBSt1eTUgtUUWzverxRmRTMcb4LNEPMcg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tbfyhEPx28BHH+N4G6M6GA6+CJ0NKSXFrQSjnTIzSuub2uU688FOhM/tzqI4jPievGgyXcvOdbFwBl+RzaGdy6+YOuHdPM/rHdcbmhXDaxpToTXabv8XL/jQOBGqOyMyDyK3+pHnbOMA163JCc9s09DjdNhZRBL/Z1jPi9dXLxI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=MFLmhLoq; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Gy5dVbMe; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="MFLmhLoq"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Gy5dVbMe" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68RNl1CA2654121 for ; Mon, 28 Sep 2026 06:10:47 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Z+QMOReJW++tScmV4/v9BZkk5QhhaL5ZwAY/yKj9k+4=; b=MFLmhLoqKeJw0Beb PMvzA51gfP43f8C1p9ecE+2l0+8xhIJ/26n913sU6Kbag/i5pwcexcfdXJ+2wEbJ JG0DW6LTHCq4rZ1h79IeeUPUi72tmb4YVe9qHlz4M45/LeBti6gLxxapUejtg84t 3aBSlEPcLZexrvoVdWLogqIaaqnVtk5+D/krEtcbWezZard5DJi0QZl07aU379dF gQKfZKIgLt8cjGQM5YLSY1M7seuBXvCtBsjw24pwumGu07uQ3GxYaCBFxgLZjzag G548Iy6wXeeCjK4yCkXoB4zuzqdUmeRH7fPx+thFzPkokRilAWWcMQSTdbDcSMrm w7EP0Q== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gx77jvmh3-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:10:47 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-39deb05ef51so3235997a91.3 for ; Sun, 27 Sep 2026 23:10:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575847; x=1791180647; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Z+QMOReJW++tScmV4/v9BZkk5QhhaL5ZwAY/yKj9k+4=; b=Gy5dVbMeNip/WfNmekp3RT2JYOKJMTQiRR9btWNMlxW+WIfXAs9nh4FL+GvuzwPmWp uE/SrLFRz1z+0bHHG/319EQScHPZedsO0QrckFlBJwwCK7GrGrHyUpdf6g7uCIjbAzum Wy36Pef/dC9jvtjPxQLSmM3b+Tvdhdyyse5jps8dSuiJv2pW/ijISlhCva2ACKOG+TRj vLPXtHweRKnOpYiFAqYz6SYGoA4/ASZ2pIjDRzUpjzdQJchU1DSqdDcXC6eC/gWIqqQa HvqsVNiDdA2EnBwvGAKZx2HBHt150uBO+yjVBeonG+T3W6uz1uZ5xdk9wtf7AcJyVOlc oa2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575847; x=1791180647; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=Z+QMOReJW++tScmV4/v9BZkk5QhhaL5ZwAY/yKj9k+4=; b=w0RQVPTD7GiJpEyk5SVgGriC1ycGrKKBa0hzMJwqSNY5roOp6OUvbCWc2chtWAhIMJ XkURshEBZGVcBdQjzQ384zsh1/bfoeRFwCT5QF70BqT2O66OF3avbG7jVYw0W99HmWXD j2T6ksZcA2OikfDTx0nIGBkEUnwM8t9PondM8qJE2Vndp/R6GkqkVezUAGgyc8pXPcbU Z+U5hG1XU3JCdJeMBB/saNLiiB8I/65yIlK5Z7/2zUha4Ovd7fJjf/6ZAgk2HWg2J2P1 ui5KOX9RVQI+vz6Iacfd+bq9BqH1FZufClHAUQkrzKjzpUz7GGwkPenyyg0ev5lJCjZ4 vaiQ== X-Forwarded-Encrypted: i=1; AKwUvBybljTPZcLszhkDn5Hni/+P/YEcaqSwGAR3J8/4QxpsMMlXsTKLHyIO+om/V8xNx/HhPMpEkWOW8tZYe5g=@vger.kernel.org X-Gm-Message-State: AFq9FYL4vXmmiP/dmWK4S1Xu1IYWsczoZsS2Hkcq2N2uuxSOVNilsRis ntVq7Q7/lBcw8TCjBQNm58KA6ZrOnTCjPWZriOrv4OAvd+dX4XqpZAKiC5gfMnN4oxS6IJ2Vf/q znHfuAoNpqj3Sk1y/LvhbULK6Ze8PWtZfIgg8gWKRxU3EHVDdmFek+zrLOQ43L3tbtmQ= X-Gm-Gg: AYBFou1gDadEXUe5nUlZMYf7/EV+apXl8Hp9fELGz5pmHui781VIH5ojx7MTGIY9XPo 7osi/SwxcJMCzNfun2pBgd/6X5H3upvEKq5ESAMa5scEcewd7EpGWSwGgPLP4o3Dkko9wYi02Ra /XK8n8k21epeWA2pWp7mBVrD2qZMCaF6evWrr9R5eMAeMqmztOvE3KVXEgaOd0zFeFPQ7lz4YtF IJySN2OVWqYdrq2z8Bz4sQiznSGC518tzdq2wl9uvAQqI9BhzLZNz5aK1sY6j2GK4Hdg6LErEi9 usuA15EnwcvNMmv33BjkLLlHU1/nrMlvpwjfV2auTISPtqOsPpsYrtLk81/dwq+g/Lo0FAudZmB Fohve4t4PqdvSf5CR/iZv7qFAQU4OSFxiI1+b X-Received: by 2002:a17:90b:2790:b0:3a0:d265:3647 with SMTP id 98e67ed59e1d1-3a0d265389fmr4181611a91.8.1790575846596; Sun, 27 Sep 2026 23:10:46 -0700 (PDT) X-Received: by 2002:a17:90b:2790:b0:3a0:d265:3647 with SMTP id 98e67ed59e1d1-3a0d265389fmr4181598a91.8.1790575846112; Sun, 27 Sep 2026 23:10:46 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.10.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:10:45 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:19 +0530 Subject: [PATCH v26 07/10] arm64: dts: qcom: Add psci reboot-modes for kodiak boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-7-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla , Bartosz Golaszewski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=2145; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=Pc+ikFCDBvxBSt1eTUgtUUWzverxRmRTMcb4LNEPMcg=; b=0pnzFtnpSSGd6K/ogS70pPcICal9QhK0HOM606A0GQXA2GVuZ73fXvD4bQl3mspOIjHAaNbO2 T+hmTqYkGURA0r246+yqn1A8hmx6589xHrz8CqG0yxko+qSqJ5eRXgn X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX/lC7kyQQR9E8 B5Qt5nbmNMrufR7YFleL3l70n2l88SFccuYSFmv2xYozTPxEbASI9bJFtwgKgTZklbYDdjYtyMC Qnxo3TgwGZ0EEjxA2scxzONWV0D4zpQ= X-Proofpoint-GUID: -3WB-5efPKKNI6iZfzBefSXxaUQyfypK X-Proofpoint-ORIG-GUID: -3WB-5efPKKNI6iZfzBefSXxaUQyfypK X-Authority-Analysis: v=2.4 cv=J8U/fwnS c=1 sm=1 tr=0 ts=6aba04e7 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=t9IVmYW30V31rltyR78A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX3+DCzvCOyZBh /6JqDocySzkJIsp2NRmJ9TkOA8ftk8RDBBKA+oCkYwkgESDV83AzfpSy6iLf+8TB3S4yb/r51U0 i4neM4W0dBcmfZYLbrzj3W1OC0o6JE/EZHQOckiR1ZVIygk7lrllIgDkPOeh+cjZY7vvpTLM46S Dr8254oNibrHSSYAtWwQOvurago8prukvPEqiL6icRJpCmLtMjr+7UaHN+2ouRUnUcFhn5a7xz5 dBilkQE8+UjXQ8ksa7W4wjuwquC0kMdbFp4z6VsEIxUoF5lbnVxJL9l/s/OmsqtRFWaS2Voj7n0 oKXRCq2cbVhJEG7to3K6vJEHO6jsKUbqqidK+wM+/78mQ7pYKF81A52gOotlL+4tYYo5URoH/im OEO/XbDfAuSmZ1v7ShpcfFH2HEa4oZjs0Jd9eF55nMXUi6U17MYJEFKFkDIFbfowVxXofMEPVJz lQ+GwHC2I7Y0TJE/QTA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 priorityscore=1501 spamscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 suspectscore=0 clxscore=1015 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 Add PSCI SYSTEM_RESET2 reboot-modes for qcm6490-idp and qcs6490-rb3gen2 for use by the psci-reboot-mode driver. The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent and not available across all kodiak based boards. Reviewed-by: Bartosz Golaszewski Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/kodiak.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcm6490-idp.dts | 7 +++++++ arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 7 +++++++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/kodiak.dtsi b/arch/arm64/boot/dts/qco= m/kodiak.dtsi index 347815e5983e..307fc45af37a 100644 --- a/arch/arm64/boot/dts/qcom/kodiak.dtsi +++ b/arch/arm64/boot/dts/qcom/kodiak.dtsi @@ -867,7 +867,7 @@ pmu-a78 { interrupts =3D ; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 diff --git a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts b/arch/arm64/boot/dts= /qcom/qcm6490-idp.dts index 58cce89a0c1c..c9c1b0c48550 100644 --- a/arch/arm64/boot/dts/qcom/qcm6490-idp.dts +++ b/arch/arm64/boot/dts/qcom/qcm6490-idp.dts @@ -786,6 +786,13 @@ &qup_uart7_tx { bias-disable; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qupv3_id_0 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot= /dts/qcom/qcs6490-rb3gen2.dts index 477d671bcce4..a2ccacdc9ca1 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -1102,6 +1102,13 @@ &pon_resin { status =3D "okay"; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qup_uart7_cts { /* * Configure a bias-bus-hold on CTS to lower power --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17E6B3AB286 for ; Mon, 28 Sep 2026 06:11:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575861; cv=none; b=aTXJGfqsrr1cufxlTBvHpSzQxAzGjTCTi3SjOLr2EAzaQuB5dvqU/uszezXNeZJVpEOHoTzRqMEMIuQQPuKn90uKSztan1gWn13Wgl0WGAtuKPpWi6TFB5Jvbb3U1aEYdAg6JDOFBGZci/Z2oSJsCNPne/KOUcc+XKQb14GQHy4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575861; c=relaxed/simple; bh=HY9fLa8u8u31BscwdrGeQccVQPGFQUgGa2K581SXsxg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UfV2LE+lFY+Xnx+LuHBZSzaqueLvA/PAz+UYLk3tws6kfHwbdjHkCmg5QuIFEAnNRHoT7tsCYq2HpQniQ0/DzS93QDnweFTuO9Ohu5yIki7nrZs0ZDt++Is4v5y6rU5Z9KXsmQRDjbUbCncHXJj6Jm3ERbXjr5KKudetECPuDhw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=hhYBREwl; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=bnL1ts3E; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="hhYBREwl"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="bnL1ts3E" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S1Au663455586 for ; Mon, 28 Sep 2026 06:10:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= jfT8oPSA0cGLEFSCxt0NN45mGUPgAF14lIogeHiakWY=; b=hhYBREwloagq9SSi ckrfC4WjX+v88luweFvE//fkslVqCmhozicPepDxX3uxgLS5hRwHs6UtHpctnvai k4qy7E8wIxdPQ5SkTmwbWOcc4DknKhlO5PwfPItlaRwKWhA6LfPaIB7V4Btrv4ef EWe4EHcz3WSTOS1saqIKuMAu1Cq6cW+7u/GSmVdh5H9UtN830Ju8tWGD1g5cUals UyU4HnCTo2+/iwGTzC2dLVtr8UVMOYBOTbzBXpAIAYWRauFaxnCZi/LGGL1tGvo5 ywyxI/mH1hkyBtwhUrHscjtccan8015nn940O5kh+DkKF3zpW0wTRpCiMbkfHOf9 pQrRvQ== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gyebq0reb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:10:59 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-39de4a68f7cso2252564a91.1 for ; Sun, 27 Sep 2026 23:10:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575859; x=1791180659; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=jfT8oPSA0cGLEFSCxt0NN45mGUPgAF14lIogeHiakWY=; b=bnL1ts3E1FVJQLW3/pqI1ea+OrTwKl8iYbxOvbdPFqaoPOUmHUzAQKFl58NgeVUves N2DVrgDm/utCj6eoWk/K1+09papFi0LzcFuYF1YntWevu70OdlBtU8NKPFDhXU3Conav Mx0opXUAoJk95GMuXP8N7eQncRfwCcwXYKc7kIM+QY4tqXS8hMrNolLWp7q3QPzSbOa/ 887vi6mTWteYu+MPKIR7Xiie+04ilOz7MhTjVDoBglZPGwgICBHnkY9bBBPHz1K3/6rh mjbBp6MeS1TPAlF23YyTl1UwFMmMxQw9GUv06CyfMQNy1P/G5q9lkIKEdD23xd4I7lqd qulA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575859; x=1791180659; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=jfT8oPSA0cGLEFSCxt0NN45mGUPgAF14lIogeHiakWY=; b=b1fFKgw7m+XbLzAscrBVwTRY8IeZfm0/LDdOtEyDZ51D0iyyokAbH4nKOWUVK+O9gT 0wUWlRvLXaQel0nQwXqratJ1xcKGTmt61WNUX2YA2EUq6Su/02vIGsNP4YH6BMnZptYI KO5E1cQQqrGKdaiyZZNiMT0QABkdGcDzZqos7If/oFtL0qGe6k3WPIFQRpoDutKxrvRO FhKmOmG36bq1glrlQm5GHCUqU+dRmmPsg4Tjvmsfug7SOYYDmWvzf8YXA07YCahsHHJG ClSTfCe3Bwe4fteryQfTRPTW35YKV22MiTThtb4zjJIUFGI5JybxwE5gC1D1JxMH5leU VSwg== X-Forwarded-Encrypted: i=1; AKwUvBy4COTrHAxEgdu6f25552WamAhoIx1j/7BLIbhaD+IfmOGmBRO3UWxt1YGMUjyTIQfIt97sRjuQc8hRgoU=@vger.kernel.org X-Gm-Message-State: AFq9FYJHBrstMIilQiz2iG48HYiXeBIyXFk34twzR8bQKWhcSKCjwmSD LrdcbPy6K2GJp+G6QYdBf0WEjWLJOtmxpjnCMaA1Tk+YtSS6+aJjSd/V/bWvHyCCcYP7XNCEcOq IDkxax6YDJVkcf1QjDaAH2Kvfd6Jxylzh7WMFDykuqMiME3yKcAIVuYb+4IbzWpZr8xk= X-Gm-Gg: AYBFou3W7pl0nIut4DJOhl8lbsbrmmtVWtax0aCIyECJUrpAz7gDdXWWqbe5/K2ps9Q 4NwR22i6aojJO6k1zoFSzfhNawZzYCs+RFR4YZyf51rU5xhLFu0IOeQWAcqFBa0QllLbctdXAzZ wk4v74BqVNP8q3qCZtqZrTu+dlJF6oeAUqf2LdIASbNMnD5yRVh20i4IuO+CSdAYyyqIMAiO1Gr kUAZxsMY/BRdjdomCs0Eqksjhen62rOIoEFzG8WqV+B37ma5OJBhcULMyPTPyRAb/l0pqVjdzD2 23MyWG0JTRpC+MTSor9o59U0lZkL7jwHMnjnE7PxYUjDqymegUSOEnoN9Wf14iFNyX/GgZHx7Ek B9jzzLnvJB4qmJBuEpCnpCeAq9oitiOY9DUoq X-Received: by 2002:a17:90b:35d0:b0:3a0:df61:3fe8 with SMTP id 98e67ed59e1d1-3a0df614b3emr3891104a91.13.1790575857332; Sun, 27 Sep 2026 23:10:57 -0700 (PDT) X-Received: by 2002:a17:90b:35d0:b0:3a0:df61:3fe8 with SMTP id 98e67ed59e1d1-3a0df614b3emr3891061a91.13.1790575856656; Sun, 27 Sep 2026 23:10:56 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.10.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:10:56 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:20 +0530 Subject: [PATCH v26 08/10] arm64: dts: qcom: Add psci reboot-modes for lemans boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-8-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla , Bartosz Golaszewski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=2178; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=HY9fLa8u8u31BscwdrGeQccVQPGFQUgGa2K581SXsxg=; b=ISNKMf7RMjaU+bv5/aCDnX25z901Q9bqAKTDSWTlUTv61Ly921JCiACTAvjmSsgsSC7vVVaDn KfWEYUs+lA1AOkcX2OWs5xupnWc1Au1ilF9NORSNXjlWEltiZFYEAKp X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-ORIG-GUID: URJBRhYQlpDnG5p_FtqqsbdtlCqc4mWO X-Proofpoint-GUID: URJBRhYQlpDnG5p_FtqqsbdtlCqc4mWO X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfXyHOtyYh/YC0k NEsJAxKQuAGJHmDrv1wlPdL2ABBPhqj9UtDFzd8M5x3edUaqo+kOLZBwp3JAHJnjksDyjCMxssC pW5PCW+Qp11MlMZ5Q7ScyN4kFrzpovY= X-Authority-Analysis: v=2.4 cv=EqRHPicA c=1 sm=1 tr=0 ts=6aba04f3 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=t9IVmYW30V31rltyR78A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX4n6wYTwKIIf6 1ZGlcQIaBVg/R0q/iQJhnDJT8giQT12VtZeJ5PDm/dM3AiuWcj2y8H+an33V1scBMrv+iXB++ut PcpSKwdZy5TkrK5Fi43/5amscboEnsJZIgsBU8rvwgKqzwgCBB+HhJpc6m6lgipDCP+5Vor5lL5 /wPj+BDTkPRpwMkyKwoBPRM0Y467rKvf3/+lYiqQJUUNBI3+/KcV7k9PrmFtihHgqd5hrMggOSJ n3HRsqFfEkOMuKwfcDeb5RD6L+ZL5mTVFXYWb67fQ3AhS25IlUjnzOTUZqeXbn+GDS14BziWFKi nwpxWYK11qfd7L3GnJX/PNX46nufi2i+PsySW6jpj9L3uAwfzD//JknHHO7Atf7WjHvWuOOdn80 H6FRaFPKxwnoMi7G61GDkLEOb9A7j1LdMpWzHrCTL8l/ofqYI8Tg9x+GyNjiqApeqnr4FtWES7U 47KveiqNYOwpdFIV0Qg== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 phishscore=0 clxscore=1015 spamscore=0 malwarescore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 Add PSCI SYSTEM_RESET2 reboot-modes for lemans-evk and lemans-ride-common(sa8775p-ride, sa8775p-ride-r3, qcs9100-ride, qcs9100-ride-r3) for use by the psci-reboot-mode driver. The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent. Reviewed-by: Bartosz Golaszewski Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 7 +++++++ arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi | 7 +++++++ arch/arm64/boot/dts/qcom/lemans.dtsi | 2 +- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/= qcom/lemans-evk.dts index a45485b54a5b..87d01acc7b5a 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -911,6 +911,13 @@ usb2_id: usb2-id-state { }; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qup_i2c19_default { drive-strength =3D <2>; bias-pull-up; diff --git a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi b/arch/arm64/= boot/dts/qcom/lemans-ride-common.dtsi index 144f117ba511..0adf9f02c8cf 100644 --- a/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi @@ -800,6 +800,13 @@ &pmm8654au_3_gpios { "GNSS_BOOT_MODE"; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qupv3_id_1 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/qcom/lemans.dtsi b/arch/arm64/boot/dts/qco= m/lemans.dtsi index 695eae1b7256..f0633b81a04d 100644 --- a/arch/arm64/boot/dts/qcom/lemans.dtsi +++ b/arch/arm64/boot/dts/qcom/lemans.dtsi @@ -550,7 +550,7 @@ pmu { interrupts =3D ; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0906D353A82 for ; Mon, 28 Sep 2026 06:11:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575870; cv=none; b=JJP/D4UGBbFuDwwMn/1NPA+wiriZJ7SNo+81tNwTt/LcpRmwjMFjbOwKlmqZsA5y0uqQRAJGLjg3e/MHo00SgF2ISAQE5NvWV7at8dsZ9XZufoHEJxJ9JSpKRKPlFGnHfnUubUWCQTYIfnbBW//1YeEcN0qCQTNWNkrYNRbLr+g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575870; c=relaxed/simple; bh=HciPNJeroVrXrUOsjAQZrtcE5R9UzHaUh1eqHckGx+o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sQQZUnWQpEtEsn7f1Cok/mTjp6t1e8TpCCgM0JoQnKt2PxlgVtkOlRHHuj+SGR5uPNiUUlIZrntwgJD3zsmKrwvVlfrV0KMQejrzRNC/kLVukS0Va1qw+xv6mNYkNf/jxEro8PcP/23Gnwd3L1ubRQ+J5IUavIRfNlYXTi+5A04= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=lT6eAn09; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=OtXwLI+1; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="lT6eAn09"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="OtXwLI+1" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S5XcU41666677 for ; Mon, 28 Sep 2026 06:11:08 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= btXV6KHGAw3+GaDmIGslj+LlIRfZXkr4tQ4AjomFcuM=; b=lT6eAn09ZKNl93FF IwDLvdXtBQkdHxmSi419qsPKTJyUZUAfCVYakruwKtcv3xSjTGH8pNaLuj9LpgCr Xvp0SS9c6YJBSzSfwFHCDQRz/oPKWMmXUvbyUDnUYQNcA/+iSsI2bzHL9OZE2zq5 nUm6OwK43BhDnkJUyhWz06+iUXWor20dYxEf+myujaQfhrpwCacO5hdGCxSlnHaI DTPQ67V2lOlfENuhT9DeZorI9+jKq9rIBpxKTm2Y+dlmPIgRgRIk0i+flndELyaM h9LL6nB5Ja42OGVkksvsSMSx11VZBguVxWWANfy+2lJAPffSI9e+enNMkmbDQt7X lTC1UA== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gyj6t03v7-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:11:08 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-3823dcc1647so2032153a91.3 for ; Sun, 27 Sep 2026 23:11:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575868; x=1791180668; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=btXV6KHGAw3+GaDmIGslj+LlIRfZXkr4tQ4AjomFcuM=; b=OtXwLI+1cbHwS+BkmEm2a963LbSE8+iYVF3L0vVTnpD3nTKxWQwCxL0E2oQl01w3ep gd9T+CI61e5SvmBJi0CxmrOBPdIRlfL1R872grFEjNolpJSyd8VmIsSvyvm7/kIsKxBt CjnZQonyq1L2d9feOnpnxZRefHjBKkEHtg/8cJSsFsccBErCSa3JJH3Ve9CIDH9y9ALR UzSdlvuyu1SWqBeO7kNa9/L0tZTk9uaBHFVJUp1wYqfVHUv1kDh5ScCyFmy+7fWJ5t9J e2ev1AwajObCYOcXu10mvlqk14bqPBcSWsWlWpSXDGTtgXjMOcKZZDG7C6NGyU811W25 mrfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575868; x=1791180668; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=btXV6KHGAw3+GaDmIGslj+LlIRfZXkr4tQ4AjomFcuM=; b=Sja9hvPR/GQN2iQMdLffrVl5oRbSWIVTECtaQ47dbakBWXKsQSCD4z+pFDgj9dgONH 9JE6c5pYT88m6XRtXBN22ZZtHSpAQeFvwoO5cANMCNAckrb5pt1QpPTuIBKLmH4u6JXo owZFtuO72KSaMjlTO2GNZplqMMhoqwIA6fCnznyvC59xO9BcBedKBpak1MCdHMdNjWU2 4lyfz4VQ2xX2xkW9QAOnN89W5L6yF6aITNHXuQOHm92Q3yVWCAA7g+UG7Vg9xf+6eXjA y7lZYBSc58M5Lmv9vEJpLQJCkcKPllsLj27ngvMdLUTVuo/ioYRgbD4GR5oaJu2e2ab+ qFeg== X-Forwarded-Encrypted: i=1; AKwUvBwqTw5Px3MB+wuYw9A2f4+HluPy6t2FuOjoF/vGgYdXWJ4+CaYxSXYaf4GjMBVZdCjSbbuv4zmwKjhEy5E=@vger.kernel.org X-Gm-Message-State: AFq9FYK1TFe2DY75fVfuuDncyIHmrtmI3ybq+57lo+Zx1koOrwacmHoj nD/s6+AtIS8ckQKHDs9P/ciXqXZPvW5ZJ5oDENFRIjW/44Hfolm20V9MWZ16H4EhiikMKqPZ+2Q 4Kf+OdHhn87mViEqLnz11QaLg1cPxWU2lMnnSU+6RyE+8S4F3Q9NrjBykheLRAOjvDE0= X-Gm-Gg: AYBFou0lab64zfTCCLOqK2kZnRwwq4QB0SjxtFqnTXMSj0njuEeIMLkJSJY59jJP+2G tQUNLf4ScqLkgFV8VJEgJHE48bBGdp8KRud3IX47oSqHuu+zyYmhg+olTkp+jFtAbKNvlUbEShi wRN1t0MoSJGB8MNyB5agI0I64Xjwz2QOwIyCR5x/Gb2B3RKsHn8BoXpLEL7SRMJ89xVg3REy2Z2 AhYWIRWPXzjSLXxhUmJEqsEfjttb61f2YlubKuFwLfn8U7WUxXrfK88y2J6JjDhcPQDci/0oWue GiAGRRM+V+6joeyy6ZLJ5gJMPRY9PjI9ZGrdiYdbz8agYOA6Ouif3/NtYEKnRWQO1LKsAxaLXH2 3DnDpXdIuJxWJp92pcJ8NgssQJTOlmJJP+okk X-Received: by 2002:a17:90b:5447:b0:3a0:af81:3bb4 with SMTP id 98e67ed59e1d1-3a0af813ec3mr8396919a91.3.1790575867609; Sun, 27 Sep 2026 23:11:07 -0700 (PDT) X-Received: by 2002:a17:90b:5447:b0:3a0:af81:3bb4 with SMTP id 98e67ed59e1d1-3a0af813ec3mr8396900a91.3.1790575867160; Sun, 27 Sep 2026 23:11:07 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.10.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:11:06 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:21 +0530 Subject: [PATCH v26 09/10] arm64: dts: qcom: Add psci reboot-modes for monaco boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-9-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla , Bartosz Golaszewski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=2076; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=HciPNJeroVrXrUOsjAQZrtcE5R9UzHaUh1eqHckGx+o=; b=hPf+aIICqH5htfgWp4dOT7kChia+2ZMeqDSjDVyVxFVsQKuug44L112lAdROLl7vrj4p+53OX YYt2OCBrbX+BYkXzqST4XOmtjjqMQCT4q7YuDtFj8Sd1NNpXztj7COl X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX+Rv5ixaD21tX UhlUG3E2ia+Wft/58Aja/wRozbIp/2guVe/N8I12FKxpSspqOZv//vq5Mr24lnIaiow2CWdxRj1 PAxiEX0fREoOaPJX4Rl8D0ww6xFsjPTKLcF8atz8Idwll+luXDkGTgavNqeCMUh4ilZvcxe3ILd +ZghGO0MJBr0U/O+6iwNocfjgtDnqxk4LXODOdpy5paUYCbnPeqRHkWISOkzIExNkMtRGAAkiWf H3ReJHUn3M0qHnfApJp2TsyPLf+/lCzG3aYUdXQjxaSqH5KFSGKEuCGo1C5EF3H6wwnhqTaW5Ly AvED0IYC12cY8NpM863MSu/xYxNfFtAVpP396DDI01Y326W2f+hz3ORcfL67qa/HPioQz7jt8u+ AY0C1+aYXQ5jz0nifEHnwlG0cxmH+RKdJe+fxe040i8pLnoONPjfMCkIq5FukYSm0uskaUz9Qqb D5Kp6guDm6TRdYB28Ew== X-Proofpoint-ORIG-GUID: cg46t6NF0fZQTNTUan8E5q2kG40vwTmP X-Authority-Analysis: v=2.4 cv=dZkVTnXe c=1 sm=1 tr=0 ts=6aba04fc cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=t9IVmYW30V31rltyR78A:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 X-Proofpoint-GUID: cg46t6NF0fZQTNTUan8E5q2kG40vwTmP X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfX7p+zO40rImqc hgVeOZCX44WnxKVtIfIL452Bvx3WeAznAUoVmjg9EZ+UEBOzTROtH2JDyvi0mZuKpFbg/8Ib1NQ uNAEke8H58LyNTI0d1inqPjOC1vpmos= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 bulkscore=0 clxscore=1015 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 adultscore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 Add PSCI SYSTEM_RESET2 reboot-modes for monaco-evk and qcs8300-ride for use by the psci-reboot-mode driver. The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent. Reviewed-by: Bartosz Golaszewski Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/monaco-evk.dts | 7 +++++++ arch/arm64/boot/dts/qcom/monaco.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 7 +++++++ 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/monaco-evk.dts b/arch/arm64/boot/dts/= qcom/monaco-evk.dts index 9d17ef7d2caf..df668dbf2bc6 100644 --- a/arch/arm64/boot/dts/qcom/monaco-evk.dts +++ b/arch/arm64/boot/dts/qcom/monaco-evk.dts @@ -661,6 +661,13 @@ usb2_id: usb2-id-state { }; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qup_i2c0_data_clk { drive-strength =3D <2>; bias-pull-up; diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qco= m/monaco.dtsi index 395d32d36844..9f1ab59dee2d 100644 --- a/arch/arm64/boot/dts/qcom/monaco.dtsi +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi @@ -654,7 +654,7 @@ pmu-a78 { interrupts =3D ; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dt= s/qcom/qcs8300-ride.dts index 1ff39530ea3d..aa95584b000d 100644 --- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts @@ -678,6 +678,13 @@ &mdss_dsi0_out { remote-endpoint =3D <&dsi2dp_bridge_in>; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qupv3_id_0 { status =3D "okay"; }; --=20 2.34.1 From nobody Fri Oct 2 09:22:52 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E35DB41440A for ; Mon, 28 Sep 2026 06:11:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575882; cv=none; b=Szh+91v8bKsl0orlk8EcQGRu08LEOkG4SUpteRlRZGzHyCMDphaN8LiQP1sjg3YVEiZpzpiVcpC21hPNVnhqA8su0N9askaBOwcHbD7axH0peN+4LXgPeH9hFOF/ceg02ycgfFZIQ3SNoWgfaR0yWb6U6fYMlflrCuEmFiiKw4A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790575882; c=relaxed/simple; bh=4fTpCSkuJ6PFbWarr8sThQ/LuS8y6G1v4667LcR6KHQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CnVr/Nzqwvh1BpZFY3VKVAYAG7lCOc2Vdh+qG/pVQlzCwhJJ8wVw76FgwnmKz+31Xbc+LNtOj/50qYukNNXzSiwHT/irvLcPZgzawRJRU0ruKu2m1Il54PF7NoGd4FtwgPhbWvv5hJkUybVSUs8xJdGFZtAKbpm97Z0i8ENkjgg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=EOZ9ZjuI; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=O8P7nbum; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="EOZ9ZjuI"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="O8P7nbum" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68S1F1Uc359200 for ; Mon, 28 Sep 2026 06:11:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Y8QpsQNU1m4GxJroPAMjexZ1MBknKFRA0AkELRZtXV0=; b=EOZ9ZjuIE0dduKpo B6a2rcfZiNXle3ufVs7znH6/cZ6JJDFXCZP9DkslJe/QkLc+ymFVpZP+s4xD/ZbN h33Nt5onGkNeBDusGwEU1GVQw2mNpcow1gLibzZ3YeL+O+9zhV4CyZxUdsk1Me/T 1RPhMa6CeK77aQoheDLOTGloArl/61SZHFTihiBbAdRQQySW/QhcvPUDJVNmK0ge uld8V+OzApogWvsR8NgT5ueCX5oyt/R/lncIq10YlIO5ByzuE2HfMDcyBmlRUPC7 w4avWK2ZUl1REN+0KGSHOqdfHM6KziTUxsCvrolM+sZS+5005rpQeOZYe1PhyYA7 cJWrFg== Received: from mail-pl1-f198.google.com (mail-pl1-f198.google.com [209.85.214.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gx6e84pe8-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 28 Sep 2026 06:11:19 +0000 (GMT) Received: by mail-pl1-f198.google.com with SMTP id d9443c01a7336-2e12723dc7aso9892635ad.1 for ; Sun, 27 Sep 2026 23:11:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1790575879; x=1791180679; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Y8QpsQNU1m4GxJroPAMjexZ1MBknKFRA0AkELRZtXV0=; b=O8P7nbum2XEu12GmR96G/XitTqsa15OTs2whBbl01k0pbzrx+nQ4xJ2S0Re3EZ2uv5 BW57nqGEqvkJFZt8+2TaMTsVL2cIIMS0bq01iZ05U9t5mDLZuf0vYVhpzdQzW+C0nMz4 BzYlBRfo6sSl9vEmfZzYtnFkYCoyp4xIygxWPrZl17sR0J4kwcEUZPeRA4S07XxHpZJA /RgAuK11AIgZbi3kviiAvqy3wZgBBMZ5asx9sruhMWaso1Yliu4PyCOdEGsrP4R/JO6q K0lBXC1nZT3aJh/woohYrckJIZzX4LiJ6EO57TejBYkopVnFnsrsciwIntLyKAAf7ZxM 3qxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790575879; x=1791180679; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=Y8QpsQNU1m4GxJroPAMjexZ1MBknKFRA0AkELRZtXV0=; b=yOM/pR6TYWf0WIqRBLh6kQks9COohbdyn+3lWcl3fCZu+yxLk6/cKdX2rjEedKTGWb pYXWp8mHZpiT/lqNucg1WZh5NAfriBD4qJeHuuyS8533AKKndRU/uMqbg6DXxPJzL083 j1rpwQOOqBr56Wp9cFIhXFWOe4fgt18xk6vwnEhDD8LxT7fvvBd9/H5uffQNIevldiBa 9jkh4l156CtaSR/uQjddMLqGfGXYh/OYdTfwkJOaL7O8kzKcIIFzeRn7y2Kp4HYmiPaY 2uzC+ZhYkoCLKTTXMB/31wfCFz/mjlYb4j/Ucy/Lv5eA4PE/gE+hvTMLzic8fFyqJOoI 7/XQ== X-Forwarded-Encrypted: i=1; AKwUvBxvsSzpW0Rhwzjd0sjeOMvLIlE/zDwc1IPYwfsLU9OLz2uEH9O/d0FohdfbWgkgwmNQM9prqQTlhGTZ1Ew=@vger.kernel.org X-Gm-Message-State: AFq9FYKR9gofhtLDafT6zrgqHP5A85oB1uH89AbbUgOjf4VuzViBTaXs lRoAsLYASRKcqt+sRI91lTZSPPKX7Qz7y7QrN+R4pTfOCi/aDH7cIZMIOcN3DC7BYffYsiUpFaw /PVD0aH9PNnRTJBOOSRvOUgnGTPzuniuqI/dh/6tyvyirfB7cr95fn5SAbsHqJuMAYDc= X-Gm-Gg: AYBFou3XjhFOnKXMNcCfR0NygyhHf6V/AgQYKiyK/bgM0JgSeKZ8SRdxrT6HXKFqvWh 9SQC8co5YMHMq2W0Fe81N7JJCSbammC2f+hiDG7/13iJkAcjOcd100d6DGEFxg2Y4vl31IxZaIa iJ/XcO02bhbZxnQqrfVvTNrwClqvC5upU2Q2B22dyZcYqzCs4k5PPv9rEvvDer17d+zIwgPtSTp Aj15ILKzvC3QK8jrTXZt5D7QazLxVXPf7AJHU4Pqh3dYfZpN/e92wEyCf97c1REE8PwG0g+Ek9j ytOuXuuM/q5YG/X82eZKgUdK+NxKZmZI91c5QYX7qqSHCjvAoa5l9GUWEPob/6SKzNeRqHXOul/ PGtiU3rpvigPA+P19HSOzGNzF88eTo5ENS2Ty X-Received: by 2002:a17:90a:e184:b0:3a0:dec0:c0cd with SMTP id 98e67ed59e1d1-3a0dec0d419mr3306198a91.28.1790575878638; Sun, 27 Sep 2026 23:11:18 -0700 (PDT) X-Received: by 2002:a17:90a:e184:b0:3a0:dec0:c0cd with SMTP id 98e67ed59e1d1-3a0dec0d419mr3306155a91.28.1790575878091; Sun, 27 Sep 2026 23:11:18 -0700 (PDT) Received: from hu-spratap-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0b8efb156sm20040846a91.1.2026.09.27.23.11.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 23:11:17 -0700 (PDT) From: Shivendra Pratap Date: Mon, 28 Sep 2026 11:39:22 +0530 Subject: [PATCH v26 10/10] arm64: dts: qcom: Add psci reboot-modes for talos boards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260928-arm-psci-system_reset2-vendor-reboots-v26-10-b24e2348e8e1@oss.qualcomm.com> References: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> In-Reply-To: <20260928-arm-psci-system_reset2-vendor-reboots-v26-0-b24e2348e8e1@oss.qualcomm.com> To: Lorenzo Pieralisi , Arnd Bergmann , Bjorn Andersson , Sebastian Reichel , Rob Herring , Souvik Chakravarty , Krzysztof Kozlowski , Matthias Brugger , Mark Rutland , Conor Dooley , Konrad Dybcio , John Stultz , Moritz Fischer , "Rafael J. Wysocki" , Daniel Lezcano , Christian Loehle , Lee Jones , Ulf Hansson , Pavan Kondeti , Abel Vesa , Bartosz Golaszewski , Sudeep Holla , Andy Yan , Ulf Hansson Cc: Florian Fainelli , Krzysztof Kozlowski , Dmitry Baryshkov , Mukesh Ojha , Andre Draszik , Greg Kroah-Hartman , Kathiravan Thirumoorthy , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Shivendra Pratap , Srinivas Kandagatla , Bartosz Golaszewski , Song Xue X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790575761; l=1558; i=shivendra.pratap@oss.qualcomm.com; s=20250710; h=from:subject:message-id; bh=4fTpCSkuJ6PFbWarr8sThQ/LuS8y6G1v4667LcR6KHQ=; b=AMvkpSWzxwQY0CuENEaT8ITCw/S6jnAL+oA3VU3+sR8bNDE0XnmTyr0/xXJtY9qk0oE8mfl7T unyxriQsCX6DQU4c60nqAj+Rn637XuMoZInvm/6h76J6yvlr0MHSgoE X-Developer-Key: i=shivendra.pratap@oss.qualcomm.com; a=ed25519; pk=ssWsJFX3OM9pkdoe4+guOfGPaulHOFt0GVnVlB6on+s= X-Proofpoint-GUID: M2ZzebDhQwrZ-4mT5fdHREEl6qRiUuqj X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfXxbjCe8E+0nsK duy0kFSlTQHECJ6Lw+/LDfnxTGA5Pu0+H79KCWAGs49bchpMAoD2L7wUdu1n1aJwmyxlzOFdGYG EFSsV/SDJlAyZqerDrYmACjRQMYL9C2WUwPx+HsP3sVG11segHLeuIQD4VLdDlMLLHF2WBB/d3S ifLAiLGAqp9izDu+0haQ+4WQdf2ICG+UJG038/qdK02M9/balt9eSogoWsfJOpPP79XedHtDt/O JxedT1rc7Oo19b7/dndrAccVEat4rG7qS3erxz7l0957IRE3LhmDkeJOqTldvVSF8HZjQ9yab1j Qbe+7D/eSWoDiefIuIndKZ+vhCoYQ/LsvDepy8J9AHvecwsOtVqas6Z/Elb7UKL5IoHCLKVBuo8 eFG4qbEcdYrXhQvPtj6XerdEE6FOsXC1+B/2BtleTJfAg/ZdGk3ufyCEcSOQzBwpCACVueMdYhQ S4mnn4+bheFPL4Pagzg== X-Proofpoint-ORIG-GUID: M2ZzebDhQwrZ-4mT5fdHREEl6qRiUuqj X-Authority-Analysis: v=2.4 cv=aIFlOr9m c=1 sm=1 tr=0 ts=6aba0507 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=COk6AnOGAAAA:8 a=bjH5yOvFM8yfI_BY5k4A:9 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAyNCBTYWx0ZWRfXzzXPEkVwpNSo m3x8Yn7YxrZrcDp2YVFELJhLhz1cC/ZdywsBw9h0BfdR9T2eMC6YDg2txh5uXyArydvgPoDYyia 6x+fCTFuQANSqoDcR9jvc8IOtae1GEA= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-26_05,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 suspectscore=0 adultscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 spamscore=0 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280024 Add PSCI SYSTEM_RESET2 reboot-modes for qcs615-ride, for use by the psci-reboot-mode driver. The following modes are defined: - bootloader: reboot into fastboot mode for fastboot flashing. - edl: reboot into emergency download mode for image loading via the Firehose protocol. Support for these modes is firmware dependent. Reviewed-by: Bartosz Golaszewski Signed-off-by: Song Xue Signed-off-by: Shivendra Pratap --- arch/arm64/boot/dts/qcom/qcs615-ride.dts | 7 +++++++ arch/arm64/boot/dts/qcom/talos.dtsi | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts= /qcom/qcs615-ride.dts index 047b4efb04b9..48d3519f50ff 100644 --- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts +++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts @@ -498,6 +498,13 @@ &pon_resin { status =3D "okay"; }; =20 +&psci { + reboot-mode { + mode-bootloader =3D <0x80010001 0x2>; + mode-edl =3D <0x80000000 0x1>; + }; +}; + &qspi { status =3D "okay"; =20 diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom= /talos.dtsi index 531cf41b94dc..a2197dec430a 100644 --- a/arch/arm64/boot/dts/qcom/talos.dtsi +++ b/arch/arm64/boot/dts/qcom/talos.dtsi @@ -581,7 +581,7 @@ pmu-a76 { interrupts =3D ; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 --=20 2.34.1