From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1739747884D; Fri, 25 Sep 2026 11:38:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790336342; cv=none; b=I06STLJxbhVf3L4YTrL/Zo2HS9DIGfIbbkJWRKFePTG61Zsjdj36/FsLC0P/unn3hg6Sm9pPVnDPHvf3ydRQQj4avogM8KvmCjeZQ+yoPAKDw8zkE4HlzK12dHk1mMwr/zLNJwrqbFC5taOe1o9pYEo57ofQf4eGS0LQJQHpdNI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790336342; c=relaxed/simple; bh=TRcjOVHscf7xvfG4sSHkIYPsycXdjpAkuuK5YxGhq5s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=O02ndsEam7zTn6hNrSXQKSqyrv04hpW4ddivkgpe3s5y2IVrrvku4aNQlMc3XeXwa+KuX1LkUFUaO9QbAz87QH62hPVvMs9ggHoQCJgqawEOBMfsRekB8tPMMYq50aHN27/JzAWZmfAyIKJcBIurMd9Gs0qAJgnJPLe2AqOJWDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=vFHoJNmD; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="vFHoJNmD" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 7880F1A101D; Fri, 25 Sep 2026 11:38:58 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 4CA4D6073B; Fri, 25 Sep 2026 11:38:58 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 3F4FD10329514; Fri, 25 Sep 2026 13:38:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336336; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=pIkmxVq8uDg12AO1nulSarilG8XMK+I4DUXbKRGn0nM=; b=vFHoJNmD33FmH0AxT/5zh0Yl+KtmSUItfl/eIh10AmyNv+cmi8GuUF4C4Ob/vGgvLbBzBk rsRkgoDfTnRrDzQxiZsVQt02ugLQkexjv2qkj13smR9Nql1yjpfhHO7gqujYNai7ct8da1 Pvy4YN9pshYP2fMnzleKJC4o0Gi5DCzOMeCUCkRYEG+vAjGHDp60iDsnOAUhVmS5U+NZ1i IWJSxnnJ7rAuQRtYxlJRzhl1CmTENVcTM0o5henaZovAxHn3nta9ikc0CG7n390hP64zTW rMu4vOgaCsHyd6DT1MiGbqONgoK6HIlvm/lECn9Mu8Vy7wcOuBXOhRtCBkm5HA== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:47 +0200 Subject: [PATCH net-next v4 01/11] net: dsa: microchip: fully save the periodic output request Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-1-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 When a periodic output is initialized, its period and start time are stored to initialize it back in case of restart. These information aren't enough if the request contains flags or targets a pin that isn't the first output of the switch. At restarts, these two arguments are always set to 0. The 'flag issue' isn't concrete so far because the driver doesn't advertise any .supported_perout_flags so any flag request gets rejected by the upper layer. I don't know if other switches use non-zero indexes but the KSZ8463 has twelve periodic outputs, so this index has to also be saved from now on. Save the full request when a periodic output is successfully started. Use the saved request when the periodic output is restarted. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 33 ++++++++++++++++++--------------- drivers/net/dsa/microchip/ksz_ptp.h | 3 +-- 2 files changed, 19 insertions(+), 17 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 39cc70d65900..47cf397481d5 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -189,6 +189,7 @@ static int ksz_ptp_enable_perout(struct ksz_device *dev, { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; u64 req_pulse_width_ns; + struct timespec64 tmp; u64 cycle_width_ns; u64 pulse_width_ns; int pin =3D 0; @@ -222,13 +223,9 @@ static int ksz_ptp_enable_perout(struct ksz_device *de= v, return 0; } =20 - ptp_data->perout_target_time_first.tv_sec =3D request->start.sec; - ptp_data->perout_target_time_first.tv_nsec =3D request->start.nsec; - - ptp_data->perout_period.tv_sec =3D request->period.sec; - ptp_data->perout_period.tv_nsec =3D request->period.nsec; - - cycle_width_ns =3D timespec64_to_ns(&ptp_data->perout_period); + tmp.tv_sec =3D request->period.sec; + tmp.tv_nsec =3D request->period.nsec; + cycle_width_ns =3D timespec64_to_ns(&tmp); if ((cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D cycle_width_ns) return -EINVAL; =20 @@ -249,9 +246,10 @@ static int ksz_ptp_enable_perout(struct ksz_device *de= v, if (ret) return ret; =20 + tmp.tv_sec =3D request->start.sec; + tmp.tv_nsec =3D request->start.nsec; ret =3D ksz_ptp_configure_perout(dev, cycle_width_ns, pulse_width_ns, - &ptp_data->perout_target_time_first, - pin); + &tmp, pin); if (ret) return ret; =20 @@ -263,6 +261,8 @@ static int ksz_ptp_enable_perout(struct ksz_device *dev, if (ret) return ret; =20 + memcpy(&ptp_data->perout_request, request, + sizeof(struct ptp_perout_request)); ptp_data->tou_mode =3D KSZ_PTP_TOU_PEROUT; =20 return 0; @@ -763,6 +763,7 @@ static int ksz_ptp_restart_perout(struct ksz_device *de= v) struct ptp_perout_request request; struct timespec64 next; struct timespec64 now; + struct timespec64 tmp; unsigned int count; int ret; =20 @@ -773,10 +774,14 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) return ret; =20 now_ns =3D timespec64_to_ns(&now); - first_ns =3D timespec64_to_ns(&ptp_data->perout_target_time_first); + tmp.tv_sec =3D ptp_data->perout_request.start.sec; + tmp.tv_nsec =3D ptp_data->perout_request.start.nsec; + first_ns =3D timespec64_to_ns(&tmp); =20 /* Calculate next perout event based on start time and period */ - period_ns =3D timespec64_to_ns(&ptp_data->perout_period); + tmp.tv_sec =3D ptp_data->perout_request.period.sec; + tmp.tv_nsec =3D ptp_data->perout_request.period.nsec; + period_ns =3D timespec64_to_ns(&tmp); =20 if (first_ns < now_ns) { count =3D div_u64(now_ns - first_ns, period_ns); @@ -791,12 +796,10 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) =20 /* Restart periodic output signal */ next =3D ns_to_timespec64(next_ns); + memcpy(&request, &ptp_data->perout_request, + sizeof(struct ptp_perout_request)); request.start.sec =3D next.tv_sec; request.start.nsec =3D next.tv_nsec; - request.period.sec =3D ptp_data->perout_period.tv_sec; - request.period.nsec =3D ptp_data->perout_period.tv_nsec; - request.index =3D 0; - request.flags =3D 0; =20 return ksz_ptp_enable_perout(dev, &request, 1); } diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index 7067ec9bd1e6..eb3827203b96 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -29,8 +29,7 @@ struct ksz_ptp_data { spinlock_t clock_lock; struct timespec64 clock_time; enum ksz_ptp_tou_mode tou_mode; - struct timespec64 perout_target_time_first; /* start of first pulse */ - struct timespec64 perout_period; + struct ptp_perout_request perout_request; }; =20 int ksz_ptp_clock_register(struct dsa_switch *ds); --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2F6D49B212 for ; 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arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="r2UzJwKN" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 2FD2D4E41074; Fri, 25 Sep 2026 11:39:00 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 043266073B; Fri, 25 Sep 2026 11:39:00 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 3DE33103295BD; Fri, 25 Sep 2026 13:38:57 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336339; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=y7Pag5diP3dKywVjmr56QgZ4XxqjFLvdFfdgGvGh5mU=; b=r2UzJwKNNebfSAJhwIuaFaeI8J22WjzgNjjsWeAn7LDTSTljRWh1/R76BKdWjVeVBs8MIF ktOTqPf5NLIh/Fa+XWSkaIy8PCVH2CwmZ9jbj/zDZDwF6oHywPxtfjaBFc1c7SXj+TAg0Y XL/x28otVShKsS2Mv7oc5zqP6N7lmPhDhuFAZhhpQlfKTo1gykUpE+/9/vOK4iYqzQF7aK t3wezZV6M2qkXYHV3dpel9JlxSlyb3EL5y2rZs0VA+HRQ+ISFh5fuovyBU0eJr661pFvtz RmOrOGeQrgVhLFqXwo+EELaywWcndkvkBRBzTFvdXUWJkj07S2+yJjzdeFMdAg== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:48 +0200 Subject: [PATCH net-next v4 02/11] net: dsa: microchip: add the number of pins to chip infos Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-2-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The number of periodic output pins available is hardcoded to 2 while KSZ8463 has 12 pins that can be used as periodic outputs. Add an n_pin attribute to the struct ksz_chip_data to make this setting configurable. Set it to 2 for all the PTP-capable switches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 10 ++++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 4 ++-- 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index f1b53439ff58..ac9a10a91d79 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1208,6 +1208,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .ptp_capable =3D true, .wr_table =3D &ksz8563_register_set, .rd_table =3D &ksz8563_register_set, + .n_pins =3D 2, }, =20 [KSZ8795] =3D { @@ -1443,6 +1444,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .sgmii_port =3D 7, .wr_table =3D &ksz9477_register_set, .rd_table =3D &ksz9477_register_set, + .n_pins =3D 2, }, =20 [KSZ9896] =3D { @@ -1608,6 +1610,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, false}, .gbit_capable =3D {true, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [KSZ8567] =3D { @@ -1645,6 +1648,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {false, false, false, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [KSZ9567] =3D { @@ -1679,6 +1683,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { true, false, false}, .gbit_capable =3D {true, true, true, true, true, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9370] =3D { @@ -1710,6 +1715,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_rgmii =3D {false, false, false, false, true}, .internal_phy =3D {true, true, true, true, false}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9371] =3D { @@ -1741,6 +1747,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_rgmii =3D {false, false, false, false, true, true}, .internal_phy =3D {true, true, true, true, false, false}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9372] =3D { @@ -1776,6 +1783,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9373] =3D { @@ -1811,6 +1819,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, false, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9374] =3D { @@ -1846,6 +1855,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false, true, true}, .ptp_capable =3D true, + .n_pins =3D 2, }, =20 [LAN9646] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 091cfbdc486f..9b911f9aafd9 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -139,6 +139,7 @@ struct ksz_chip_data { u8 sgmii_port; const struct regmap_access_table *wr_table; const struct regmap_access_table *rd_table; + const u8 n_pins; }; =20 struct ksz_irq { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 47cf397481d5..33416e59edc7 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1053,14 +1053,14 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.do_aux_work =3D ksz_ptp_do_aux_work; ptp_data->caps.enable =3D ksz_ptp_enable; ptp_data->caps.verify =3D ksz_ptp_verify_pin; - ptp_data->caps.n_pins =3D KSZ_PTP_N_GPIO; + ptp_data->caps.n_pins =3D dev->info->n_pins; ptp_data->caps.n_per_out =3D 3; =20 ret =3D ksz_ptp_start_clock(dev); if (ret) return ret; =20 - for (i =3D 0; i < KSZ_PTP_N_GPIO; i++) { + for (i =3D 0; i < dev->info->n_pins; i++) { struct ptp_pin_desc *ptp_pin =3D &ptp_data->pin_config[i]; =20 snprintf(ptp_pin->name, --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43828499F22 for ; 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bh=+NF8RyXSWFHXeDylfNL1aUVQjHWI8FbVDK+n17cU0to=; b=UMO9/xlijFfdqZUC+5BQtQWyxTdLGiTVhCoc+zRzfvh2WjOOaOOSY6D4NbPXxgz6UjtEuV IrYvRrCxykq1JuIIw5RcetfmLx1AkzwKWvWe6HNyxraeGCu5hUYw822uf48xPo6HY5NcOG eEqDRp32IWjksuwzi5SbB73IjLP6cW4mWIqcy8kAQj5ziZ+Rujva9bgABKg6holmQmYwTC XbnPIupG9/39tR/UKHAYl4UJvWdKwUpZzoBU3QgxVUUTDDAxYe5jHsSdbs+erozNsVYxKr AKg749DxmVbxc4s5E2mfj+C5mEcjt7MwZI2fAAJkTCMBtMqr7T+0s+nTBCQIEA== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:49 +0200 Subject: [PATCH net-next v4 03/11] net: dsa: microchip: add the number of periodic signals to chip infos Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-3-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The number of periodic signals available is hardcoded to 3 while KSZ8463 can produce 12 different periodic signals. Add an n_per_out attribute to the struct ksz_chip_data to make this setting configurable. Set it to 3 for all the PTP-capable switches. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_common.c | 10 ++++++++++ drivers/net/dsa/microchip/ksz_common.h | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 2 +- 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index ac9a10a91d79..ea6db85e7e2b 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1209,6 +1209,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .wr_table =3D &ksz8563_register_set, .rd_table =3D &ksz8563_register_set, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ8795] =3D { @@ -1445,6 +1446,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .wr_table =3D &ksz9477_register_set, .rd_table =3D &ksz9477_register_set, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ9896] =3D { @@ -1611,6 +1613,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {true, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ8567] =3D { @@ -1649,6 +1652,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [KSZ9567] =3D { @@ -1684,6 +1688,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .gbit_capable =3D {true, true, true, true, true, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9370] =3D { @@ -1716,6 +1721,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9371] =3D { @@ -1748,6 +1754,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .internal_phy =3D {true, true, true, true, false, false}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9372] =3D { @@ -1784,6 +1791,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9373] =3D { @@ -1820,6 +1828,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9374] =3D { @@ -1856,6 +1865,7 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { false, false, true, true}, .ptp_capable =3D true, .n_pins =3D 2, + .n_per_out =3D 3, }, =20 [LAN9646] =3D { diff --git a/drivers/net/dsa/microchip/ksz_common.h b/drivers/net/dsa/micro= chip/ksz_common.h index 9b911f9aafd9..f1c0e89e13c1 100644 --- a/drivers/net/dsa/microchip/ksz_common.h +++ b/drivers/net/dsa/microchip/ksz_common.h @@ -140,6 +140,7 @@ struct ksz_chip_data { const struct regmap_access_table *wr_table; const struct regmap_access_table *rd_table; const u8 n_pins; + const u8 n_per_out; }; =20 struct ksz_irq { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 33416e59edc7..84c799959aaa 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1054,7 +1054,7 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.enable =3D ksz_ptp_enable; ptp_data->caps.verify =3D ksz_ptp_verify_pin; ptp_data->caps.n_pins =3D dev->info->n_pins; - ptp_data->caps.n_per_out =3D 3; + ptp_data->caps.n_per_out =3D dev->info->n_per_out; =20 ret =3D ksz_ptp_start_clock(dev); if (ret) --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8F3048D89A for ; Fri, 25 Sep 2026 11:39:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="xDoA/J85" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 6BBEE4E41070; Fri, 25 Sep 2026 11:39:03 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3FBA86073B; Fri, 25 Sep 2026 11:39:03 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0D9D010329514; Fri, 25 Sep 2026 13:39:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336342; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=nRETuw8JsXEchs489Ud2eN1dEe38gGQ0nW0Z6hsxDl8=; b=xDoA/J85KSmiaAzghIGTC1VmRUK8eoGiullhVstUnkSvSP6mdjSAg39+UhCHzPFuof2CuE 2txUrgfjTvZCtahuA2Hdfe6Hf/PSqYHV6z2MfiF8gZn3gLbF9LeOJLcqweVw7ppmNWP9q5 p0uuT6jo8SNWEIUpBE66c1YV7syli33+Y6T7TGHkzvmUfT5yycdaPcUaT71dHPotfzSFDK 1v6nn/t5W7FbsbLIy40RnGJDQKp60gMIS9cQL4Ejh5N3f+gy8PADSw8TLgNJVDcKLz1AEn pNW2XvZrVKW5wlTCdR0uclDs3Oj2BiTgEK1MzMbVYUZ1I2ebfWYkVldYjlYxbg== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:50 +0200 Subject: [PATCH net-next v4 04/11] net: dsa: microchip: use dynamic mask to check pulse width validity Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-4-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The pulse width validity is checked against an hardcoded mask. KSZ8463 uses a smaller register than other switches so this check won't work for it. Move the mask as a ksz_ptp_tou_pulse_verify()'s input to allow changing it for KSZ8463 case. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 84c799959aaa..1889698691e9 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -86,7 +86,7 @@ static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 u= nit) 0); } =20 -static int ksz_ptp_tou_pulse_verify(u64 pulse_ns) +static int ksz_ptp_tou_pulse_verify(u64 pulse_ns, u32 mask) { u32 data; =20 @@ -94,7 +94,7 @@ static int ksz_ptp_tou_pulse_verify(u64 pulse_ns) return -EINVAL; =20 data =3D (pulse_ns / 8); - if (!FIELD_FIT(TRIG_PULSE_WIDTH_M, data)) + if ((mask & data) !=3D data) return -ERANGE; =20 return 0; @@ -242,7 +242,7 @@ static int ksz_ptp_enable_perout(struct ksz_device *dev, KSZ_MAX_PULSE_WIDTH); } =20 - ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns); + ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, TRIG_PULSE_WIDTH_M); if (ret) return ret; =20 --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B53C49B5C3 for ; Fri, 25 Sep 2026 11:39:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790336351; cv=none; b=SOYEyyFlhshsNP+iCCfKPQp4lGyka9FoMYvvkhddiXOpkpL9iZgqVZBuxTZLyo/iZ1qareCdqIFRrudU0ZQEAAjj8KPXPq9bH+5DKO8q0/Ll1yU+UF8wjnFBBE3gMX077uE5u8bEuu4CuA09dm1hE0BNK7xbRshzWIshaobeUbk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790336351; c=relaxed/simple; bh=BsgZWdO5bLd4DVeG8425aUEVscrrAndNjBHFpTf6PXQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=B5Vltve1hLruKyW8ZxcR8RrXg8NPO1covXAmqND8gahqjv+R+KJH+4KTDefGOroyp2q2JBTMZPR8AAUQQGQjMV8+lWH6sBTcDAHA3teuJ5Dl3DJP1p/a/i7KyMdOwZLBsYq99aDYEGgZi+qUKto8gG+oUwvFK/3LvfZBJAEI9f8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DbaOVFry; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DbaOVFry" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 274EBC13995; Fri, 25 Sep 2026 11:39:53 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 515016073B; Fri, 25 Sep 2026 11:39:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B5A6F103295CB; Fri, 25 Sep 2026 13:39:02 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336344; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=ozkQcZ2Q0dthWB4fUbaMbJU38C/FrxFUvT0/wrofu5w=; b=DbaOVFryCWzKrOGvEJ+1SMrAEuPDeols0FEMQ6VX+xdL+7kX9rURFHWCTiMs2KaeMIAKB3 h1SpMKOy3g3b/zYZgp8BKJjq1bLDQBIUe6hEndWRt99dW+qnN2y9yrrzZZ9T3cZ4phZ6kL ZNEU4rlFgw1glF4FYDZ//tlDru3o3iR3CEWEledaAPMjT0i2zqa74Ivr6wWhLut72spFHM qPxJlS7L6Brqrsj11IDgjZrxBk7nY31G23saJtombrSSajdRBN4wxFLSxq4JGMYIsaXXHO wwwmoB4Gik1WLfTOMaOD+FqOJcvyv8+x3i1wv6TvkYcLnhPBlb59nWxT2sPxbQ== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:51 +0200 Subject: [PATCH net-next v4 05/11] net: dsa: microchip: extract PTP callbacks configuration from PTP registration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-5-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 also has periodic output capabilities but the way its outputs are driven differs from the other switches. It will need its own set of PTP callbacks to implements this behaviour. Extract the PTP callbacks configuration in a dedicated function to be called before the PTP registration to ease the use of others callbacks when needed. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 2 ++ drivers/net/dsa/microchip/ksz9477.c | 1 + drivers/net/dsa/microchip/ksz_ptp.c | 20 ++++++++++++++------ drivers/net/dsa/microchip/ksz_ptp.h | 2 ++ drivers/net/dsa/microchip/lan937x_main.c | 1 + 5 files changed, 20 insertions(+), 6 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index d7498132064e..37b681d9e20f 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2589,6 +2589,7 @@ static int ksz8463_setup(struct dsa_switch *ds) if (ret) goto free_girq; =20 + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", @@ -2898,6 +2899,7 @@ static int ksz8_setup(struct dsa_switch *ds) } =20 if (dev->info->ptp_capable) { + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchi= p/ksz9477.c index 3ee995545c57..72528a53b67d 100644 --- a/drivers/net/dsa/microchip/ksz9477.c +++ b/drivers/net/dsa/microchip/ksz9477.c @@ -1781,6 +1781,7 @@ static int ksz9477_setup(struct dsa_switch *ds) } =20 if (dev->info->ptp_capable) { + ksz_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 1889698691e9..fd27e5851003 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -1031,17 +1031,12 @@ static int ksz_ptp_start_clock(struct ksz_device *d= ev) return 0; } =20 -int ksz_ptp_clock_register(struct dsa_switch *ds) +void ksz_ptp_set_caps(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; - const u16 *regs =3D dev->info->regs; struct ksz_ptp_data *ptp_data; - int ret; - u8 i; =20 ptp_data =3D &dev->ptp_data; - mutex_init(&ptp_data->lock); - spin_lock_init(&ptp_data->clock_lock); =20 ptp_data->caps.owner =3D THIS_MODULE; snprintf(ptp_data->caps.name, 16, "Microchip Clock"); @@ -1055,6 +1050,19 @@ int ksz_ptp_clock_register(struct dsa_switch *ds) ptp_data->caps.verify =3D ksz_ptp_verify_pin; ptp_data->caps.n_pins =3D dev->info->n_pins; ptp_data->caps.n_per_out =3D dev->info->n_per_out; +} + +int ksz_ptp_clock_register(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + const u16 *regs =3D dev->info->regs; + struct ksz_ptp_data *ptp_data; + int ret; + u8 i; + + ptp_data =3D &dev->ptp_data; + mutex_init(&ptp_data->lock); + spin_lock_init(&ptp_data->clock_lock); =20 ret =3D ksz_ptp_start_clock(dev); if (ret) diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index eb3827203b96..b23040f47b9c 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -32,6 +32,7 @@ struct ksz_ptp_data { struct ptp_perout_request perout_request; }; =20 +void ksz_ptp_set_caps(struct dsa_switch *ds); int ksz_ptp_clock_register(struct dsa_switch *ds); =20 void ksz_ptp_clock_unregister(struct dsa_switch *ds); @@ -64,6 +65,7 @@ struct ksz_ptp_data { struct mutex lock; }; =20 +static inline void ksz_ptp_set_caps(struct dsa_switch *ds) { } static inline int ksz_ptp_clock_register(struct dsa_switch *ds) { return 0; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-6-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_enable_perout() function needs to be created. This function will use the same algorithm to select the output pin as the common ksz_ptp_enable_perout() function. Extract the pin selection algorithm into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index fd27e5851003..79520d345efc 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -183,6 +183,26 @@ static int ksz_ptp_configure_perout(struct ksz_device = *dev, return 0; } =20 +static int ksz_ptp_get_pin(struct ksz_device *dev, + struct ptp_perout_request const *request) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + int pin; + + if (request->flags & ~PTP_PEROUT_DUTY_CYCLE) + return -EOPNOTSUPP; + + if (ptp_data->tou_mode !=3D KSZ_PTP_TOU_PEROUT && + ptp_data->tou_mode !=3D KSZ_PTP_TOU_IDLE) + return -EBUSY; + + pin =3D ptp_find_pin(ptp_data->clock, PTP_PF_PEROUT, request->index); + if (pin < 0) + return -EINVAL; + + return pin; +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) @@ -196,16 +216,9 @@ static int ksz_ptp_enable_perout(struct ksz_device *de= v, u32 data32; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-7-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_enable_perout() function needs to be created. This function will use the same algorithm to compute the periodic cycles as the common ksz_ptp_enable_perout() function. Extract these algorithms into a dedicated function so they can be used later by the KSZ8463 support. Add some checks on the period to ensure the request is valid and will not cause divide by zero issues if the periodic output is restarted. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 62 +++++++++++++++++++++++++--------= ---- 1 file changed, 43 insertions(+), 19 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 79520d345efc..4b57cf076bb4 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -203,12 +203,50 @@ static int ksz_ptp_get_pin(struct ksz_device *dev, return pin; } =20 +static int ksz_ptp_compute_perout_cycle(struct ksz_device *dev, + struct ptp_perout_request const *request, + u64 max_pulse_width, + u64 *cycle_width_ns, + u64 *pulse_width_ns) +{ + struct timespec64 tmp; + + if (request->period.sec < 0) + return -EINVAL; + + if (!request->period.sec && !request->period.nsec) + return -EINVAL; + + tmp.tv_sec =3D request->period.sec; + tmp.tv_nsec =3D request->period.nsec; + *cycle_width_ns =3D timespec64_to_ns(&tmp); + if ((*cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D *cycle_width_ns) { + *cycle_width_ns =3D 0; + *pulse_width_ns =3D 0; + return -EINVAL; + } + + if (request->flags & PTP_PEROUT_DUTY_CYCLE) { + *pulse_width_ns =3D request->on.sec * NSEC_PER_SEC + + request->on.nsec; + return 0; + } + + /* Use a duty cycle of 50%. Maximum pulse width supported by the + * hardware is a little bit more than 125 ms. + */ + *pulse_width_ns =3D (request->period.sec * NSEC_PER_SEC + + request->period.nsec) / 2; + *pulse_width_ns =3D min_t(u64, *pulse_width_ns, max_pulse_width); + + return 0; +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; - u64 req_pulse_width_ns; struct timespec64 tmp; u64 cycle_width_ns; u64 pulse_width_ns; @@ -236,24 +274,10 @@ static int ksz_ptp_enable_perout(struct ksz_device *d= ev, return 0; } =20 - tmp.tv_sec =3D request->period.sec; - tmp.tv_nsec =3D request->period.nsec; - cycle_width_ns =3D timespec64_to_ns(&tmp); - if ((cycle_width_ns & TRIG_CYCLE_WIDTH_M) !=3D cycle_width_ns) - return -EINVAL; - - if (request->flags & PTP_PEROUT_DUTY_CYCLE) { - pulse_width_ns =3D request->on.sec * NSEC_PER_SEC + - request->on.nsec; - } else { - /* Use a duty cycle of 50%. Maximum pulse width supported by the - * hardware is a little bit more than 125 ms. - */ - req_pulse_width_ns =3D (request->period.sec * NSEC_PER_SEC + - request->period.nsec) / 2; - pulse_width_ns =3D min_t(u64, req_pulse_width_ns, - KSZ_MAX_PULSE_WIDTH); - } + ret =3D ksz_ptp_compute_perout_cycle(dev, request, KSZ_MAX_PULSE_WIDTH, + &cycle_width_ns, &pulse_width_ns); + if (ret) + return ret; =20 ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, TRIG_PULSE_WIDTH_M); if (ret) --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5F9649CF42 for ; Fri, 25 Sep 2026 11:39:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790336355; cv=none; b=ofqeBVYXz0VYikgAAuCIMvkmi4pZ49CeraHiB2lofg1QR8i4Utdea5V/Z8my9nAsoXKgMhTv6jVxETLWHE2FwT1EM0D5KVX7RnlQdZYkt6f68iYsuRARJkXrWTzHEVCnBdECxW3MnHFYzM5N6IelgyHKsyzJOTtgYLlZ8v+uzsI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790336355; c=relaxed/simple; bh=zN0UY+8k1ortZKtkmfbzKV6nHCMbJzFGk0htgycRxiA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s9A/R3QZ/dLpNfDIUj8rA7K5C7aIkTU6RZ4zeiNEOY2lapu7ZEOa8gmAj6RrZ3PGYMzyGJWObXLqXlQF+RaqVmLbD0c+OIBR4+GBbRTdphjymrJHxjQN06iMZZwE+0FRz63LbLUpVcFvf+rjj1ZG3/cqQemMme0NwRENS6wVRwo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=VPHDULU2; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="VPHDULU2" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 04F49C13994; Fri, 25 Sep 2026 11:40:00 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 254A96073B; Fri, 25 Sep 2026 11:39:12 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E7068103295CE; Fri, 25 Sep 2026 13:39:08 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336351; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=dFU3AsKo8uDni0cB/LxcdlinhPNeWxbfnSnnMoF7gH4=; b=VPHDULU2lVaALJKjRFEJh52yXl5F6dwMN0nAnF0evoOuazRYVrXAwjxTD2NSFwd9x6bi0c A/rudKF6s5mmlbIKe5vPopYo0O/PP0l/FxtbO9dPc4dPYqkCE5Rbav9rxLYNy9BOMRDo0M RQl6FEK2Amrj7xuipv2DFo11y1x6DFPrPKIppXZ7ldPfIv+LruMAQTfWjcaXNXczS9DihR Rvf0Jj+oss+El2bwdZPUyi9SJRHYmksNXU/CiuMRWb0wevKS4jJB2iKmK2ExYdBxAZscPw vd209ZY8JgB1gHhR1wy21q460CwFhxP4YUTD9iB2L2fBRbnk/9O08ubOtsAncA== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:54 +0200 Subject: [PATCH net-next v4 08/11] net: dsa: microchip: extract prepare reset Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-8-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_restart_perout() function needs to be created. This function will use the same request initialization as the common ksz_ptp_restart_perout() function. Extract the inialization into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 4b57cf076bb4..b627062dbaad 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -793,11 +793,11 @@ static int ksz_ptp_gettime(struct ptp_clock_info *ptp= , struct timespec64 *ts) return ret; } =20 -static int ksz_ptp_restart_perout(struct ksz_device *dev) +static int ksz_ptp_prepare_restart_perout(struct ksz_device *dev, + struct ptp_perout_request *request) { struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; s64 now_ns, first_ns, period_ns, next_ns; - struct ptp_perout_request request; struct timespec64 next; struct timespec64 now; struct timespec64 tmp; @@ -833,10 +833,22 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) =20 /* Restart periodic output signal */ next =3D ns_to_timespec64(next_ns); - memcpy(&request, &ptp_data->perout_request, + memcpy(request, &ptp_data->perout_request, sizeof(struct ptp_perout_request)); - request.start.sec =3D next.tv_sec; - request.start.nsec =3D next.tv_nsec; + request->start.sec =3D next.tv_sec; + request->start.nsec =3D next.tv_nsec; + + return 0; +} + +static int ksz_ptp_restart_perout(struct ksz_device *dev) +{ + struct ptp_perout_request request; + int ret; + + ret =3D ksz_ptp_prepare_restart_perout(dev, &request); + if (ret) + return ret; =20 return ksz_ptp_enable_perout(dev, &request, 1); } --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3730449E157; Fri, 25 Sep 2026 11:39:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-9-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_settime() function needs to be created. This function will access the same registers than the common ksz_ptp_settime(). Extract the register accesses into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index b627062dbaad..1244ef44df34 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -853,30 +853,42 @@ static int ksz_ptp_restart_perout(struct ksz_device *= dev) return ksz_ptp_enable_perout(dev, &request, 1); } =20 -static int ksz_ptp_settime(struct ptp_clock_info *ptp, - const struct timespec64 *ts) +static int __ksz_ptp_settime(struct ksz_device *dev, + const struct timespec64 *ts) { - struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); - struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); const u16 *regs =3D dev->info->regs; int ret; =20 - mutex_lock(&ptp_data->lock); - /* Write to shadow registers and Load PTP clock */ ret =3D ksz_write16(dev, regs[PTP_RTC_SUB_NANOSEC], PTP_RTC_0NS); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], ts->tv_nsec); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], ts->tv_sec); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_rmw16(dev, regs[PTP_CLK_CTRL], PTP_LOAD_TIME, PTP_LOAD_TIME); + if (ret) + return ret; + + return 0; +} + +static int ksz_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_settime(dev, ts); if (ret) goto unlock; =20 --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8682049E5E2 for ; Fri, 25 Sep 2026 11:39:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="IgHK4CUZ" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 3D4B51A101D; Fri, 25 Sep 2026 11:39:16 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 12CC86073B; Fri, 25 Sep 2026 11:39:16 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 886C0103295CF; Fri, 25 Sep 2026 13:39:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336355; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Tg4/FUhHVtBzkdz++1ILakEEZ65MTLOg4su3TmKClnQ=; b=IgHK4CUZtZn/xwOF1JZm34jBeSDAs46JL4G5m2JWG+iY/MVCK6uUbtZRz7zVjYSk48PiRu qQXuYYAGkozSH9OQ/YeQan11eLcKFho5ei1AUxKZI8PZJdc6rd95vb7HQsK48Tdil75zcC JNw1uBuMllZp9xwkiTV8Hb+ebAn2RyD+2JdCanADElP59/g40j3FAtJQCdCi3ejtxr1JIJ /QaYIgcDbpU190BjfIZnUidkmnP6PA30YeRLpPve1J7FMlEG93Uh6ESPaDqAefrHHo82Cs rRKgVJPI2Q/95Rh5nkXkQafjve279Q5yL9IEr4sBnjwinLVcYbi/Z54RjPIwZA== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:56 +0200 Subject: [PATCH net-next v4 10/11] net: dsa: microchip: extract time adjustment Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-10-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The KSZ8463 supports periodic outputs but doesn't handle them in the same way as the other KSZ switches. To add proper support for the KSZ8463, a dedicated ksz8463_ptp_adjtime() function needs to be created. This function will access the same registers as the common ksz_ptp_adjtime() function. Extract the register accesses into a dedicated function so it can be used later by the KSZ8463 support. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz_ptp.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index 1244ef44df34..c1c4c781bca7 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -954,18 +954,13 @@ static int ksz_ptp_adjfine(struct ptp_clock_info *ptp= , long scaled_ppm) return ret; } =20 -static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +static int __ksz_ptp_adjtime(struct ksz_device *dev, s64 delta) { - struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); - struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); - struct timespec64 delta64 =3D ns_to_timespec64(delta); const u16 *regs =3D dev->info->regs; s32 sec, nsec; u16 data16; int ret; =20 - mutex_lock(&ptp_data->lock); - /* do not use ns_to_timespec64(), * both sec and nsec are subtracted by hw */ @@ -973,15 +968,15 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp= , s64 delta) =20 ret =3D ksz_write32(dev, regs[PTP_RTC_NANOSEC], abs(nsec)); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_write32(dev, regs[PTP_RTC_SEC], abs(sec)); if (ret) - goto unlock; + return ret; =20 ret =3D ksz_read16(dev, regs[PTP_CLK_CTRL], &data16); if (ret) - goto unlock; + return ret; =20 data16 |=3D PTP_STEP_ADJ; =20 @@ -992,6 +987,22 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *ptp,= s64 delta) data16 |=3D PTP_STEP_DIR; =20 ret =3D ksz_write16(dev, regs[PTP_CLK_CTRL], data16); + if (ret) + return ret; + + return 0; +} + +static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + struct timespec64 delta64 =3D ns_to_timespec64(delta); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_adjtime(dev, delta); if (ret) goto unlock; =20 --=20 2.55.0 From nobody Fri Sep 25 22:19:33 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D83A449B454; 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arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="AffHLnol" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id B06BAC13992; Fri, 25 Sep 2026 11:40:05 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id DCE006073B; Fri, 25 Sep 2026 11:39:17 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 79252103295D0; Fri, 25 Sep 2026 13:39:15 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1790336357; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=hr1bHRzaPY6pIKKzJUYJIKvMhd3noUvM7lIDTFq/kPE=; b=AffHLnoldF3oXgrbkau9WC2PFWUHRLJfa4JJeVT38lYauR+8q8qBtPH4rFFX0tv6rZGql3 lOkRZzaJnsYq96jfQhAMzh1euw5V8vBZ7PIlFCrDV7cfy596UfYb4YQnJVq2IeNR6qwDoe KacRWOENWEq5tqQR5uBGOHLC7qQ7ai1KnMCx/R4YtGYGf1jHbKCf5xZECoceteYtm61S4P kD9N1VEe5FVc3o3yrDdO2CS+vcsUhdg+GPfz9uXmia/SqaC5X3kJZ9E1ZPfXhHvUVN2muC evZRNC+QqDzxQTrj4MqPcvJ5fTE9TtyeRUn8qtLFjnefVN+rTDnbo6NfcQTLBA== From: "Bastien Curutchet (Schneider Electric)" Date: Fri, 25 Sep 2026 13:38:57 +0200 Subject: [PATCH net-next v4 11/11] net: dsa: microchip: add periodic output support for the KSZ8463 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260925-ksz-perout-v4-11-d675bd21ce49@bootlin.com> References: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> In-Reply-To: <20260925-ksz-perout-v4-0-d675bd21ce49@bootlin.com> To: Woojung Huh , UNGLinuxDriver@microchip.com, Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: Pascal Eberhard , =?utf-8?q?Miqu=C3=A8l_Raynal?= , Thomas Petazzoni , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Bastien Curutchet (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 KSZ8463 has several periodic outputs. The way it handles them differ from the other KSZ switches: - KSZ8463 has one set of registers for each of its 12 units while others switches share on set of configuration registers for all their units. - Maximum size of the KSZ8463 pulse width is smaller - KSZ8463 has 12 outputs while others only have 2 Add support for the KSZ8463 periodics outputs through a set of KSZ8463 specific functions. Signed-off-by: Bastien Curutchet (Schneider Electric) --- drivers/net/dsa/microchip/ksz8.c | 2 +- drivers/net/dsa/microchip/ksz_common.c | 2 + drivers/net/dsa/microchip/ksz_ptp.c | 261 ++++++++++++++++++++++++++++= ++++ drivers/net/dsa/microchip/ksz_ptp.h | 4 +- drivers/net/dsa/microchip/ksz_ptp_reg.h | 16 ++ 5 files changed, 283 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/microchip/ksz8.c b/drivers/net/dsa/microchip/k= sz8.c index 37b681d9e20f..3c96dd4581cf 100644 --- a/drivers/net/dsa/microchip/ksz8.c +++ b/drivers/net/dsa/microchip/ksz8.c @@ -2589,7 +2589,7 @@ static int ksz8463_setup(struct dsa_switch *ds) if (ret) goto free_girq; =20 - ksz_ptp_set_caps(ds); + ksz8463_ptp_set_caps(ds); ret =3D ksz_ptp_clock_register(ds); if (ret) { dev_err(dev->dev, "Failed to register PTP clock: %d\n", diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/micro= chip/ksz_common.c index ea6db85e7e2b..767c8fe8e819 100644 --- a/drivers/net/dsa/microchip/ksz_common.c +++ b/drivers/net/dsa/microchip/ksz_common.c @@ -1175,6 +1175,8 @@ const struct ksz_chip_data ksz_switch_chips[] =3D { .supports_mii =3D {false, false, true}, .supports_rmii =3D {false, false, true}, .internal_phy =3D {true, true, false}, + .n_pins =3D 12, + .n_per_out =3D 12, }, =20 [KSZ8563] =3D { diff --git a/drivers/net/dsa/microchip/ksz_ptp.c b/drivers/net/dsa/microchi= p/ksz_ptp.c index c1c4c781bca7..1c59428b159b 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.c +++ b/drivers/net/dsa/microchip/ksz_ptp.c @@ -26,6 +26,7 @@ */ #define KSZ_MAX_DRIFT_CORR 6249999 #define KSZ_MAX_PULSE_WIDTH 125000000LL +#define KSZ8463_MAX_PULSE_WIDTH 500000LL =20 #define KSZ_PTP_INC_NS 40ULL /* HW clock is incremented every 40 ns (by 4= 0) */ #define KSZ_PTP_SUBNS_BITS 32 @@ -63,6 +64,17 @@ static int ksz_ptp_tou_gpio(struct ksz_device *dev) LED_SRC_PTP_GPIO_1 | LED_SRC_PTP_GPIO_2); } =20 +static int ksz8463_ptp_tou_reset(struct ksz_device *dev, u8 unit) +{ + int ret; + + ret =3D ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), BIT(unit)); + if (ret) + return ret; + + return ksz_rmw16(dev, KSZ8463_TOU_SW_RST, BIT(unit), 0); +} + static int ksz_ptp_tou_reset(struct ksz_device *dev, u8 unit) { u32 data; @@ -120,6 +132,28 @@ static int ksz_ptp_tou_target_time_set(struct ksz_devi= ce *dev, return 0; } =20 +static int ksz8463_ptp_tou_start(struct ksz_device *dev, u8 unit) +{ + u16 data; + int ret; + + ret =3D ksz_rmw16(dev, KSZ8463_TOU_EN, BIT(unit), BIT(unit)); + if (ret) + return ret; + + ret =3D ksz_read16(dev, KSZ8463_TOU_ACTIVE, &data); + if (ret) + return ret; + + if (!(data & BIT(unit))) { + dev_err(dev->dev, "%s: Trigger unit%d error!\n", __func__, + unit); + return -EIO; + } + + return 0; +} + static int ksz_ptp_tou_start(struct ksz_device *dev, u8 unit) { u32 data; @@ -147,6 +181,56 @@ static int ksz_ptp_tou_start(struct ksz_device *dev, u= 8 unit) return 0; } =20 +static int ksz8463_ptp_configure_perout(struct ksz_device *dev, + struct ptp_perout_request const *request, + u32 cycle_width_ns, u32 pulse_width_ns, + u8 index) +{ + struct ptp_pin_desc *pin =3D &dev->ptp_data.pin_config[index]; + u16 cfg_base =3D KSZ8463_TRIG1_CFG + KSZ8463_TRIGN_CFG_SIZE * pin->chan; + u16 data; + int ret; + + /* Hardware has only 32 bit for the second field */ + if ((request->start.sec & 0xffffffff) !=3D request->start.sec) + return -EINVAL; + + data =3D KSZ8463_NOTIFY_BIT | + FIELD_PREP(KSZ8463_PATTERN_M, TRIG_POS_PERIOD) | + pin->index; + ret =3D ksz_write16(dev, cfg_base + KSZ8463_PATTERN_OFF, data); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_CYCLE_WIDTH_OFF, + cycle_width_ns); + if (ret) + return ret; + + /* Set cycle count 0 - Infinite */ + ret =3D ksz_write16(dev, cfg_base + KSZ8463_CYCLE_CNT_OFF, 0); + if (ret) + return ret; + + /* KSZ8463 uses a 8 ns unit value to compute the pulse width */ + data =3D (pulse_width_ns / 8); + ret =3D ksz_write16(dev, cfg_base + KSZ8463_PULSE_WIDTH_OFF, data); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_TARGET_NSEC, + request->start.nsec); + if (ret) + return ret; + + ret =3D ksz_write32(dev, cfg_base + KSZ8463_TARGET_SEC, + request->start.sec); + if (ret) + return ret; + + return 0; +} + static int ksz_ptp_configure_perout(struct ksz_device *dev, u32 cycle_width_ns, u32 pulse_width_ns, struct timespec64 const *target_time, @@ -242,6 +326,61 @@ static int ksz_ptp_compute_perout_cycle(struct ksz_dev= ice *dev, return 0; } =20 +static int ksz8463_ptp_enable_perout(struct ksz_device *dev, + struct ptp_perout_request const *request, + int on) +{ + struct ksz_ptp_data *ptp_data =3D &dev->ptp_data; + u64 cycle_width_ns; + u64 pulse_width_ns; + int pin; + int ret; + + pin =3D ksz_ptp_get_pin(dev, request); + if (pin < 0) + return pin; + + ret =3D ksz8463_ptp_tou_reset(dev, request->index); + if (ret) + return ret; + + if (!on) { + ptp_data->tou_mode =3D KSZ_PTP_TOU_IDLE; + return 0; + } + + ret =3D ksz_ptp_compute_perout_cycle(dev, request, + KSZ8463_MAX_PULSE_WIDTH, + &cycle_width_ns, &pulse_width_ns); + if (ret) + return ret; + + ret =3D ksz_ptp_tou_pulse_verify(pulse_width_ns, + KSZ8463_TRIG_PULSE_WIDTH_M); + if (ret) + return ret; + + ret =3D ksz8463_ptp_configure_perout(dev, request, + cycle_width_ns, pulse_width_ns, + pin); + if (ret) + return ret; + + ret =3D ksz_ptp_tou_gpio(dev); + if (ret) + return ret; + + ret =3D ksz8463_ptp_tou_start(dev, request->index); + if (ret) + return ret; + + memcpy(&ptp_data->perout_request, request, + sizeof(struct ptp_perout_request)); + ptp_data->tou_mode =3D KSZ_PTP_TOU_PEROUT; + + return 0; +} + static int ksz_ptp_enable_perout(struct ksz_device *dev, struct ptp_perout_request const *request, int on) @@ -853,6 +992,18 @@ static int ksz_ptp_restart_perout(struct ksz_device *d= ev) return ksz_ptp_enable_perout(dev, &request, 1); } =20 +static int ksz8463_ptp_restart_perout(struct ksz_device *dev) +{ + struct ptp_perout_request request; + int ret; + + ret =3D ksz_ptp_prepare_restart_perout(dev, &request); + if (ret) + return ret; + + return ksz8463_ptp_enable_perout(dev, &request, 1); +} + static int __ksz_ptp_settime(struct ksz_device *dev, const struct timespec64 *ts) { @@ -879,6 +1030,41 @@ static int __ksz_ptp_settime(struct ksz_device *dev, return 0; } =20 +static int ksz8463_ptp_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_settime(dev, ts); + if (ret) + goto unlock; + + switch (ptp_data->tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PEROUT: + ret =3D ksz8463_ptp_restart_perout(dev); + if (ret) + goto unlock; + + break; + } + + spin_lock_bh(&ptp_data->clock_lock); + ptp_data->clock_time =3D *ts; + spin_unlock_bh(&ptp_data->clock_lock); + +unlock: + mutex_unlock(&ptp_data->lock); + + return ret; +} + static int ksz_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts) { @@ -993,6 +1179,40 @@ static int __ksz_ptp_adjtime(struct ksz_device *dev, = s64 delta) return 0; } =20 +static int ksz8463_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + struct timespec64 delta64 =3D ns_to_timespec64(delta); + int ret; + + mutex_lock(&ptp_data->lock); + + ret =3D __ksz_ptp_adjtime(dev, delta); + if (ret) + goto unlock; + + switch (ptp_data->tou_mode) { + case KSZ_PTP_TOU_IDLE: + break; + + case KSZ_PTP_TOU_PEROUT: + ret =3D ksz8463_ptp_restart_perout(dev); + if (ret) + goto unlock; + + break; + } + + spin_lock_bh(&ptp_data->clock_lock); + ptp_data->clock_time =3D timespec64_add(ptp_data->clock_time, delta64); + spin_unlock_bh(&ptp_data->clock_lock); + +unlock: + mutex_unlock(&ptp_data->lock); + return ret; +} + static int ksz_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); @@ -1027,6 +1247,26 @@ static int ksz_ptp_adjtime(struct ptp_clock_info *pt= p, s64 delta) return ret; } =20 +static int ksz8463_ptp_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *req, int on) +{ + struct ksz_ptp_data *ptp_data =3D ptp_caps_to_data(ptp); + struct ksz_device *dev =3D ptp_data_to_ksz_dev(ptp_data); + int ret; + + switch (req->type) { + case PTP_CLK_REQ_PEROUT: + mutex_lock(&ptp_data->lock); + ret =3D ksz8463_ptp_enable_perout(dev, &req->perout, on); + mutex_unlock(&ptp_data->lock); + break; + default: + return -EOPNOTSUPP; + } + + return ret; +} + static int ksz_ptp_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *req, int on) { @@ -1103,6 +1343,27 @@ static int ksz_ptp_start_clock(struct ksz_device *de= v) return 0; } =20 +void ksz8463_ptp_set_caps(struct dsa_switch *ds) +{ + struct ksz_device *dev =3D ds->priv; + struct ksz_ptp_data *ptp_data; + + ptp_data =3D &dev->ptp_data; + + ptp_data->caps.owner =3D THIS_MODULE; + snprintf(ptp_data->caps.name, 16, "Microchip Clock"); + ptp_data->caps.max_adj =3D KSZ_MAX_DRIFT_CORR; + ptp_data->caps.gettime64 =3D ksz_ptp_gettime; + ptp_data->caps.settime64 =3D ksz8463_ptp_settime; + ptp_data->caps.adjfine =3D ksz_ptp_adjfine; + ptp_data->caps.adjtime =3D ksz8463_ptp_adjtime; + ptp_data->caps.do_aux_work =3D ksz_ptp_do_aux_work; + ptp_data->caps.enable =3D ksz8463_ptp_enable; + ptp_data->caps.verify =3D ksz_ptp_verify_pin; + ptp_data->caps.n_pins =3D dev->info->n_pins; + ptp_data->caps.n_per_out =3D dev->info->n_per_out; +} + void ksz_ptp_set_caps(struct dsa_switch *ds) { struct ksz_device *dev =3D ds->priv; diff --git a/drivers/net/dsa/microchip/ksz_ptp.h b/drivers/net/dsa/microchi= p/ksz_ptp.h index b23040f47b9c..22898a22723c 100644 --- a/drivers/net/dsa/microchip/ksz_ptp.h +++ b/drivers/net/dsa/microchip/ksz_ptp.h @@ -12,7 +12,7 @@ =20 #include =20 -#define KSZ_PTP_N_GPIO 2 +#define KSZ_PTP_N_GPIO 12 =20 enum ksz_ptp_tou_mode { KSZ_PTP_TOU_IDLE, @@ -33,6 +33,7 @@ struct ksz_ptp_data { }; =20 void ksz_ptp_set_caps(struct dsa_switch *ds); +void ksz8463_ptp_set_caps(struct dsa_switch *ds); int ksz_ptp_clock_register(struct dsa_switch *ds); =20 void ksz_ptp_clock_unregister(struct dsa_switch *ds); @@ -66,6 +67,7 @@ struct ksz_ptp_data { }; =20 static inline void ksz_ptp_set_caps(struct dsa_switch *ds) { } +static inline void ksz8463_ptp_set_caps(struct dsa_switch *ds) { } static inline int ksz_ptp_clock_register(struct dsa_switch *ds) { return 0; diff --git a/drivers/net/dsa/microchip/ksz_ptp_reg.h b/drivers/net/dsa/micr= ochip/ksz_ptp_reg.h index 65ea8577af75..16f117fa5d49 100644 --- a/drivers/net/dsa/microchip/ksz_ptp_reg.h +++ b/drivers/net/dsa/microchip/ksz_ptp_reg.h @@ -51,6 +51,22 @@ =20 #define REG_PTP_UNIT_INDEX__4 0x0520 =20 +#define KSZ8463_TOU_ACTIVE 0x202 +#define KSZ8463_TOU_EN 0x206 +#define KSZ8463_TOU_SW_RST 0x208 + +#define KSZ8463_TRIGN_CFG_SIZE 0x20 +#define KSZ8463_TRIG1_CFG 0x220 +#define KSZ8463_TARGET_NSEC 0x000 +#define KSZ8463_TARGET_SEC 0x004 +#define KSZ8463_PATTERN_OFF 0x008 +#define KSZ8463_NOTIFY_BIT BIT(8) +#define KSZ8463_PATTERN_M GENMASK(6, 4) +#define KSZ8463_PULSE_WIDTH_OFF 0x00A +#define KSZ8463_TRIG_PULSE_WIDTH_M GENMASK(15, 0) +#define KSZ8463_CYCLE_WIDTH_OFF 0x00C +#define KSZ8463_CYCLE_CNT_OFF 0x010 + #define PTP_GPIO_INDEX GENMASK(19, 16) #define PTP_TSI_INDEX BIT(8) #define PTP_TOU_INDEX GENMASK(1, 0) --=20 2.55.0