From nobody Thu Sep 24 12:02:59 2026 Received: from SA9PR02CU001.outbound.protection.outlook.com (mail-southcentralusazon11013005.outbound.protection.outlook.com [40.93.196.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7597F42A154 for ; Thu, 24 Sep 2026 09:56:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.196.5 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243797; cv=fail; b=W7o04ywDnKcVlwYUvXzCkvZGSMtBWydH44CwEHqLbs9kIh6T89czfafFXGubLixU6LMpXm8VVygJg5x9hTQFDV4LbaTsfa9ZVD6RSETEx1nKD5RcIbt09k859gad/Qkev2QrkppY9BXx9EevP+Or71OAuuPJ0ZRtPb9lJ8cKm5E= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243797; c=relaxed/simple; bh=cFJ8ij5xH9uAHQhh6pXl3K3RcFVWOuxNA+NKpqBNs0g=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=b0zHG02SI2OGTbDcHL4ivYDJFBtjBPZAwyPvIK9XRZ0Ikd4cdSFs2DYRkzLt+4+2GHeVeeV+5gRoCCZhBIn9bPDPNGeoqiivcaLT19Ufd68NMi+i4DbHmTPPYD2Qp5Tx4y6qGkTlWadxehk4VizFbYZitUJ1v9XTXC/MtclUjKY= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=utVXGfNG; arc=fail smtp.client-ip=40.93.196.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="utVXGfNG" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=BSoQhzFOjsNfvGFEYMnWuaTqyoywjuas6Aka5nGoP7xMA38RNQycbm20vfihCBKSZtNJQAfo8ycGT/XhWvHN78YPdG3jFxNBBNSUzQcYQwQE9NNJZmsavtpd7lH9vaPVnfU613znsFe0FDaSN7Lp6Gnqa5SA6qGLo0/dQE3I3zR4eC6g/CiGgV7ZuLM0bWQu0YrdgwTdZsW7dRYChOsk4ZJKODIjAVoYyI1FGjBHCPY/gpMdp+KyU8xFqjk62fk3rnErA70MFjXg3pjHptYbJA9Eo9e/MyZk2IFoOzRi9ErufAegwbYt3ET60fp+Bq7NOAND6+34395srd/yct+IOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=KixhLCT8Sy0JVFdESmBfF/ksLTBjSdShCFoD5dBLjl0=; b=iNZWp8nS430JiZxyPbGOlRbmbAoUn4COpCSMc32s96qumFBIHHy3+4oU4qm9nQLEJqr846sHKRFxhaPlpjailNBNY9QUTmLSkqLzZSDMO91s4D9pguhj7Lq+39IZwbRrB3o/JIIiCFKRTnH8eRs5ae00xokdEd4cBS33zFHs8HFi5gXoCJFaF3oFU2FbiIYMRePZdp+d+oTbBrsYA1Fgw8F8QpfAxDGgjOPaxgHROcwUYvcu+Ptha9UT1MyTw+YQIOrLGASGDk45GYiFUNce6/pUo4KpabCySiycdZFWVdfzPbKnaq083XKPJq4Dvlqptnql/HneYbaF65FLvrpqcw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=collabora.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=KixhLCT8Sy0JVFdESmBfF/ksLTBjSdShCFoD5dBLjl0=; b=utVXGfNGUbHJRPve4LmMUp5023NGpUUV3C0NBj8r/3QLGZFFXRR9ehMjX12691vEObasljKwo0iwmi1xNe3lxupKeyCtMxrCFcK75YCCUv1Hsnu6MLnh9cdNzuxkIL4PEyZ6mdqNcNlF0VSAKT8ioqvYy/IXsjuGcS/j2ZZR1V8= Received: from CH0P223CA0019.NAMP223.PROD.OUTLOOK.COM (2603:10b6:610:116::7) by SA1PR12MB999107.namprd12.prod.outlook.com (2603:10b6:806:4a2::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.18; Thu, 24 Sep 2026 09:56:14 +0000 Received: from CH1PEPF0000AD7F.namprd04.prod.outlook.com (2603:10b6:610:116:cafe::92) by CH0P223CA0019.outlook.office365.com (2603:10b6:610:116::7) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.451.18 via Frontend Transport; Thu, 24 Sep 2026 09:56:14 +0000 X-MS-Exchange-Authentication-Results: mx.microsoft.com 1; spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CH1PEPF0000AD7F.mail.protection.outlook.com (10.167.244.88) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Thu, 24 Sep 2026 09:56:14 +0000 Received: from honglei-remote.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Thu, 24 Sep 2026 04:56:11 -0500 From: Honglei Huang To: , , , CC: , , , , , , Honglei Huang Subject: [RFC PATCH v9 1/4] drm/virtio-gpu: Add VIRTIO_GPU_CAPSET_ROCM capability Date: Thu, 24 Sep 2026 17:55:53 +0800 Message-ID: <20260924095556.1326164-2-honghuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260924095556.1326164-1-honghuan@amd.com> References: <20260924095556.1326164-1-honghuan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD7F:EE_|SA1PR12MB999107:EE_ X-MS-Office365-Filtering-Correlation-Id: 77e73dd1-6f8c-486a-1ec4-08df1a221231 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|23010399003|376014|10067099003|56012099006|11063799006|18002099003|22082099003|6133799003; X-Microsoft-Antispam-Message-Info: zFP2OjEjZZiMJ4M3mSZIisqC19ljQpI0tPZPwBrkpD1Uu++ofcLOD5I1achrh2M0aAgEGROEFWTKQQtX/9I9HkHO6GHWNW2HgJKSd28cCEnKnwpNPzH1Rvfqy4y10ee57qr7VjWphlLynK+d968yozfIweqJyj7eOKQMeGSozl4jU2w486XtXD28vS4DI18jaOrmBC9lIvth7G9KH1rFuvfhibfQReJBVoNl7UganRsq9mULdMfdaGPeUGwn0fSD6IuBwu4fcxn20RlOdy9wUJGpRu9+uLXijiQkFbq5eONrRfI8QErCAnho+kAur1JqbMt9SXd3X0neOITqFZpp2rM4jUTh4sb9G0SQXGhWqxtjQAKfHDjT08yex8tmFQyAugDpoxETTnxQ+uUrwpYqyr9e0OBZ+wzMyCxFshwWpXIVc2JB5lhing1kZ9L5U6Akq57dPUrr76si5ltrYFsnYRpQiaCP5TKS7I3RvwpqoBMjcsPBxk9rvYbRadZSF7UyXJdkIgscHE4i8n8o7wD7NPAvlAwSh7bpkFk48rOhdCVYB9FBjqdEzy9WvtI+BOWJkcm12vjcNiRZK0oxdy0Ctg9rm4Tihz8WZy15tFHMQhLwyiljCxRpAZQH82BjnLNtHFfwfkZks6fYLaz94E/QcqqZhrS+L8ys+SXZQKwAbaF4GeIIs+AcoFthzr8tbSO9i/UeYyC28cVDlmTOTFPLLA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700016)(23010399003)(376014)(10067099003)(56012099006)(11063799006)(18002099003)(22082099003)(6133799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YPAtiAV/ygHc+u+ocMCabko9dy4xMaicX8RHV3AA1kEf4Y9HY29wPjh6tDeQJ44PaAyyUMRBTlRyDoTsWA/rLoPPT/qpCkl1Fi/eRtBU/csVfouUmi+zRKvZPetYmMcyLeZWqY7yN9mxBLoLPjQdssRgtXPL2upspANx/T5O+FQS7n8XeULZ1HEzZFxbtFyzPsUKFF4IrAhquSUNqtZlL9eV81+OSfwsUSr+268f5rZ+QEiiiH8/9BVA7c83kUzTy/Li0q4mCmgy6ePi1gtpTVxhHwXnasc/QSZ2UVswizk54GSpFHHZkVTUfh/oj4MD/9eZ7TSm1B8YVASr8ucpObMvBbE0wqgrgUmgeayNUod4q6Kw4fdQ2mU1LDIubRVM0ilswa/iX/5Mfi1oZ15Bvw+5R5Ma8jeN9iron7U97e+GTXxSnC4nzy7YPCfbjsyq X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2026 09:56:14.5482 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 77e73dd1-6f8c-486a-1ec4-08df1a221231 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD7F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB999107 Content-Type: text/plain; charset="utf-8" Add a new GPU capability set VIRTIO_GPU_CAPSET_ROCM to support ROCm compute workloads in virtualized environments. ROCm (Radeon Open Compute) is AMD's open-source software platform for GPU compute and HPC workloads. ID 7 is already used by VIRCL, and gfxstream's rutabaga_gfx has already claimed IDs 7-9 ahead of any spec or kernel header update, so ROCm uses ID 10 to avoid a further collision. A matching virtio-gpu specification change is in progress to register this assignment. Also add the matching VIRTGPU_DRM_CAPSET_ROCM alias in virtgpu_drm.h for consistency with the other capability sets exposed through DRM_IOCTL_VIRTGPU_GET_CAPS. Signed-off-by: Honglei Huang --- include/uapi/drm/virtgpu_drm.h | 1 + include/uapi/linux/virtio_gpu.h | 1 + 2 files changed, 2 insertions(+) diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h index 95587e12ae..9b886e9772 100644 --- a/include/uapi/drm/virtgpu_drm.h +++ b/include/uapi/drm/virtgpu_drm.h @@ -170,6 +170,7 @@ struct drm_virtgpu_3d_wait { #define VIRTGPU_DRM_CAPSET_VENUS 4 #define VIRTGPU_DRM_CAPSET_CROSS_DOMAIN 5 #define VIRTGPU_DRM_CAPSET_DRM 6 +#define VIRTGPU_DRM_CAPSET_ROCM 10 struct drm_virtgpu_get_caps { __u32 cap_set_id; __u32 cap_set_ver; diff --git a/include/uapi/linux/virtio_gpu.h b/include/uapi/linux/virtio_gp= u.h index 4f530d9005..e22049835e 100644 --- a/include/uapi/linux/virtio_gpu.h +++ b/include/uapi/linux/virtio_gpu.h @@ -321,6 +321,7 @@ struct virtio_gpu_cmd_submit { #define VIRTIO_GPU_CAPSET_VENUS 4 #define VIRTIO_GPU_CAPSET_CROSS_DOMAIN 5 #define VIRTIO_GPU_CAPSET_DRM 6 +#define VIRTIO_GPU_CAPSET_ROCM 10 =20 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */ struct virtio_gpu_get_capset_info { base-commit: 766bfba0f3bae329f99b42dcabc3ef11fa368f0b --=20 2.34.1 From nobody Thu Sep 24 12:02:59 2026 Received: from CY3PR05CU001.outbound.protection.outlook.com (mail-westcentralusazon11013068.outbound.protection.outlook.com [40.93.201.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4574D3F1ADA for ; Thu, 24 Sep 2026 09:56:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.93.201.68 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243797; cv=fail; b=VjyjqC8Id++eLGFROkYPoYd6yQwNB87G3DfPsqwhOsK7RZx323sv0KQ4eyrBim6AWx1i7T2hTATHYsy8vPjMXU5RZFWDuDmOhuLWRofTIRdFeI11b+w2pJun/bhMpUXRjzyGfetq51/xvn81sJ4xYoyZWNMI2SJiHOgHJo6fl0I= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243797; c=relaxed/simple; bh=tdQ1HL8bX3+iZ56OT20Fp7mPGXbJTjf5yrIC/2uUJtw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sISxc9037MSsGtcxROMydbG6cIGO9bvGQseZGwCryVHeyN2DtuaN83K09XpKk15aA9dmC2GplbxHgdAg95+OFe6hqGxnSIygonEohUWX4vfF0zwNxuXWleiHeGkFGx3aWSfqpNpzpKjhS2YNruRiqpccX07W2BEmZUCmTradMlc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=1tCOsLbL; arc=fail smtp.client-ip=40.93.201.68 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="1tCOsLbL" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=OJOLyEDXmifxg3dv6PyNEMlP/Z7d9PAkIZAGljZ+DPVHPreFBlvlj4MLMmwjj3lvzmpx4URlhxrc0dCtVgRzZqMHmVrrhtNCcr5KqMIUj0ncUNRPd9ZWSGvxF6f1Ko4YlsPHi0BvV2M6tTVGGPD8QO5R1YIKCnAus5dArNnHGH+N373lBuVtpw/lN9FXJv82QQU6J0gVzLJRg4bbmEgGLxgslUhQnA4r1xVGJIvX9MrLX7jWdlyeXa8HZdNqwZmIAMwXUvfkl1a3rjnCEC8VBeSGlgPcftSFOvlzN/vBmDyjT0RqcU5DUKcnIg+20xFKGpkA6junTmLfiSdWd9NTgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=YDPnASpYJelJWNYK7ontFRtDPpi+l0vK475gROAW84A=; b=kodoJnXqUFYlK8p1j/2lnECH05LOHUd525R1hueqh0OryxGyxs52P3G5xRcvljMn/9ATYp5XvEMS9Q1LLSNNV73TPMfk5uxPdWEwHO7y4LUdRs+OL2ak3RPR5p/fcb+E4L79DCVDju0mKZsv1yYM59pev/GQ9NFgmuRqxCBsZse5gtCnAgi1ZDXs3NzGI7ZcwBgeVKej1AFkm9KHZYIPJsa6gOM7u1nRcxc2KPqf2e7IZmNo0e3Z2wIoBTR5xgcy74afYztqXodpffLr/c1mhLQRA++lfESr02ci/6znV41x9X3m6OONZP7s6ST/K0GjX+ZUNncwTDbzf3aeCOUHOg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=collabora.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=YDPnASpYJelJWNYK7ontFRtDPpi+l0vK475gROAW84A=; b=1tCOsLbLrWaGktGtDcBT6xGKIlrQ3O5hPcBIeSMiK+hTBCJnFcgorpgbpBsbGKptiDb6VuHAlS1XPI9oWnow1HihcK1o4YKZa/Gv7ZE5hb6yEA2rPKdIPu5EjPQ1ZxFyM5SjHSLAcVFH7PqifHjIB+vXWEIZcM4EgoYwgh8Xd7M= Received: from CH0PR03CA0353.namprd03.prod.outlook.com (2603:10b6:610:11a::15) by IA1PR12MB8078.namprd12.prod.outlook.com (2603:10b6:208:3f1::14) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.428.16; Thu, 24 Sep 2026 09:56:17 +0000 Received: from CH1PEPF0000AD80.namprd04.prod.outlook.com (2603:10b6:610:11a:cafe::64) by CH0PR03CA0353.outlook.office365.com (2603:10b6:610:11a::15) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.451.18 via Frontend Transport; Thu, 24 Sep 2026 09:56:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CH1PEPF0000AD80.mail.protection.outlook.com (10.167.244.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Thu, 24 Sep 2026 09:56:17 +0000 Received: from honglei-remote.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Thu, 24 Sep 2026 04:56:14 -0500 From: Honglei Huang To: , , , CC: , , , , , , Honglei Huang Subject: [RFC PATCH v9 2/4] drm/virtgpu api: add blob userptr resource Date: Thu, 24 Sep 2026 17:55:54 +0800 Message-ID: <20260924095556.1326164-3-honghuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260924095556.1326164-1-honghuan@amd.com> References: <20260924095556.1326164-1-honghuan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD80:EE_|IA1PR12MB8078:EE_ X-MS-Office365-Filtering-Correlation-Id: f9c38be3-e6b2-4c8a-34d2-08df1a2213f1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|23010399003|1800799024|36860700016|22082099003|18002099003|11063799006|56012099006|10067099003; X-Microsoft-Antispam-Message-Info: tlllrdusFaSdMToMgnSC6+p8WDiPN9MK2V182X/LN/F2dz3d2dTyvPDB7sz1GvM/fmoO8UOpCqm6T/eA928TJzimqy7/9bRA/wYwQDg7VQr/kXVohL2X45xtatCm8r8GYvefZlHYYAvVfsV9/Q9JFmyfhHcR1Wi8tgL964jW5euRs4Ig3YftftQyYfHEYo312PPmha3cvza8YAXXI0JLAlCM/nmnrMtvFzvt12rJXHNAuxFthgv5OV5JMos9oUyXE4sjlzQN4jLbuW5m+1xsX6wG9eKajE5rbdBwwBl7+0o9CYDtjd3LLN/EDG6KaFbwK7vcMAr50RYXeb/ASgUGXRIrZEV54dzK8G0Ql5xmYhLsE2/OSn+04KZGRl3+9z/2n2+g8qyFvZImTsoQYAbj6BPQEutKKhi/5/ZYkQuDO1M13TXQ+PEDMOULBp37L+kqryZD0xZtjIAWTR2qbCinyCCPPNLMwyGURFqLl1GAtlMxfDvNtE2P75cBIFD+LZvz7fdK63k42sX8yjmD2SfDCCE/J/NlfRfCoROrjOIeKpJ6bPpHZneJtgfA9SIZpkuL57DjFN1hnBgQOoBxHK5DI9+DCt5uyudHNcdZRxhIX0su9qbLkCQEYEi20OJcifz/q/X8dIasX7LCDDP71vuIrD3Iu22+cB4lVxPPB5oPga14x/l3Ll8Zm+UmH+iiaKysVby55DyCNDZtMlWvExxVTw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(23010399003)(1800799024)(36860700016)(22082099003)(18002099003)(11063799006)(56012099006)(10067099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fKzCbyd0aTMlDOcbe7UeKtjtokTCbDqx9bXR1zUqe7gcBdEXv1lOgQox8jiWyhr/h+eJdC1Q95MnUYk6UZAAmPWU/P37LGlxMmtzQ2e/n2afLCk8/l2U5vwjg5ii8/jzXd5ckvi545mPzcmAycYqQ4ax4LBODjd+ZL2k4JjD8dQgDl2jv1y8tfLSzoEL/0faPMV5a3IzxaWBGe8iIAcZumrlwAF/1o9mZkczAyiHqwWBPElH+ZV1NWyG5dRo9gV2aOYNM0L+KUmnfWtCNwUbTXs5r0GMR9GrH1WnyBCx8s583GA+sIPCOkceXbb2MwEesqN+H6a3s7wPxl7ECRolADzS7xsBLapjiZVntSlR4bkMPHgPv4ON0tBfEcqzQlsYJxt/2W9dxS00t58gmjxQfnHXFqNPdKq2GOJFaLAvao97nLEDjY2zi/Q9eXAcBW4T X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2026 09:56:17.4799 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f9c38be3-e6b2-4c8a-34d2-08df1a2213f1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD80.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8078 Content-Type: text/plain; charset="utf-8" Add a userptr address field so userspace can request a blob backed by an existing process mapping. A non-zero userptr selects that path; probe VIRTGPU_PARAM_USERPTR before using the field. GPU-readonly backing is requested with the virtio CREATE_BLOB wire flag VIRTIO_GPU_BLOB_FLAG_USE_READONLY (also VIRTGPU_BLOB_FLAG_USE_READONLY). The device MUST NOT write such a resource. The guest pins without FOLL_WRITE only when the device advertised VIRTIO_GPU_F_BLOB_READONLY (VIRTGPU_PARAM_BLOB_READONLY). Signed-off-by: Honglei Huang --- include/uapi/drm/virtgpu_drm.h | 10 ++++++++++ include/uapi/linux/virtio_gpu.h | 5 +++++ 2 files changed, 15 insertions(+) diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h index 9b886e9772..c890c754d8 100644 --- a/include/uapi/drm/virtgpu_drm.h +++ b/include/uapi/drm/virtgpu_drm.h @@ -99,6 +99,8 @@ struct drm_virtgpu_execbuffer { #define VIRTGPU_PARAM_SUPPORTED_CAPSET_IDs 7 /* Bitmask of supported capab= ility set ids */ #define VIRTGPU_PARAM_EXPLICIT_DEBUG_NAME 8 /* Ability to set debug name f= rom userspace */ #define VIRTGPU_PARAM_BLOB_ALIGNMENT 9 /* Device alignment requirements fo= r blobs */ +#define VIRTGPU_PARAM_USERPTR 10 /* CREATE_BLOB userptr field is supported= */ +#define VIRTGPU_PARAM_BLOB_READONLY 11 /* VIRTGPU_BLOB_FLAG_USE_READONLY i= s honored */ =20 struct drm_virtgpu_getparam { __u64 param; @@ -187,6 +189,7 @@ struct drm_virtgpu_resource_create_blob { #define VIRTGPU_BLOB_FLAG_USE_MAPPABLE 0x0001 #define VIRTGPU_BLOB_FLAG_USE_SHAREABLE 0x0002 #define VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE 0x0004 +#define VIRTGPU_BLOB_FLAG_USE_READONLY 0x0008 /* zero is invalid blob_mem */ __u32 blob_mem; __u32 blob_flags; @@ -206,6 +209,13 @@ struct drm_virtgpu_resource_create_blob { #define DRM_VIRTGPU_BLOB_FLAG_HINT_DEFER_MAPPING 0x0001 __u32 blob_hints; __u32 pad2; + + /* + * Non-zero selects the userptr path and is valid only with + * VIRTGPU_BLOB_MEM_GUEST. Must be 0 otherwise. Probe + * VIRTGPU_PARAM_USERPTR before using this field. + */ + __u64 userptr; }; =20 #define VIRTGPU_CONTEXT_PARAM_CAPSET_ID 0x0001 diff --git a/include/uapi/linux/virtio_gpu.h b/include/uapi/linux/virtio_gp= u.h index e22049835e..af95374758 100644 --- a/include/uapi/linux/virtio_gpu.h +++ b/include/uapi/linux/virtio_gpu.h @@ -72,6 +72,10 @@ * must be aligned to that value. */ #define VIRTIO_GPU_F_BLOB_ALIGNMENT 5 +/* + * VIRTIO_GPU_BLOB_FLAG_USE_READONLY + */ +#define VIRTIO_GPU_F_BLOB_READONLY 6 =20 enum virtio_gpu_ctrl_type { VIRTIO_GPU_UNDEFINED =3D 0, @@ -415,6 +419,7 @@ struct virtio_gpu_resource_create_blob { #define VIRTIO_GPU_BLOB_FLAG_USE_MAPPABLE 0x0001 #define VIRTIO_GPU_BLOB_FLAG_USE_SHAREABLE 0x0002 #define VIRTIO_GPU_BLOB_FLAG_USE_CROSS_DEVICE 0x0004 +#define VIRTIO_GPU_BLOB_FLAG_USE_READONLY 0x0008 /* zero is invalid blob mem */ __le32 blob_mem; __le32 blob_flags; --=20 2.34.1 From nobody Thu Sep 24 12:02:59 2026 Received: from BYAPR05CU005.outbound.protection.outlook.com (mail-westusazon11010029.outbound.protection.outlook.com [52.101.85.29]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4B1B641A55D for ; Thu, 24 Sep 2026 09:56:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=52.101.85.29 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243801; cv=fail; b=AucnDARm10D5z7OOz1POSND3h/2mlSeOZIko2XPQpqGXHceDDFPYbDyUitdaaoFPglfrkm8pPp/rkN1Sh4OPgEnyNXG+L3PcNOPhZkYIIjC4idKhpgUT+0eGu8Cq47I4YwyIoktkfh5kLcqPC1dCcjwSDolS6sEDKxNFf4YlIyA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243801; c=relaxed/simple; bh=hamllfA1YIhjdue/JHFo+Xfevyk8zFuNKIRg8pDZCT4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ALyjNW2i7d8bJ2wY80yRgP4htDufUXKnyhdEMIgetTBxmGWWdbIP21xnAEnNfheQIT0Bx4OwmwszfYMUd9TveWIYV6WsoRWQIQnb5UJ1Jhnd5K/+KMLs58IUSZPbYlJF8Jc02x5wNgVNBzlNM+WzIKSk2+EK51cIpZKZIWOwesw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=YIOzqhjI; arc=fail smtp.client-ip=52.101.85.29 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="YIOzqhjI" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=pkYcnrodL0nceCq37iOGRKtbcB8HtqhSJvP77ynw2YpL38iesOcxFAfpku5sUNI6bH2o5AlCdXczmWkmb0NWih9F3lFEOHb5MEkVUTxX/OMjN1JTJn9rsErwGANjomA0OJChc1cmcQWLEkQFZRJXrdHPFRLA56gS/MwcVRkrzESIBzs6WPG3ALZsIhIMyQRR9sk1jkagf2X8m80wcgsVarK0Jx+0GyNlBcoCZrqjmRinen5GX2GEEuMQW6Amwq+kn1AKx1wD7OsEi3Qp6DPtUVmWuD4lPjY+EYvq21HZu8aCABpFHEHphDqkkI5p7ik7LtSSH06VrShCI5G24f4Pcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=ZiPFaNpVhLGI3b1AKIDtO6WaGTQPRSbnvLMOn/QRO7E=; b=jJJwyN5bAcdwMvtRrBPAcWiCClYYRYVLoPC3BHzRVq/eQJI500FeE/viCaT0HbrmwZ2LbIxPVJJlIURqUhE99NgJ/WjRtVZzwYZHLKXyl3BEikQc4uS0iul5B/NPQJvdhguJK5HUbMPPfeM0zIgUQPsjsjb0lmQzJOwAKqbuDog0GsdoRkaMhtFcnTfNJGiQeHqtrwp5Om5iI5nJ1GC7uIEyKncuz/jz9ZUg/EQPH2gbsHhqV+NJda8DFhFq9vUJhbWBAn4qxWYzR+sm1W2shJehj1ga/Ki0yixyLYN8l713piqnhAjIrcITxi3kbmhaaWTVmdv0ymmGvWPqjv3KwA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=collabora.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZiPFaNpVhLGI3b1AKIDtO6WaGTQPRSbnvLMOn/QRO7E=; b=YIOzqhjIxlnwD1WemQ+agYkwJSJC4JUfSjxE5ZQQkGzlYw6gnaBeuBPFQ8HdrdZQsl4a7EHF30CggTdEsskCtB1I2DQ13HDZNbJP3b7ebqnGjRZZnbUDTsNZLH1loC427wyU3WODPBPAooeuIb9A1XwuavQvMpAm3flMEVyPKNU= Received: from CH0P223CA0005.NAMP223.PROD.OUTLOOK.COM (2603:10b6:610:116::16) by CY5PR12MB6346.namprd12.prod.outlook.com (2603:10b6:930:21::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.18; Thu, 24 Sep 2026 09:56:21 +0000 Received: from CH1PEPF0000AD81.namprd04.prod.outlook.com (2603:10b6:610:116:cafe::6d) by CH0P223CA0005.outlook.office365.com (2603:10b6:610:116::16) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.451.18 via Frontend Transport; Thu, 24 Sep 2026 09:56:21 +0000 X-MS-Exchange-Authentication-Results: mx.microsoft.com 1; spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by CH1PEPF0000AD81.mail.protection.outlook.com (10.167.244.89) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Thu, 24 Sep 2026 09:56:20 +0000 Received: from honglei-remote.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Thu, 24 Sep 2026 04:56:17 -0500 From: Honglei Huang To: , , , CC: , , , , , , Honglei Huang Subject: [RFC PATCH v9 3/4] drm/virtio: implement userptr resource support Date: Thu, 24 Sep 2026 17:55:55 +0800 Message-ID: <20260924095556.1326164-4-honghuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260924095556.1326164-1-honghuan@amd.com> References: <20260924095556.1326164-1-honghuan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD81:EE_|CY5PR12MB6346:EE_ X-MS-Office365-Filtering-Correlation-Id: 9b097448-1d66-491f-867e-08df1a221607 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|82310400026|376014|23010399003|10067099003|5023799004|11063799006|56012099006|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: KocPP0YOIG7GPumT33cjM5HPg1U9GYHaqnT3Xfo9zq92rOnb611XSVG20B2/FTK2LoEZPvTzBxovbDfYT4KgGM8VwvZuUFHhirXDVKVSnHAujj/xiGrCYmu/34ne+7ew5E7w/tdNA1UhDrbmEYEqI+s2chGLQs1p3q3OH5Y781RY+bDBesqaMA9uCEwwvk23NnofhVEwYs3dOe2u7c0o84WxMd2p+yr+8rgD4rWCO2LlbO/5e9WDZ0gpXTSng+gpgMyLcKC1Y1aOA5vcnZSbF/Y+hMngjyDC+4vWd6lXSCSM9sQ3cxk0M1FO125yyKgO0OI5/sMan20qt7FRG5tgesvGh7I9wsj59xfrmClEiCjmJDo438EfjT9Q3//cLuHEqStWfhgBPdZa51S1J0y4C96KOgdwrsKub+Y9RJvE/IT/41+8Bay2fIdvxOcWbC6Jbsix+Jwuh/Mo54jX/ReY6oUhhL2T7YciQfcyyK0exlDwf9beolj2NJXkSoi7jl1MDEtMhEyno2HIbiFqGFGGyiMP2RCYwKrtFTb/bBRNNw6PYHGKtac+L9MplGwkUw9hJ2n5/BDrsNoMdYsdq72az1Xg2DtazjdRZXMyh/rBW2IIlnlE6nG/gGF0JIR0mlsJRe5MQ1YSrcn/GKmtqsvvPvcFwU9jtQKqSt/psUESuOCjQu9fyqqOG4PK1/jT4aQzweI6a/CqDL6JzuXJwsFtbQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(1800799024)(82310400026)(376014)(23010399003)(10067099003)(5023799004)(11063799006)(56012099006)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qzX7tVbWNOsP88hkCGJohj4dOpMEToqa1CdRkbqpHBV0aIJg0KyVyHRHuTlJKrTo4QpfP4o69HpP6E7YuCJzE3HhWuQob+v2M/evmfyMnN2uy9N7NwzHLb0pitthu8Rx885Kvoz8Mm757+v1nlxjSxjDBXjPVVvML2ZpzJG+zqOzqfpuKeLFIie+ETSUo5CWmzGj12BNBBcKby5/YbX2rF026LM9tjXvIk0BDx2CSN3lEOFhYSHcCIFV1UpTGUzpkiqrIJ5mcq+sLaLq/7JJmJXym8yQpYyvM252fASnggg1/Rlc5B+HDDN+vtWcfwBw1hHX3fDkbjZkxAo902XoGmkCKnQ380dHf3wA195rj2ejd1QWK4gALsXkJeEu9UHklKO+VgotFihjrvhLyMrDV5EHT+bfNvDOu3cIkuUWbbfqU3Yl6vziZZc2TljdNouG X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2026 09:56:20.9854 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9b097448-1d66-491f-867e-08df1a221607 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD81.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6346 Content-Type: text/plain; charset="utf-8" Add userptr blob objects so the guest kernel can pin an existing userspace mapping and advertise it as CREATE_BLOB backing entries. - New virtio_gpu_object_userptr type for userptr resources - Pin pages with pin_user_pages_fast() and FOLL_LONGTERM - Omit FOLL_WRITE when VIRTGPU_BLOB_FLAG_USE_READONLY is set - Charge FOLL_LONGTERM pins against RLIMIT_MEMLOCK - DMA-map the scatterlist only when virtio_gpu_use_dma_api() is required; use DMA_TO_DEVICE for USE_READONLY blobs - Mark writable pages dirty when unpinning - Keep pages pinned until RESOURCE_UNREF is queued; drop them from cleanup_object() on the unref response or on create failure - Clear userptr->pages on pin failure to avoid double-free on cleanup - Reject unaligned or overflowing userptr ranges at create time - Disallow PRIME export of userptr objects - Save CREATE_BLOB params and restore userptr resources after hibernation without using the shmem restore path The hibernation restore path maps with the same attrs and direction used at create time, as documented next to the call. Like shmem blobs, the DMA API can still bounce through a buffer there. This design only avoids a second guest side shmem allocation and memcpy, nothing more. Signed-off-by: Honglei Huang --- drivers/gpu/drm/virtio/Makefile | 3 +- drivers/gpu/drm/virtio/virtgpu_drv.h | 41 +++ drivers/gpu/drm/virtio/virtgpu_object.c | 22 ++ drivers/gpu/drm/virtio/virtgpu_userptr.c | 348 +++++++++++++++++++++++ 4 files changed, 413 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/virtio/virtgpu_userptr.c diff --git a/drivers/gpu/drm/virtio/Makefile b/drivers/gpu/drm/virtio/Makef= ile index d2e1788a82..fe7332a621 100644 --- a/drivers/gpu/drm/virtio/Makefile +++ b/drivers/gpu/drm/virtio/Makefile @@ -6,6 +6,7 @@ virtio-gpu-y :=3D virtgpu_drv.o virtgpu_kms.o virtgpu_gem.o virtgpu_vram.o= \ virtgpu_display.o virtgpu_vq.o \ virtgpu_fence.o virtgpu_object.o virtgpu_debugfs.o virtgpu_plane.o \ - virtgpu_ioctl.o virtgpu_prime.o virtgpu_trace_points.o virtgpu_submit.o + virtgpu_ioctl.o virtgpu_prime.o virtgpu_trace_points.o virtgpu_submit.o \ + virtgpu_userptr.o =20 obj-$(CONFIG_DRM_VIRTIO_GPU) +=3D virtio-gpu.o diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.h b/drivers/gpu/drm/virtio/= virtgpu_drv.h index 9df4c71173..b58e5afe8f 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.h +++ b/drivers/gpu/drm/virtio/virtgpu_drv.h @@ -105,6 +105,7 @@ struct virtio_gpu_object_params { uint32_t blob_flags; uint64_t blob_id; uint32_t blob_hints; + uint64_t userptr; }; =20 struct virtio_gpu_object { @@ -138,12 +139,41 @@ struct virtio_gpu_object_vram { struct drm_mm_node vram_node; }; =20 +struct virtio_gpu_object_userptr; + +struct virtio_gpu_object_userptr_ops { + int (*get_pages)(struct virtio_gpu_object_userptr *userptr); + void (*put_pages)(struct virtio_gpu_object_userptr *userptr); +}; + +struct virtio_gpu_object_userptr { + struct virtio_gpu_object base; + const struct virtio_gpu_object_userptr_ops *ops; + struct mutex lock; + + uint64_t start; + uint32_t npages; + uint32_t bo_handle; + uint32_t flags; + + struct virtio_gpu_device *vgdev; + struct drm_file *file; + struct page **pages; + struct sg_table *sgt; + bool dma_mapped; + enum dma_data_direction dma_dir; + struct mm_struct *mm; +}; + #define to_virtio_gpu_shmem(virtio_gpu_object) \ container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) =20 #define to_virtio_gpu_vram(virtio_gpu_object) \ container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base) =20 +#define to_virtio_gpu_userptr(virtio_gpu_object) \ + container_of((virtio_gpu_object), struct virtio_gpu_object_userptr, base) + struct virtio_gpu_object_array { struct ww_acquire_ctx ticket; struct list_head next; @@ -284,6 +314,7 @@ struct virtio_gpu_device { bool has_host_visible; bool has_context_init; bool has_blob_alignment; + bool has_blob_readonly; bool hibernated; struct virtio_shm_region host_visible_region; struct drm_mm host_visible_mm; @@ -562,4 +593,14 @@ void virtio_gpu_vram_map_deferred(struct virtio_gpu_ob= ject_vram *vram); int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data, struct drm_file *file); =20 +/* virtgpu_userptr.c */ +int virtio_gpu_userptr_create(struct virtio_gpu_device *vgdev, + struct drm_file *file, + struct virtio_gpu_object_params *params, + struct virtio_gpu_object **bo_ptr); +bool virtio_gpu_is_userptr(struct virtio_gpu_object *bo); +int virtio_gpu_userptr_restore(struct virtio_gpu_device *vgdev, + struct virtio_gpu_object *bo, + struct virtio_gpu_mem_entry **ents, + unsigned int *nents); #endif diff --git a/drivers/gpu/drm/virtio/virtgpu_object.c b/drivers/gpu/drm/virt= io/virtgpu_object.c index 49899485be..ab21494b1c 100644 --- a/drivers/gpu/drm/virtio/virtgpu_object.c +++ b/drivers/gpu/drm/virtio/virtgpu_object.c @@ -91,6 +91,16 @@ void virtio_gpu_cleanup_object(struct virtio_gpu_object = *bo) drm_gem_free_mmap_offset(&vram->base.base.base); drm_gem_object_release(&vram->base.base.base); kfree(vram); + } else if (virtio_gpu_is_userptr(bo)) { + struct virtio_gpu_object_userptr *userptr =3D + to_virtio_gpu_userptr(bo); + + mutex_lock(&userptr->lock); + userptr->ops->put_pages(userptr); + mutex_unlock(&userptr->lock); + mutex_destroy(&userptr->lock); + drm_gem_object_release(&userptr->base.base.base); + kfree(userptr); } else { drm_gem_object_release(&bo->base.base); kfree(bo); @@ -316,6 +326,18 @@ int virtio_gpu_object_restore_all(struct virtio_gpu_de= vice *vgdev) continue; } =20 + if (virtio_gpu_is_userptr(bo)) { + ret =3D virtio_gpu_userptr_restore(vgdev, bo, &ents, + &nents); + if (ret) + break; + + virtio_gpu_cmd_resource_create_blob(vgdev, bo, + &bo->params, + ents, nents); + continue; + } + if (bo->params.blob || bo->attached) { ret =3D virtio_gpu_object_shmem_init(vgdev, bo, &ents, &nents); diff --git a/drivers/gpu/drm/virtio/virtgpu_userptr.c b/drivers/gpu/drm/vir= tio/virtgpu_userptr.c new file mode 100644 index 0000000000..4fb367d0d6 --- /dev/null +++ b/drivers/gpu/drm/virtio/virtgpu_userptr.c @@ -0,0 +1,348 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include +#include +#include +#include +#include + +#include "virtgpu_drv.h" +#include + +static void virtio_gpu_userptr_free(struct drm_gem_object *obj) +{ + struct virtio_gpu_object *bo =3D gem_to_virtio_gpu_obj(obj); + struct virtio_gpu_device *vgdev =3D obj->dev->dev_private; + + /* + * Pages stay pinned until RESOURCE_UNREF finishes. Its callback + * calls virtio_gpu_cleanup_object to drop them. + */ + if (bo->created) { + virtio_gpu_remove_from_restore_list(bo); + virtio_gpu_cmd_unref_resource(vgdev, bo, false); + virtio_gpu_notify(vgdev); + return; + } + + virtio_gpu_cleanup_object(bo); +} + +static struct dma_buf * +virtio_gpu_userptr_prime_export(struct drm_gem_object *obj, int flags) +{ + return ERR_PTR(-EINVAL); +} + +static const struct drm_gem_object_funcs virtio_gpu_userptr_funcs =3D { + .open =3D virtio_gpu_gem_object_open, + .close =3D virtio_gpu_gem_object_close, + .free =3D virtio_gpu_userptr_free, + .export =3D virtio_gpu_userptr_prime_export, +}; + +bool virtio_gpu_is_userptr(struct virtio_gpu_object *bo) +{ + return bo->base.base.funcs =3D=3D &virtio_gpu_userptr_funcs; +} + +static int +virtio_gpu_userptr_get_pages(struct virtio_gpu_object_userptr *userptr) +{ + unsigned int flag =3D FOLL_LONGTERM; + unsigned int num_pages, pinned =3D 0; + int ret =3D 0; + + if (userptr->pages) + return 0; + + userptr->pages =3D kvmalloc_array(userptr->npages, sizeof(struct page *), + GFP_KERNEL); + if (!userptr->pages) + return -ENOMEM; + + if (!(userptr->flags & VIRTGPU_BLOB_FLAG_USE_READONLY)) + flag |=3D FOLL_WRITE; + + do { + num_pages =3D userptr->npages - pinned; + + ret =3D pin_user_pages_fast(userptr->start + pinned * PAGE_SIZE, + num_pages, flag, + userptr->pages + pinned); + + if (ret < 0) { + if (pinned) + unpin_user_pages(userptr->pages, pinned); + kvfree(userptr->pages); + userptr->pages =3D NULL; + return ret; + } + + pinned +=3D ret; + + } while (pinned < userptr->npages); + + return 0; +} + +static void +virtio_gpu_userptr_unaccount(struct virtio_gpu_object_userptr *userptr) +{ + if (!userptr->mm) + return; + + atomic64_sub(userptr->npages, &userptr->mm->pinned_vm); + mmdrop(userptr->mm); + userptr->mm =3D NULL; +} + +static void +virtio_gpu_userptr_put_pages(struct virtio_gpu_object_userptr *userptr) +{ + struct drm_device *dev =3D userptr->base.base.base.dev; + + if (userptr->sgt) { + if (userptr->dma_mapped) + dma_unmap_sgtable(drm_dev_dma_dev(dev), userptr->sgt, + userptr->dma_dir, 0); + userptr->dma_mapped =3D false; + sg_free_table(userptr->sgt); + kfree(userptr->sgt); + userptr->sgt =3D NULL; + } + + if (userptr->pages) { + bool dirty =3D !(userptr->flags & VIRTGPU_BLOB_FLAG_USE_READONLY); + + unpin_user_pages_dirty_lock(userptr->pages, userptr->npages, + dirty); + kvfree(userptr->pages); + userptr->pages =3D NULL; + } + + virtio_gpu_userptr_unaccount(userptr); +} + +static int +virtio_gpu_userptr_get_entries(struct virtio_gpu_device *vgdev, + struct virtio_gpu_object_userptr *userptr, + struct virtio_gpu_mem_entry **ents, + unsigned int *nents) +{ + bool use_dma_api =3D virtio_gpu_use_dma_api(vgdev->vdev); + struct scatterlist *sg; + unsigned int count; + int si; + + count =3D use_dma_api ? userptr->sgt->nents : userptr->sgt->orig_nents; + if (!count) + return -EINVAL; + + *ents =3D kvmalloc_array(count, sizeof(**ents), GFP_KERNEL); + if (!*ents) + return -ENOMEM; + + if (use_dma_api) { + for_each_sgtable_dma_sg(userptr->sgt, sg, si) { + (*ents)[si].addr =3D cpu_to_le64(sg_dma_address(sg)); + (*ents)[si].length =3D cpu_to_le32(sg_dma_len(sg)); + (*ents)[si].padding =3D 0; + } + } else { + for_each_sgtable_sg(userptr->sgt, sg, si) { + (*ents)[si].addr =3D cpu_to_le64(sg_phys(sg)); + (*ents)[si].length =3D cpu_to_le32(sg->length); + (*ents)[si].padding =3D 0; + } + } + + *nents =3D count; + return 0; +} + +int virtio_gpu_userptr_restore(struct virtio_gpu_device *vgdev, + struct virtio_gpu_object *bo, + struct virtio_gpu_mem_entry **ents, + unsigned int *nents) +{ + struct virtio_gpu_object_userptr *userptr =3D to_virtio_gpu_userptr(bo); + int ret; + + mutex_lock(&userptr->lock); + if (!userptr->sgt || !userptr->pages) { + mutex_unlock(&userptr->lock); + return -EINVAL; + } + + if (userptr->dma_mapped) { + struct device *dev =3D drm_dev_dma_dev(vgdev->ddev); + + dma_unmap_sgtable(dev, userptr->sgt, userptr->dma_dir, 0); + userptr->dma_mapped =3D false; + + ret =3D dma_map_sgtable(dev, userptr->sgt, userptr->dma_dir, 0); + if (ret) { + mutex_unlock(&userptr->lock); + return ret; + } + userptr->dma_mapped =3D true; + } + + ret =3D virtio_gpu_userptr_get_entries(vgdev, userptr, ents, nents); + mutex_unlock(&userptr->lock); + return ret; +} + +static int +virtio_gpu_userptr_init(struct drm_device *dev, struct drm_file *file, + struct virtio_gpu_object_userptr *userptr, + struct virtio_gpu_object_params *params, + const struct virtio_gpu_object_userptr_ops *ops) +{ + struct drm_gem_object *obj; + int ret; + + userptr->start =3D params->userptr; + userptr->npages =3D params->size >> PAGE_SHIFT; + userptr->flags =3D params->blob_flags; + + mutex_init(&userptr->lock); + userptr->vgdev =3D dev->dev_private; + userptr->file =3D file; + userptr->ops =3D ops; + + /* + * Get the resource id before GEM init, so a failed call here + * just needs a plain kfree and no special id zero check in the + * shared resource_id_put helper. + */ + ret =3D virtio_gpu_resource_id_get(userptr->vgdev, + &userptr->base.hw_res_handle); + if (ret) { + mutex_destroy(&userptr->lock); + return ret; + } + + obj =3D &userptr->base.base.base; + obj->funcs =3D &virtio_gpu_userptr_funcs; + + drm_gem_private_object_init(dev, obj, params->size); + INIT_LIST_HEAD(&userptr->base.restore_node); + + return 0; +} + +static const struct virtio_gpu_object_userptr_ops virtio_gpu_userptr_ops = =3D { + .get_pages =3D virtio_gpu_userptr_get_pages, + .put_pages =3D virtio_gpu_userptr_put_pages, +}; + +int virtio_gpu_userptr_create(struct virtio_gpu_device *vgdev, + struct drm_file *file, + struct virtio_gpu_object_params *params, + struct virtio_gpu_object **bo_ptr) +{ + struct virtio_gpu_object_userptr *userptr; + struct virtio_gpu_mem_entry *ents =3D NULL; + struct sg_table *sgt; + struct mm_struct *mm; + unsigned long lock_limit; + unsigned long start; + unsigned long end; + s64 new_pinned; + unsigned int nents; + int ret; + + *bo_ptr =3D NULL; + + if (!params->size || !IS_ALIGNED(params->size, PAGE_SIZE) || + params->userptr !=3D (unsigned long)params->userptr) + return -EINVAL; + + start =3D params->userptr; + if (!IS_ALIGNED(start, PAGE_SIZE) || + check_add_overflow(start, (unsigned long)params->size, &end)) + return -EINVAL; + + if (!can_do_mlock()) + return -EPERM; + + if (params->size >> PAGE_SHIFT > INT_MAX) + return -E2BIG; + + if (!access_ok((void __user *)start, params->size)) + return -EFAULT; + + userptr =3D kzalloc_obj(*userptr); + if (!userptr) + return -ENOMEM; + + ret =3D virtio_gpu_userptr_init(vgdev->ddev, file, userptr, params, + &virtio_gpu_userptr_ops); + if (ret) { + kfree(userptr); + return ret; + } + + mm =3D current->mm; + mmgrab(mm); + lock_limit =3D rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT; + new_pinned =3D atomic64_add_return(userptr->npages, &mm->pinned_vm); + if (new_pinned < 0 || + (new_pinned > lock_limit && !capable(CAP_IPC_LOCK))) { + atomic64_sub(userptr->npages, &mm->pinned_vm); + mmdrop(mm); + ret =3D new_pinned < 0 ? -EOVERFLOW : -ENOMEM; + goto err_cleanup; + } + userptr->mm =3D mm; + + mutex_lock(&userptr->lock); + ret =3D userptr->ops->get_pages(userptr); + mutex_unlock(&userptr->lock); + if (ret) + goto err_cleanup; + + sgt =3D drm_prime_pages_to_sg(vgdev->ddev, userptr->pages, + userptr->npages); + if (IS_ERR(sgt)) { + ret =3D PTR_ERR(sgt); + goto err_cleanup; + } + + userptr->sgt =3D sgt; + + if (virtio_gpu_use_dma_api(vgdev->vdev)) { + enum dma_data_direction dir =3D + (userptr->flags & VIRTGPU_BLOB_FLAG_USE_READONLY) ? + DMA_TO_DEVICE : DMA_BIDIRECTIONAL; + + ret =3D dma_map_sgtable(drm_dev_dma_dev(vgdev->ddev), sgt, + dir, 0); + if (ret) + goto err_cleanup; + + userptr->dma_dir =3D dir; + userptr->dma_mapped =3D true; + } + + ret =3D virtio_gpu_userptr_get_entries(vgdev, userptr, &ents, &nents); + if (ret) + goto err_cleanup; + + virtio_gpu_cmd_resource_create_blob(vgdev, &userptr->base, params, ents, + nents); + + userptr->base.params =3D *params; + virtio_gpu_add_object_to_restore_list(vgdev, &userptr->base); + + *bo_ptr =3D &userptr->base; + return 0; + +err_cleanup: + virtio_gpu_cleanup_object(&userptr->base); + return ret; +} --=20 2.34.1 From nobody Thu Sep 24 12:02:59 2026 Received: from CH5PR02CU005.outbound.protection.outlook.com (mail-northcentralusazon11012070.outbound.protection.outlook.com [40.107.200.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A83424078C0 for ; Thu, 24 Sep 2026 09:56:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.200.70 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243818; cv=fail; b=jgiOCCHJj457CqBGLT6kzGNsUabBy0YAytQIq7Etj4aGMBX8tv8TJ8d/oj9HuK6B+fiDAYUEpWgkGZNdyvaJ4T66+hIujnIrBI+/7CmRhrbhMidQ277y8AdHX52CcCUgXorFUHQ950tQvwUDPsSPheCs3aNsLkoVM8hiPolLIHU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790243818; c=relaxed/simple; bh=CzxGF+4M5PF+o9iOOHzARuxAv5VnaHE3YqFjzO4GOq8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=P1FQD+x1IY+Q9w/chzpZh0s81IzPbOBdsHB2OU7A+wT0jYlPvZsViPjQ0CrbwArnvMt9goeAGf3/NtWZNEJMDoKz33x2WP5s6eiCqatWxZ80seYa6s55Bi+WCFQuAHzLtgBfbrVQGSQuhwy4y1O9un45D3rB4d92USM3ufPzixQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=oUOvP/JG; arc=fail smtp.client-ip=40.107.200.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="oUOvP/JG" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=gH5Uv5oK6Howp8Bo94/vc6Sx/jDPFMGWctk2dk/X5AEe6j83EPDu6V17aHff3k5QpogXZhBv4PSbesAv8a0oQaQK31IwA6XBfDsmW9AD66qP5qOL8WLgXVkcn6z5oe9evw9SO7C1/njCQ88IaeX5vpVAFz1WAJ5LGjBZgc03Kx7lkDPt1+OCOBjP0Sjid7DoB0/FgzQoH+QLL9bokjMZ/qDHc3HAzMcVyVjQ6vfMpwhDxGNOh5v7k6KNB2s/0TDjFfujm4q4vnSmq7y5IVBnt1MVMI/1CwI/iG++bAe+oWs8kQCoOGCA+Z4K2CyP18iTggjXn93Ekjib6EjbUqh3eQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=5hqaldN7+P3zq2opasHkEJZag4SvXgRaREPcyfFNwqQ=; b=sggbipVumEvf0QgP3hoJ1HpuurgtXhMonPP7V4XRqC9Z/L3EjTF5JxgNasDlVf7q8vdGvRBZpSpp/Zg41mi+PbtBtQ9+8l7v9iJUqkroJAkhtcWqnljfwABwVTKLUNDDPDYhh5pn1M9GelL9xRMGQ5rLWvB51Sqmh5rQFby1lXLwuDBDtoSQSROrBDhDCPB/+Q3x19lrHtJJWwwjISYi7c9VIuwY2gBlXc2LsxKE6r19Ta0olnHPDM5DmRFyJAE5gyfyLmjG6RhSHoBQOCkAqCmg/+VYR/jBiQvFmWTuJvhprffFAOFsEysK5IvHDN6Yt9U8DLV67gt4jZgabp9zHA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=collabora.com smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=5hqaldN7+P3zq2opasHkEJZag4SvXgRaREPcyfFNwqQ=; b=oUOvP/JG4YwkVQn3EU/Q2aRiBpZTVhvudgxVwdJJSpU5qR3CPJ8DDHIfgRJQtb1OqWXS19UftmhI5tYM+gJZ6yqc3nrAZVHJWghxrvMsfsfbzDAVR4YsdI2FmD6h4AQ/vfLmpBUxQsxdc6fT0ly3t0PCaEP5WaD2b4HLDPN+bCs= Received: from SJ0PR05CA0123.namprd05.prod.outlook.com (2603:10b6:a03:33d::8) by DSSPR12MB999235.namprd12.prod.outlook.com (2603:10b6:8:377::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.18; Thu, 24 Sep 2026 09:56:35 +0000 Received: from SJ1PEPF00001CE6.namprd03.prod.outlook.com (2603:10b6:a03:33d:cafe::92) by SJ0PR05CA0123.outlook.office365.com (2603:10b6:a03:33d::8) with Microsoft SMTP Server (version=TLS1_3, cipher=TLS_AES_256_GCM_SHA384) id 15.21.428.8 via Frontend Transport; Thu, 24 Sep 2026 09:56:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Received: from satlexmb07.amd.com (165.204.84.17) by SJ1PEPF00001CE6.mail.protection.outlook.com (10.167.242.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.451.8 via Frontend Transport; Thu, 24 Sep 2026 09:56:34 +0000 Received: from honglei-remote.amd.com (10.180.168.240) by satlexmb07.amd.com (10.181.42.216) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.49; Thu, 24 Sep 2026 04:56:20 -0500 From: Honglei Huang To: , , , CC: , , , , , , Honglei Huang Subject: [RFC PATCH v9 4/4] drm/virtio: wire blob ioctl creation to userptr objects Date: Thu, 24 Sep 2026 17:55:56 +0800 Message-ID: <20260924095556.1326164-5-honghuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260924095556.1326164-1-honghuan@amd.com> References: <20260924095556.1326164-1-honghuan@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE6:EE_|DSSPR12MB999235:EE_ X-MS-Office365-Filtering-Correlation-Id: 4961096c-3d31-4dfb-357f-08df1a221e2e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|23010399003|82310400026|1800799024|10067099003|11063799006|18002099003|22082099003|56012099006; X-Microsoft-Antispam-Message-Info: u3vq4KEct+jxcvY9JiCBMsyEbaHG2Fr4HxF5mtnG/mmooYlJcb82SGTY8F5aRlGnp5vMqY32n7roOHfoV0DYbprrFR0nrIKzGTPjl7OG8hNxR0k4qawFWM5vAVF2BSskY3ffCEY6cZ3bm63pKS4AB1vptEyU4Sj4uWpXEiUl3cHkJSmz6+/N3UCXndgnnQJoVYGmC1byIM2P48jf5UHroY8x/wkC2PPoVO0PRmUJ26JEus3TH0HPQ9YS0RfzT1dRujWSKVY3VBnpXFeeFdDVU/G1C70hwlA30+SaPcFULTJWuLteJYEUHyrIDSHCEjIhc1bid1ANByOlq7oM2oueBBfA8qCgvyMpqmN28U3hV1nKhioHuz8ni7Xl4sgbKgpyFNTeuvEKrLPR7I0lxPwkSUcL2ljnFwom/zKaMODHx1i1G5PZGuwE1BpwYLmFax/6E7a9lniGuTKlKc7QrNmeIPup/UP9HFRcazl7d/04zdGHcEYrWHV30NqenlGDr+9so32nDZgUaBS1KNOXn+g9pnJHUxwrqJWWCayEUhUHXa1KNKxMU8gKBImAAXJEKwNPjn5ipc2KyfXx5LeS+NU0xVbbhWibxqX4bXQKgHq39Lmsf+9aaHnjBDKBQBpQmiF+FIpPASfk/wYRYKX5EDIouhUohkKjz2diRmKwwLLnl3o8/BoXQ/KcpZuRnRzxefnjvjcVFBW2NR0imymaDlTDRA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:ErrorRetry;CAT:NONE;SFS:(13230040)(376014)(36860700016)(23010399003)(82310400026)(1800799024)(10067099003)(11063799006)(18002099003)(22082099003)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /fEgoKgr0GePnZcPPRq9wHPsLFzuoom/GV+JFHDEFBS6t9hP81J+t2jTXzKvNaxmszqIDPR4y3K/HWvRtlnekiJgaQw6EonD6ZkNACnU39fsmIudpslkfLJFK1xFdkBsrVT6PZzVxFE+pgHJXiIqHg6B/87a63trQ1pYlkz7PUGIV9+NnfLAyDK3MBFzLv6PWyVQFBjsBC8uANY7C3GrKv5UXIIwvyrdF0PAQHngJ5B2tSahOah/Shtzcp0Ii0s6agoKqmvevz6aTooUJjTGYyQ+H6JD6TFWhBczBMI40EVVvz7nTXEqt9N0YX+qhkeekCe7ZQjRQKvbJ+sah2ITlkBfq9Bok9pISLd/lkPmZ5EoRoeiyBctwMKxnG7umFwpJ2HS4NszpmoNsiD7nYOQ6woGXFyZpyY+V5kxU0s29NGAQyhec1IN4NsZA/KXGP/d X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2026 09:56:34.6422 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4961096c-3d31-4dfb-357f-08df1a221e2e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DSSPR12MB999235 Content-Type: text/plain; charset="utf-8" Integrate userptr into the blob resource creation ioctl. - A non-zero userptr selects virtio_gpu_userptr_create() - Reject userptr unless blob_mem is VIRTGPU_BLOB_MEM_GUEST - Reject VIRTGPU_BLOB_FLAG_USE_READONLY unless the device advertised VIRTIO_GPU_F_BLOB_READONLY - Advertise VIRTGPU_PARAM_USERPTR and VIRTGPU_PARAM_BLOB_READONLY - Add VIRTIO_GPU_F_BLOB_READONLY to the driver's features[] array virtio_has_feature() routes device-specific feature bits through virtio_check_driver_offered_feature(), which calls BUG() when the driver queries a bit it never declared in features[]. The VIRTIO_GPU_F_BLOB_READONLY probe added to virtio_gpu_init() hit exactly that: every probe crashed regardless of host support because the bit was missing from features[]. Registering it there fixes the crash. Signed-off-by: Honglei Huang --- drivers/gpu/drm/virtio/virtgpu_debugfs.c | 1 + drivers/gpu/drm/virtio/virtgpu_drv.c | 1 + drivers/gpu/drm/virtio/virtgpu_ioctl.c | 35 ++++++++++++++++++++---- drivers/gpu/drm/virtio/virtgpu_kms.c | 8 ++++-- 4 files changed, 38 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/virtio/virtgpu_debugfs.c b/drivers/gpu/drm/vir= tio/virtgpu_debugfs.c index 3a68a16b58..b8b9b40584 100644 --- a/drivers/gpu/drm/virtio/virtgpu_debugfs.c +++ b/drivers/gpu/drm/virtio/virtgpu_debugfs.c @@ -55,6 +55,7 @@ static int virtio_gpu_features(struct seq_file *m, void *= data) vgdev->has_resource_assign_uuid); =20 virtio_gpu_add_bool(m, "blob resources", vgdev->has_resource_blob); + virtio_gpu_add_bool(m, "blob readonly", vgdev->has_blob_readonly); virtio_gpu_add_bool(m, "context init", vgdev->has_context_init); virtio_gpu_add_int(m, "cap sets", vgdev->num_capsets); virtio_gpu_add_int(m, "scanouts", vgdev->num_scanouts); diff --git a/drivers/gpu/drm/virtio/virtgpu_drv.c b/drivers/gpu/drm/virtio/= virtgpu_drv.c index 2aaa7cb080..f1edd20c37 100644 --- a/drivers/gpu/drm/virtio/virtgpu_drv.c +++ b/drivers/gpu/drm/virtio/virtgpu_drv.c @@ -182,6 +182,7 @@ static unsigned int features[] =3D { VIRTIO_GPU_F_RESOURCE_BLOB, VIRTIO_GPU_F_CONTEXT_INIT, VIRTIO_GPU_F_BLOB_ALIGNMENT, + VIRTIO_GPU_F_BLOB_READONLY, }; =20 #ifdef CONFIG_PM_SLEEP diff --git a/drivers/gpu/drm/virtio/virtgpu_ioctl.c b/drivers/gpu/drm/virti= o/virtgpu_ioctl.c index 3d8e4ccdb7..3dc058e50e 100644 --- a/drivers/gpu/drm/virtio/virtgpu_ioctl.c +++ b/drivers/gpu/drm/virtio/virtgpu_ioctl.c @@ -36,7 +36,10 @@ =20 #define VIRTGPU_BLOB_FLAG_USE_MASK (VIRTGPU_BLOB_FLAG_USE_MAPPABLE | \ VIRTGPU_BLOB_FLAG_USE_SHAREABLE | \ - VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE) + VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE | \ + VIRTGPU_BLOB_FLAG_USE_READONLY) + +#define VIRTGPU_BLOB_HINT_MASK DRM_VIRTGPU_BLOB_FLAG_HINT_DEFER_MAPPING =20 /* Must be called with &virtio_gpu_fpriv.struct_mutex held. */ static void virtio_gpu_create_context_locked(struct virtio_gpu_device *vgd= ev, @@ -122,6 +125,12 @@ static int virtio_gpu_getparam_ioctl(struct drm_device= *dev, void *data, return -ENOENT; value =3D vgdev->blob_alignment; break; + case VIRTGPU_PARAM_USERPTR: + value =3D 1; + break; + case VIRTGPU_PARAM_BLOB_READONLY: + value =3D vgdev->has_blob_readonly ? 1 : 0; + break; default: return -EINVAL; } @@ -453,11 +462,23 @@ static int verify_blob(struct virtio_gpu_device *vgde= v, if (rc_blob->blob_flags & ~VIRTGPU_BLOB_FLAG_USE_MASK) return -EINVAL; =20 + if (rc_blob->blob_hints & ~VIRTGPU_BLOB_HINT_MASK) + return -EINVAL; + if (rc_blob->blob_flags & VIRTGPU_BLOB_FLAG_USE_CROSS_DEVICE) { if (!vgdev->has_resource_assign_uuid) return -EINVAL; } =20 + if (rc_blob->blob_flags & VIRTGPU_BLOB_FLAG_USE_READONLY) { + if (!vgdev->has_blob_readonly) + return -EINVAL; + } + + if (rc_blob->userptr && + rc_blob->blob_mem !=3D VIRTGPU_BLOB_MEM_GUEST) + return -EINVAL; + switch (rc_blob->blob_mem) { case VIRTGPU_BLOB_MEM_GUEST: *guest_blob =3D true; @@ -495,6 +516,7 @@ static int verify_blob(struct virtio_gpu_device *vgdev, params->blob =3D true; params->blob_flags =3D rc_blob->blob_flags; params->blob_hints =3D rc_blob->blob_hints; + params->userptr =3D rc_blob->userptr; =20 if (vgdev->has_blob_alignment && !IS_ALIGNED(params->size, vgdev->blob_alignment)) @@ -518,9 +540,10 @@ static int virtio_gpu_resource_create_blob_ioctl(struc= t drm_device *dev, struct virtio_gpu_fpriv *vfpriv =3D file->driver_priv; struct drm_virtgpu_resource_create_blob *rc_blob =3D data; =20 - if (verify_blob(vgdev, vfpriv, ¶ms, rc_blob, - &guest_blob, &host3d_blob)) - return -EINVAL; + ret =3D verify_blob(vgdev, vfpriv, ¶ms, rc_blob, + &guest_blob, &host3d_blob); + if (ret) + return ret; =20 if (vgdev->has_virgl_3d) virtio_gpu_create_context(dev, file); @@ -538,7 +561,9 @@ static int virtio_gpu_resource_create_blob_ioctl(struct= drm_device *dev, vfpriv->ctx_id, NULL, NULL); } =20 - if (guest_blob) + if (guest_blob && params.userptr) + ret =3D virtio_gpu_userptr_create(vgdev, file, ¶ms, &bo); + else if (guest_blob) ret =3D virtio_gpu_object_create(vgdev, ¶ms, &bo, NULL); else if (!guest_blob && host3d_blob) ret =3D virtio_gpu_vram_create(vgdev, ¶ms, &bo); diff --git a/drivers/gpu/drm/virtio/virtgpu_kms.c b/drivers/gpu/drm/virtio/= virtgpu_kms.c index 1d4d3bf46a..06c2bded49 100644 --- a/drivers/gpu/drm/virtio/virtgpu_kms.c +++ b/drivers/gpu/drm/virtio/virtgpu_kms.c @@ -249,15 +249,19 @@ int virtio_gpu_init(struct virtio_device *vdev, struc= t drm_device *dev) vgdev->blob_alignment =3D blob_alignment; } =20 + if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_BLOB_READONLY)) + vgdev->has_blob_readonly =3D true; + DRM_INFO("features: %cvirgl %cedid %cresource_blob %chost_visible", vgdev->has_virgl_3d ? '+' : '-', vgdev->has_edid ? '+' : '-', vgdev->has_resource_blob ? '+' : '-', vgdev->has_host_visible ? '+' : '-'); =20 - DRM_INFO("features: %ccontext_init %cblob_alignment\n", + DRM_INFO("features: %ccontext_init %cblob_alignment %cblob_readonly\n", vgdev->has_context_init ? '+' : '-', - vgdev->has_blob_alignment ? '+' : '-'); + vgdev->has_blob_alignment ? '+' : '-', + vgdev->has_blob_readonly ? '+' : '-'); =20 ret =3D virtio_gpu_find_vqs(vgdev); if (ret) { --=20 2.34.1