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Wed, 23 Sep 2026 15:04:15 -0700 (PDT) Received: from [10.197.48.252] ([2409:40c2:5047:8a3f:9ef:734:1515:aac8]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e95c7bf6bsm7962458eec.8.2026.09.23.15.04.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 15:04:14 -0700 (PDT) From: Bhargav Joshi Date: Thu, 24 Sep 2026 03:33:30 +0530 Subject: [PATCH v4 1/2] regulator: dt-bindings: nvidia,tegra-regulators-coupling: Convert to DT schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-ti-tps6586x-v4-1-6c7a8fb8b646@gmail.com> References: <20260924-ti-tps6586x-v4-0-6c7a8fb8b646@gmail.com> In-Reply-To: <20260924-ti-tps6586x-v4-0-6c7a8fb8b646@gmail.com> To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Lee Jones , Shree Ramamoorthy , Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Svyatoslav Ryhel , Laxman Dewangan Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com, mfd@lists.linux.dev, Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790201024; l=6027; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=5NRTfbaTrkCr5LOdsA5VA+Gzr3i5fzEHKnaeh5azfmE=; b=fZ8nVo7kLTKYNRQ3rXO/ekavlZuaLFdw7hQTwo+aYkVE76oAPggIx8REBTvceme10MBC2ePi8 TOSaT4Zelw3DEGA/AxlPUrOYo6rJXciI4hlzDJJdPsNw0BdoQ7lEZQW X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Convert NVIDIA Tegra Regulators Coupling from legacy text to DT schema. Set additionalProperties true as this is shared schema. Signed-off-by: Bhargav Joshi --- .../regulator/nvidia,tegra-regulators-coupling.txt | 65 ------------------- .../nvidia,tegra-regulators-coupling.yaml | 74 ++++++++++++++++++= ++++ 2 files changed, 74 insertions(+), 65 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/nvidia,tegra-regul= ators-coupling.txt b/Documentation/devicetree/bindings/regulator/nvidia,teg= ra-regulators-coupling.txt deleted file mode 100644 index 4bf2dbf7c6cc..000000000000 --- a/Documentation/devicetree/bindings/regulator/nvidia,tegra-regulators-c= oupling.txt +++ /dev/null @@ -1,65 +0,0 @@ -NVIDIA Tegra Regulators Coupling -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D - -NVIDIA Tegra SoC's have a mandatory voltage-coupling between regulators. -Thus on Tegra20 there are 3 coupled regulators and on NVIDIA Tegra30 -there are 2. - -Tegra20 voltage coupling ------------------------- - -On Tegra20 SoC's there are 3 coupled regulators: CORE, RTC and CPU. -The CORE and RTC voltages shall be in a range of 170mV from each other -and they both shall be higher than the CPU voltage by at least 120mV. - -Tegra30 voltage coupling ------------------------- - -On Tegra30 SoC's there are 2 coupled regulators: CORE and CPU. The CORE -and CPU voltages shall be in a range of 300mV from each other and CORE -voltage shall be higher than the CPU by N mV, where N depends on the CPU -voltage. - -Required properties: -- nvidia,tegra-core-regulator: Boolean property that designates regulator - as the "Core domain" voltage regulator. -- nvidia,tegra-rtc-regulator: Boolean property that designates regulator - as the "RTC domain" voltage regulator. -- nvidia,tegra-cpu-regulator: Boolean property that designates regulator - as the "CPU domain" voltage regulator. - -Example: - - pmic { - regulators { - core_vdd_reg: core { - regulator-name =3D "vdd_core"; - regulator-min-microvolt =3D <950000>; - regulator-max-microvolt =3D <1300000>; - regulator-coupled-with =3D <&rtc_vdd_reg &cpu_vdd_reg>; - regulator-coupled-max-spread =3D <170000 550000>; - - nvidia,tegra-core-regulator; - }; - - rtc_vdd_reg: rtc { - regulator-name =3D "vdd_rtc"; - regulator-min-microvolt =3D <950000>; - regulator-max-microvolt =3D <1300000>; - regulator-coupled-with =3D <&core_vdd_reg &cpu_vdd_reg>; - regulator-coupled-max-spread =3D <170000 550000>; - - nvidia,tegra-rtc-regulator; - }; - - cpu_vdd_reg: cpu { - regulator-name =3D "vdd_cpu"; - regulator-min-microvolt =3D <750000>; - regulator-max-microvolt =3D <1125000>; - regulator-coupled-with =3D <&core_vdd_reg &rtc_vdd_reg>; - regulator-coupled-max-spread =3D <550000 550000>; - - nvidia,tegra-cpu-regulator; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/regulator/nvidia,tegra-regul= ators-coupling.yaml b/Documentation/devicetree/bindings/regulator/nvidia,te= gra-regulators-coupling.yaml new file mode 100644 index 000000000000..aae951cdce8b --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/nvidia,tegra-regulators-c= oupling.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/nvidia,tegra-regulators-coupl= ing.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra Regulators Coupling + +description: > + NVIDIA Tegra SoC's have a mandatory voltage-coupling between regulators.= Thus + on Tegra20 there are 3 coupled regulators and on NVIDIA Tegra30 there ar= e 2. + + On Tegra20 SoC's - there are 3 coupled regulators:CORE, RTC and CPU. The= CORE + and RTC voltages shall be in a range of 170mV from each other and they b= oth + shall be higher than the CPU voltage by at least 120mV. + + On Tegra30 SoC's - there are 2 coupled regulators:CORE and CPU. The CORE= and + CPU voltages shall be in a range of 300mV from each other and CORE volta= ge + shall be higher than the CPU by N mV, where N depends on the CPU voltage. + +maintainers: + - Dmitry Osipenko + - Thierry Reding + +properties: + nvidia,tegra-core-regulator: + description: designates regulator as the "Core domain" voltage regulat= or. + type: boolean + + nvidia,tegra-rtc-regulator: + description: designates regulator as the "RTC domain" voltage regulato= r. + type: boolean + + nvidia,tegra-cpu-regulator: + description: designates regulator as the "CPU domain" voltage regulato= r. + type: boolean + +additionalProperties: true + +examples: + - | + pmic { + regulators { + core_vdd_reg: core { + regulator-name =3D "vdd_core"; + regulator-min-microvolt =3D <950000>; + regulator-max-microvolt =3D <1300000>; + regulator-coupled-with =3D <&rtc_vdd_reg &cpu_vdd_reg>; + regulator-coupled-max-spread =3D <170000 550000>; + + nvidia,tegra-core-regulator; + }; + + rtc_vdd_reg: rtc { + regulator-name =3D "vdd_rtc"; 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Wed, 23 Sep 2026 15:04:28 -0700 (PDT) Received: from [10.197.48.252] ([2409:40c2:5047:8a3f:9ef:734:1515:aac8]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e95c7bf6bsm7962458eec.8.2026.09.23.15.04.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 15:04:28 -0700 (PDT) From: Bhargav Joshi Date: Thu, 24 Sep 2026 03:33:31 +0530 Subject: [PATCH v4 2/2] regulator: dt-bindings: Reference Tegra regulator coupling schema Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-ti-tps6586x-v4-2-6c7a8fb8b646@gmail.com> References: <20260924-ti-tps6586x-v4-0-6c7a8fb8b646@gmail.com> In-Reply-To: <20260924-ti-tps6586x-v4-0-6c7a8fb8b646@gmail.com> To: Liam Girdwood , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thierry Reding , Lee Jones , Shree Ramamoorthy , Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Svyatoslav Ryhel , Laxman Dewangan Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, goledhruva@gmail.com, m-chawdhry@ti.com, daniel.baluta@gmail.com, simona.toaca@nxp.com, j.bhargav.u@gmail.com, mfd@lists.linux.dev, Thierry Reding , linux-tegra@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790201024; l=3311; i=j.bhargav.u@gmail.com; h=from:subject:message-id; bh=oh1uRWUKAGixSR34GxD7EUuuW43kClpI615CBwPotqw=; b=uxszv7d1V/uZD/9TZRa1ZPHNJ7u9o6gnMu86wq6T5+Q93wv32efYUXITAjv0tGHwlLraiSBRn hPQFzwtSIA4AiV50xqdhPxSGwJcT9TPLCxWImedWvfury7RyBXvsWJu X-Developer-Key: i=j.bhargav.u@gmail.com; a=ed25519; pk=IqNDwUZKECEA+n8wXctFLBbYL9NhFstZNbOznm/nX1k= Several PMICs used on Tegra boards TPS65910, TPS62360, and MAX77620 use Tegra-specific regulator coupling properties. Update their dt bindings to reference the shared nvidia,tegra-regulators-coupling.yaml schema. Reviewed-by: Rob Herring (Arm) Signed-off-by: Bhargav Joshi --- Documentation/devicetree/bindings/mfd/ti,tps65910.yaml | 12 ++++++++= +--- .../bindings/regulator/maxim,max77620-regulator.yaml | 5 ++++- Documentation/devicetree/bindings/regulator/ti,tps62360.yaml | 1 + 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml b/Docum= entation/devicetree/bindings/mfd/ti,tps65910.yaml index f1a76f88fc0c..209dc97909bf 100644 --- a/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,tps65910.yaml @@ -97,7 +97,9 @@ properties: patternProperties: "^(vrtc|vio|vpll|vdac|vmmc|vbb|vddctrl)$": type: object - $ref: /schemas/regulator/regulator.yaml# + allOf: + - $ref: /schemas/regulator/regulator.yaml# + - $ref: /schemas/regulator/nvidia,tegra-regulators-coupling.yaml# properties: ti,regulator-ext-sleep-control: description: | @@ -110,7 +112,9 @@ properties: =20 "^(vdd[1-3]|vaux([1-2]|33)|vdig[1-2])$": type: object - $ref: /schemas/regulator/regulator.yaml# + allOf: + - $ref: /schemas/regulator/regulator.yaml# + - $ref: /schemas/regulator/nvidia,tegra-regulators-coupling.yaml# properties: ti,regulator-ext-sleep-control: description: | @@ -123,7 +127,9 @@ properties: =20 "^ldo[1-8]$": type: object - $ref: /schemas/regulator/regulator.yaml# + allOf: + - $ref: /schemas/regulator/regulator.yaml# + - $ref: /schemas/regulator/nvidia,tegra-regulators-coupling.yaml# properties: ti,regulator-ext-sleep-control: description: | diff --git a/Documentation/devicetree/bindings/regulator/maxim,max77620-reg= ulator.yaml b/Documentation/devicetree/bindings/regulator/maxim,max77620-re= gulator.yaml index 0f2901cab8af..a2778c35919b 100644 --- a/Documentation/devicetree/bindings/regulator/maxim,max77620-regulator.= yaml +++ b/Documentation/devicetree/bindings/regulator/maxim,max77620-regulator.= yaml @@ -22,7 +22,10 @@ patternProperties: =20 "^(sd[0-4]|ldo[0-8])$": type: object - $ref: /schemas/regulator/regulator.yaml# + allOf: + - $ref: /schemas/regulator/regulator.yaml# + - $ref: /schemas/regulator/nvidia,tegra-regulators-coupling.yaml# + unevaluatedProperties: false =20 properties: diff --git a/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml b= /Documentation/devicetree/bindings/regulator/ti,tps62360.yaml index 90c39275c150..6768fc6ea0d3 100644 --- a/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml +++ b/Documentation/devicetree/bindings/regulator/ti,tps62360.yaml @@ -20,6 +20,7 @@ description: | =20 allOf: - $ref: regulator.yaml# + - $ref: /schemas/regulator/nvidia,tegra-regulators-coupling.yaml# =20 properties: compatible: --=20 2.55.0