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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: Daniel Thompson , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Davide Caratti , Lorenzo Bianconi X-Mailer: b4 0.14.3 X-Proofpoint-GUID: NGFNTTIIEPC_KVlJ21jZMCw6rmq-J6bh X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI0MDA0NCBTYWx0ZWRfX59eFt7p8UcOq XG2C4dwj80nLSveV+fbcIwQw92MJqCNRfzJZ7iO61gzh6KGoHzwP9M4Vs9xK13fto7LHrQVixOq SfQK/IKAUA6tMOgXgdByQNUaCFXrFrSg89sTIoPHLY9hS8JpAMnFuMHlJFah/i5I//Vtb2UFNXQ o2w9xbStPufOKW16af99uR40JqJUgiOJcxK5wku4bpRKJqgjiN03tytX8k5BLLRS39EZX2oDd52 OB8OMjTb0Ugqy1xijSHOUuemp59b3jid7DMpPMNsnCNDLB5YegGDojic+7bDP6TCZIypElSGF2m pPglL7lIXCHMTgK0tANQ/kIHxU8Z08TjdK5jHRSF3tFTB3Un4UfZ86z7xOB//fnZwGqUjEgiHbd sBf9coisNClJihOlFarTolHG+nZQ+g+apUmNz+kYYyAEgntr4VNhsrs0lvDhuBd9SyyULach/oE dI+Zj5guKG1Xtk2Js+A== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI0MDA0NCBTYWx0ZWRfX0xaVCHirWvMo 9r5m46coK8HNE79f/72+dexYhcLAOImjk/Tc5SwcuzFQrqy3E93D9rlaCGiG6uZ7aW36jz9wc8F pu6X1oiVE00aMhkMs9269xW5Eh/HsYQ= X-Proofpoint-ORIG-GUID: NGFNTTIIEPC_KVlJ21jZMCw6rmq-J6bh X-Authority-Analysis: v=2.4 cv=GI+dgeNK c=1 sm=1 tr=0 ts=6ab4ffbc cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=20KFwNOVAAAA:8 a=EUspDBNiAAAA:8 a=YMusGnoBK0k3reyp_EkA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-24_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 malwarescore=0 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609240044 Implement the offload of the tc mqprio hw queue priority in the stmmac driver. When the mqprio qdisc is configured in channel mode, the MTL TX scheduler is switched to strict priority, and the PSTQX/PSTC priority bitmask of each TX queue is programmed from the set of frame priorities mapped to the owning traffic class (qopt->prio_tc_map). The channel mode offload requires the DCB hw feature and a 1:1 TC to TX queue mapping, with a single queue per TC. Configurations with AVB queues are rejected, since forcing strict priority conflicts with the CBS algorithm. In the default DCB mode, only the netdev TC map and the FPE preemption class mapping are offloaded, leaving the MTL scheduler and the per-queue priorities to the devicetree configuration. Reviewed-by: Davide Caratti Signed-off-by: Lorenzo Bianconi --- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 6 + drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c | 2 +- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 25 +++-- drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c | 129 ++++++++++++++++++= ++-- 4 files changed, 140 insertions(+), 22 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/eth= ernet/stmicro/stmmac/stmmac.h index 4fc96b317d79..69b400e9b138 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -299,6 +299,12 @@ struct stmmac_priv { /* Protect est parameters */ struct mutex est_lock; struct stmmac_est *est; + + struct { + u32 prio[MTL_MAX_TX_QUEUES]; + u8 algo; + } xmit_qdisc; + struct dma_features dma_cap; struct stmmac_counters mmc; int hw_cap_support; diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c b/drivers/net= /ethernet/stmicro/stmmac/stmmac_fpe.c index c889204a7aa5..b6b5ef7c8fc4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_fpe.c @@ -230,7 +230,7 @@ int dwmac5_fpe_map_preemption_class(struct net_device *= ndev, if (count =3D=3D 1) continue; =20 - if (priv->plat->tx_sched_algorithm =3D=3D MTL_TX_ALGORITHM_SP) { + if (priv->xmit_qdisc.algo =3D=3D MTL_TX_ALGORITHM_SP) { NL_SET_ERR_MSG_MOD(extack, ALG_ERR_MSG); return -EINVAL; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/ne= t/ethernet/stmicro/stmmac/stmmac_main.c index bf9e7e4cb1c3..0c9083f8846e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3533,17 +3533,11 @@ static void stmmac_mac_config_rx_queues_prio(struct= stmmac_priv *priv) */ static void stmmac_mac_config_tx_queues_prio(struct stmmac_priv *priv) { - u8 tx_queues_count =3D priv->plat->tx_queues_to_use; - u8 queue; - u32 prio; - - for (queue =3D 0; queue < tx_queues_count; queue++) { - if (!priv->plat->tx_queues_cfg[queue].use_prio) - continue; + int i; =20 - prio =3D priv->plat->tx_queues_cfg[queue].prio; - stmmac_tx_queue_prio(priv, priv->hw, prio, queue); - } + for (i =3D 0; i < priv->plat->tx_queues_to_use; i++) + stmmac_tx_queue_prio(priv, priv->hw, + priv->xmit_qdisc.prio[i], i); } =20 /** @@ -3604,7 +3598,7 @@ static void stmmac_mtl_configuration(struct stmmac_pr= iv *priv) /* Configure MTL TX algorithms */ if (tx_queues_count > 1) stmmac_prog_mtl_tx_algorithms(priv, priv->hw, - priv->plat->tx_sched_algorithm); + priv->xmit_qdisc.algo); =20 /* Configure CBS in AVB TX queues */ if (tx_queues_count > 1) @@ -7921,6 +7915,15 @@ static int __stmmac_dvr_probe(struct device *device, priv->wol_irq =3D res->wol_irq; priv->sfty_irq =3D res->sfty_irq; =20 + /* Default xmit qdisc configuration */ + for (i =3D 0; i < MTL_MAX_TX_QUEUES; i++) { + if (!priv->plat->tx_queues_cfg[i].use_prio) + continue; + + priv->xmit_qdisc.prio[i] =3D priv->plat->tx_queues_cfg[i].prio; + } + priv->xmit_qdisc.algo =3D priv->plat->tx_sched_algorithm; + if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN) { ret =3D stmmac_msi_init(priv, res); if (ret) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/= ethernet/stmicro/stmmac/stmmac_tc.c index 42a00446e9b4..54242461a860 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c @@ -346,6 +346,9 @@ static int tc_setup_cbs(struct stmmac_priv *priv, if (!priv->dma_cap.av) return -EOPNOTSUPP; =20 + if (qopt->enable && priv->xmit_qdisc.algo =3D=3D MTL_TX_ALGORITHM_SP) + return -EOPNOTSUPP; + port_transmit_rate_kbps =3D qopt->idleslope - qopt->sendslope; =20 if (qopt->enable) { @@ -1265,6 +1268,23 @@ static int stmmac_reset_tc_mqprio(struct net_device = *ndev, struct netlink_ext_ack *extack) { struct stmmac_priv *priv =3D netdev_priv(ndev); + int i; + + for (i =3D 0; i < priv->plat->tx_queues_to_use; i++) { + u32 prio; + + if (priv->plat->tx_queues_cfg[i].use_prio) + prio =3D priv->plat->tx_queues_cfg[i].prio; + else + prio =3D 0; + + stmmac_tx_queue_prio(priv, priv->hw, prio, i); + priv->xmit_qdisc.prio[i] =3D prio; + } + + stmmac_prog_mtl_tx_algorithms(priv, priv->hw, + priv->plat->tx_sched_algorithm); + priv->xmit_qdisc.algo =3D priv->plat->tx_sched_algorithm; =20 netdev_reset_tc(ndev); netif_set_real_num_tx_queues(ndev, priv->plat->tx_queues_to_use); @@ -1272,6 +1292,73 @@ static int stmmac_reset_tc_mqprio(struct net_device = *ndev, return stmmac_fpe_map_preemption_class(priv, ndev, extack, 0); } =20 +static void tc_mqprio_config_queue_prio(struct stmmac_priv *priv, + struct tc_mqprio_qopt *qopt) +{ + int i; + + for (i =3D 0; i < priv->plat->tx_queues_to_use; i++) { + u32 prio =3D 0; + int j; + + for (j =3D 0; j < qopt->num_tc; j++) { + int p; + + if (qopt->offset[j] !=3D i) + continue; + + /* The PSTQX/PSTC priority map is 8 bits wide, so only + * priorities 0-7 can be represented in hardware. + * Priorities 8-15 are handled in software by the + * kernel through the netdev prio_tc_map. + */ + for (p =3D 0; p < 8; p++) { + if (qopt->prio_tc_map[p] =3D=3D j) + prio |=3D BIT(p); + } + break; + } + + stmmac_tx_queue_prio(priv, priv->hw, prio, i); + priv->xmit_qdisc.prio[i] =3D prio; + } + + stmmac_prog_mtl_tx_algorithms(priv, priv->hw, MTL_TX_ALGORITHM_SP); +} + +static int tc_mqprio_validate_chan_mode(struct stmmac_priv *priv, + struct tc_mqprio_qopt_offload *mqprio) +{ + struct tc_mqprio_qopt *qopt =3D &mqprio->qopt; + int i; + + if (!priv->dma_cap.dcben) + return -EOPNOTSUPP; + + /* Forcing strict priority conflicts with the CBS algorithm + * of AVB queues, so reject the offload when any queue is + * configured as AVB. + */ + for (i =3D 0; i < priv->plat->tx_queues_to_use; i++) { + if (priv->plat->tx_queues_cfg[i].mode_to_use =3D=3D MTL_QUEUE_AVB) + return -EOPNOTSUPP; + } + + for (i =3D 0; i < qopt->num_tc; i++) { + /* The offload switches the MTL scheduler to strict + * priority, which only supports a 1:1 TC to TX queue + * mapping. + */ + if (qopt->count[i] > 1 || qopt->offset[i] !=3D i) { + NL_SET_ERR_MSG_MOD(mqprio->extack, + "SP requires 1:1 TXQ map"); + return -EOPNOTSUPP; + } + } + + return 0; +} + static int tc_setup_dwmac510_mqprio(struct stmmac_priv *priv, struct tc_mqprio_qopt_offload *mqprio) { @@ -1282,23 +1369,22 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_p= riv *priv, struct tc_mqprio_qopt *qopt =3D &mqprio->qopt; struct net_device *ndev =3D priv->dev; u8 ndev_prio_tc_map[TC_BITMASK + 1]; - int i, err, ndev_ntc; + int i, err, ndev_ntc, mode; =20 if (!qopt->num_tc) return stmmac_reset_tc_mqprio(ndev, extack); =20 - if (qopt->num_tc > ARRAY_SIZE(tc_to_txq)) + if (qopt->num_tc > priv->plat->tx_queues_to_use) return -EINVAL; =20 - /* save current tc values for reset */ - ndev_ntc =3D netdev_get_num_tc(ndev); - for (i =3D 0; i < ARRAY_SIZE(ndev->tc_to_txq); i++) - ndev_tc_to_txq[i].combined =3D - READ_ONCE(ndev->tc_to_txq[i].combined); - for (i =3D 0; i < ARRAY_SIZE(ndev_prio_tc_map); i++) - ndev_prio_tc_map[i] =3D READ_ONCE(ndev->prio_tc_map[i]); - for (i =3D 0; i < qopt->num_tc; i++) { + if (qopt->offset[i] + qopt->count[i] > + priv->plat->tx_queues_to_use) { + NL_SET_ERR_MSG_MOD(extack, + "Queues exceed hw TX queues"); + return -EINVAL; + } + tc_to_txq[i] =3D (struct netdev_tc_txq) { .count =3D qopt->count[i], .offset =3D qopt->offset[i], @@ -1306,6 +1392,24 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_pr= iv *priv, num_tx_queues +=3D qopt->count[i]; } =20 + mode =3D mqprio->flags & TC_MQPRIO_F_MODE ? mqprio->mode + : TC_MQPRIO_MODE_DCB; + if (mode =3D=3D TC_MQPRIO_MODE_CHANNEL) { + err =3D tc_mqprio_validate_chan_mode(priv, mqprio); + if (err) + return err; + + priv->xmit_qdisc.algo =3D MTL_TX_ALGORITHM_SP; + } + + /* save current tc values for reset */ + ndev_ntc =3D netdev_get_num_tc(ndev); + for (i =3D 0; i < ARRAY_SIZE(ndev->tc_to_txq); i++) + ndev_tc_to_txq[i].combined =3D + READ_ONCE(ndev->tc_to_txq[i].combined); + for (i =3D 0; i < ARRAY_SIZE(ndev_prio_tc_map); i++) + ndev_prio_tc_map[i] =3D READ_ONCE(ndev->prio_tc_map[i]); + err =3D stmmac_set_ndev_tcs(ndev, qopt->num_tc, tc_to_txq); if (err) goto error_reset_tc; @@ -1320,6 +1424,9 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_pri= v *priv, if (err) goto error_reset_num_tx_queues; =20 + if (mode =3D=3D TC_MQPRIO_MODE_CHANNEL) + tc_mqprio_config_queue_prio(priv, qopt); + return 0; =20 error_reset_num_tx_queues: @@ -1327,6 +1434,8 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_pri= v *priv, netdev_warn(ndev, "Failed to restore %u TX queues\n", ndev_num_tx_queues); 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: Daniel Thompson , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Lorenzo Bianconi X-Mailer: b4 0.14.3 X-Proofpoint-GUID: xPw_UACwuQsIkQNV8lNbjEd5qUjQIZ0_ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI0MDA0NCBTYWx0ZWRfXy2hypllGTZkA YDz7sxtU2JRS+ZtbgYBbyVgreG8buG0tbb5sG8Ej+c33V0FogWv3uTsTaZBvtbDzaLXdlGOPUFn mNaDPm54AX1ao90wWJwwqBMCmFvW9s0KDCcbyM6hQmfjSIYKLhR2KS/JGD2G8V8hcTuJAwdm+ra YVJN9uyvbxp/k4rEivuGWvi4Z6XLioIIDAWbLdLc/SWZSd8RuApjp3yWV31xnuT/pXXrn4J0IWk L+wIZ1uEze41aKR2nnNuVkr8sUMwuIPPzP07wOw9h7L1uEctEeSCTeF1xaJyyxmvuFYY5ATAIcV VmOHOCSwlFqfyGGfZ2LEhwe4ldP13y+T1/RKFUrX1e9yTvMFO7OMRbMBXXBZYzeOx586fYM1MFL 7Zq/u5UNKA+7yCo7d28wc6rwPhavnCLmkepjz0+ZGGUaaLDTr1YeWdaD4nEJBbqhDm5cfYiufIA 8YodSia2drP0P/mA1iA== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI0MDA0NCBTYWx0ZWRfX5r+61G5aEM/3 9j0szpFcigVax12HE8LTENNHlv3T73CmX9Pm8jhL8JwZVTUWaUOlGRzwQh/lfHaX4f50FAxRF1f c8H0QY/gkW+RjZXKeFXOLcuW/dCZCB8= X-Proofpoint-ORIG-GUID: xPw_UACwuQsIkQNV8lNbjEd5qUjQIZ0_ X-Authority-Analysis: v=2.4 cv=GI+dgeNK c=1 sm=1 tr=0 ts=6ab4ffbd cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=Td2Y5uhiG6mrzya5eswA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-24_02,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 malwarescore=0 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609240044 stmmac_hw_setup() unconditionally sets the number of real TX queues to plat->tx_queues_to_use on every device open. When a tc-mqprio qdisc is offloaded the driver reduces netif_set_real_num_tx_queues() to the number of queues enabled by the offload, but the next device open reverts it to the devicetree value while the netdev TC map is still the one programmed by the qdisc, leaving the two inconsistent. Store the number of TX queues enabled by the current qdisc configuration in the per-qdisc state (priv->xmit_qdisc.num_tx_queues) and use it in stmmac_hw_setup() in place of the devicetree value. The field defaults to plat->tx_queues_to_use at probe time and is restored to it when the mqprio qdisc is destroyed or its setup fails, so a device without an active mqprio offload keeps the devicetree configured queue count across reopens. Signed-off-by: Lorenzo Bianconi --- drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 3 ++- drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c | 3 +++ 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/eth= ernet/stmicro/stmmac/stmmac.h index 69b400e9b138..a8f06192d696 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h @@ -302,6 +302,7 @@ struct stmmac_priv { =20 struct { u32 prio[MTL_MAX_TX_QUEUES]; + u32 num_tx_queues; u8 algo; } xmit_qdisc; =20 diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/ne= t/ethernet/stmicro/stmmac/stmmac_main.c index 0c9083f8846e..ad6be5166b95 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -3772,7 +3772,7 @@ static int stmmac_hw_setup(struct net_device *dev) =20 /* Configure real RX and TX queues */ netif_set_real_num_rx_queues(dev, priv->plat->rx_queues_to_use); - netif_set_real_num_tx_queues(dev, priv->plat->tx_queues_to_use); + netif_set_real_num_tx_queues(dev, priv->xmit_qdisc.num_tx_queues); =20 /* Start the ball rolling... */ stmmac_start_all_dma(priv); @@ -7923,6 +7923,7 @@ static int __stmmac_dvr_probe(struct device *device, priv->xmit_qdisc.prio[i] =3D priv->plat->tx_queues_cfg[i].prio; } priv->xmit_qdisc.algo =3D priv->plat->tx_sched_algorithm; + priv->xmit_qdisc.num_tx_queues =3D priv->plat->tx_queues_to_use; =20 if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN) { ret =3D stmmac_msi_init(priv, res); diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c b/drivers/net/= ethernet/stmicro/stmmac/stmmac_tc.c index 54242461a860..1accc8e962d9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c @@ -1285,6 +1285,7 @@ static int stmmac_reset_tc_mqprio(struct net_device *= ndev, stmmac_prog_mtl_tx_algorithms(priv, priv->hw, priv->plat->tx_sched_algorithm); priv->xmit_qdisc.algo =3D priv->plat->tx_sched_algorithm; + priv->xmit_qdisc.num_tx_queues =3D priv->plat->tx_queues_to_use; =20 netdev_reset_tc(ndev); netif_set_real_num_tx_queues(ndev, priv->plat->tx_queues_to_use); @@ -1427,6 +1428,8 @@ static int tc_setup_dwmac510_mqprio(struct stmmac_pri= v *priv, if (mode =3D=3D TC_MQPRIO_MODE_CHANNEL) tc_mqprio_config_queue_prio(priv, qopt); =20 + priv->xmit_qdisc.num_tx_queues =3D num_tx_queues; + return 0; =20 error_reset_num_tx_queues: --=20 2.55.0