From nobody Fri Sep 25 07:23:46 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BD83411A04; Thu, 24 Sep 2026 17:26:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790270766; cv=none; b=kB8o1tQQ40TVypbaDMsjYlFJaaDAO9t3teuadPSbhqH+V6H+/0iABBTwYuxZlZ/rzmMBQ4PwnMktA9v2ihP9nZpR3dUkDxvn+hc6rKF4ZkauQikO9q3g1Q7u9/VYBn9D9T238tVBWefYizK27ZneXf1W5+QV8pmqyfIuw1/OzSY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790270766; c=relaxed/simple; bh=/A6Hac4aqJzoz7kYkCtMzFY90tiyJ1AMuQj5SToK5yc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Bq6ZyYyP3d3qFItDbyKwwxrwXupKrDawHiir/HPQcQCnZ/IVkZENd15y14nkQRzyADIXcZ27PYZa6Z6jaqQF5hFTo/LwdeC9k4G6Om5O/iFEMQ/roQ79UGwwopKu+11vJoSITAi/AlGGyUD5T4jxxotLXE1s6A8+9bJy2LWVcc4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=BuCYkm7O; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="BuCYkm7O" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1790270762; bh=/A6Hac4aqJzoz7kYkCtMzFY90tiyJ1AMuQj5SToK5yc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=BuCYkm7O8/c/A/J13rK2PGOkA5Kwrpsigb7+nckJWGhcX29RHlZlyjGebC2i+k1EX Cei7sEVKB3GM4PKix0HDbIIVXdmo8ikY2JEFVhl45pRU3YawsKgXP2Bvi4hWgQPJeM sWZD/OIzTyO1btKSxZ1GkT+DdYxdjeCWRtXEWDzGGW8Uce4sD8gn5Qkhutu0O2U7sZ suG9VttbfcFOTg5ux5O0VOUI6ify5kO7GwzVlYOAdqs3Uahfwbfk34UwuB8K3Og/Dl dGjgGZW/D0PNYCoLd0U8zgb0Wv6vW9jISb+26ZcOTANffSpdHqDqstM7agZp4Zo2OZ qWpSMV8XIs4vQ== Received: from jupiter.universe (unknown [100.64.1.62]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by bali.collaboradmins.com (Postfix) with ESMTPSA id EC6F817E0A66; Thu, 24 Sep 2026 19:26:01 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id 99EF3480029; Thu, 24 Sep 2026 19:26:01 +0200 (CEST) From: Sebastian Reichel Date: Thu, 24 Sep 2026 19:25:37 +0200 Subject: [PATCH v16 1/6] phy: core: add notifier infrastructure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-b4-rockchip-dwc3-rockchip-glue-v16-1-126a2e9133c3@collabora.com> References: <20260924-b4-rockchip-dwc3-rockchip-glue-v16-0-126a2e9133c3@collabora.com> In-Reply-To: <20260924-b4-rockchip-dwc3-rockchip-glue-v16-0-126a2e9133c3@collabora.com> To: Thinh Nguyen , Greg Kroah-Hartman , Heiko Stuebner , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam Cc: Igor Paunovic , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-phy@lists.infradead.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=6271; i=sebastian.reichel@collabora.com; h=from:subject:message-id; bh=/A6Hac4aqJzoz7kYkCtMzFY90tiyJ1AMuQj5SToK5yc=; b=owJ4nAFtApL9kA0DAAoB2O7X88g7+poByyZiAGq1XSkD8XXguWddTowlX8GYiiDtMyHhuu2Ly w37jmTNK/iOQokCMwQAAQoAHRYhBO9mDQdGP4tyanlUE9ju1/PIO/qaBQJqtV0pAAoJENju1/PI O/qaz0EP/32KTqSMkJHSkirR/he9URPBF/sEzsZ/6xrE6X8d/gu2ks3u2cJ4cxEgZIsvegGeSFv nuyqXDvZF4pLQCj8R/4lT/+m2UY/gK4Hw8XBwgbAxnNQGWjg+qJU8fhridUuYwlQg0Z8wgiTuqU c3gQ1YLXEa/wceukRYmY/zT8xSXG5+vO2Sg0YXRnfw4tovUNFVjFFLBRAmLqh4mh/4Ql2doyV/x rq8PctNNcxH1B700QSb/SvFANcSR/GFn41pKt0b40dG24nL0AL2ztMFjekcuQmDGJQlCCQC4nyy jivFAaZbR4yVc6dDW482RaRa+TiyZkJDT3zhFgKm1FnNmSWW6F9Q0SPnry6JvjAZbKET7kI/FK/ vK8zAW2wA9WJ8rJWbvRSUUv85qf6sPzTpblxOdgQIsSw1VCLNaqlfi2lqmX2Wl2oQQvLl5SOIUO 326cAJiU2r6Lq7uApGfjnxXEkQRfQ/plPQwJ5n7u9QQopMMCfxOBhoDAleJVAok8FuTia+dI+2g 0nrXpAo5tdBfkzD0I6PXBCeTDemNqK83OdH+SbwDtvcTXjXzaN5wAwXHN48BtVBJNTNguxyczvc TuKs4mjECZHiwrs6iaboycFcHWpMfZc7q7FnIq73VywxpwxnHpbpx44TVH84zO2Lpx7MeEJpiqJ WD2JyVbi13d1n1xsbTp4riA== X-Developer-Key: i=sebastian.reichel@collabora.com; a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Some PHY devices with multiple ports (e.g. USB3 and DP) require a reset if the configuration changes or cable orientation changes. This is a problem, as the consumer device will run into undefined behavior. With the new PHY notifier API introduced in this patch, the consumer driver can hook into reset events coming from a PHY device to handle the PHY going down gracefully. Note that this uses -ENOSYS instead of the more sensible -ENOTSUP for the stub functions when GENERIC_PHY is disabled to stay consistent with the existing ones. Tested-by: Igor Paunovic # Orange Pi 5 Plus Signed-off-by: Sebastian Reichel --- drivers/phy/phy-core.c | 65 +++++++++++++++++++++++++++++++++++++++++++++= ++++ include/linux/phy/phy.h | 40 ++++++++++++++++++++++++++++++ 2 files changed, 105 insertions(+) diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c index 21aaf2f76e53..51d261daae7a 100644 --- a/drivers/phy/phy-core.c +++ b/drivers/phy/phy-core.c @@ -542,6 +542,70 @@ int phy_notify_state(struct phy *phy, union phy_notify= state) } EXPORT_SYMBOL_GPL(phy_notify_state); =20 +/** + * phy_register_notifier() - register a notifier for PHY events + * @phy: the phy returned by phy_get() + * @nb: notifier block to register + * + * Allows PHY consumers to receive notifications about PHY reset events. + * PHY providers can signal these events using phy_notify_reset(). + * + * Returns: %0 if successful, a negative error code otherwise + */ +int phy_register_notifier(struct phy *phy, struct notifier_block *nb) +{ + if (!phy) + return 0; + + return blocking_notifier_chain_register(&phy->notifier, nb); +} +EXPORT_SYMBOL_GPL(phy_register_notifier); + +/** + * phy_unregister_notifier() - unregister a notifier for PHY events + * @phy: the phy returned by phy_get() + * @nb: notifier block to unregister + * + * Returns: %0 if successful, a negative error code otherwise + */ +int phy_unregister_notifier(struct phy *phy, struct notifier_block *nb) +{ + if (!phy) + return 0; + + return blocking_notifier_chain_unregister(&phy->notifier, nb); +} +EXPORT_SYMBOL_GPL(phy_unregister_notifier); + +/** + * phy_notify_reset() - notify consumers of a PHY reset event + * @phy: the phy that is being reset + * @event: the notification event (PRE_RESET or POST_RESET) + * + * Called by PHY providers to notify consumers that the PHY is about to + * be reset or has completed a reset. This allows consumers to quiesce + * hardware before the PHY becomes unavailable. + * + * This may be called from within PHY provider callbacks (e.g. set_mode, + * power_on) where phy->mutex is held. Consumer notification handlers must + * therefore NOT call back into the PHY framework (e.g. phy_power_off, + * phy_exit) on the same PHY, as this would result in a deadlock. + * + * Returns: %0 if successful or no notifiers registered, a negative error + * code if a notifier returns an error (for PRE_RESET only) + */ +int phy_notify_reset(struct phy *phy, enum phy_notification event) +{ + int ret; + + if (!phy) + return 0; + + ret =3D blocking_notifier_call_chain(&phy->notifier, event, phy); + return notifier_to_errno(ret); +} +EXPORT_SYMBOL_GPL(phy_notify_reset); + /** * phy_configure() - Changes the phy parameters * @phy: the phy returned by phy_get() @@ -1018,6 +1082,7 @@ struct phy *phy_create(struct device *dev, struct dev= ice_node *node, device_initialize(&phy->dev); lockdep_register_key(&phy->lockdep_key); mutex_init_with_key(&phy->mutex, &phy->lockdep_key); + BLOCKING_INIT_NOTIFIER_HEAD(&phy->notifier); =20 phy->dev.class =3D &phy_class; phy->dev.parent =3D dev; diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index ea47975e288a..3779a4d0a02c 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -11,6 +11,7 @@ #define __DRIVERS_PHY_H =20 #include +#include #include #include #include @@ -53,6 +54,16 @@ enum phy_media { PHY_MEDIA_DAC, }; =20 +/** + * enum phy_notification - PHY notification events + * @PHY_NOTIFY_PRE_RESET: PHY is about to be reset, consumers should quies= ce + * @PHY_NOTIFY_POST_RESET: PHY reset is complete, consumers may resume + */ +enum phy_notification { + PHY_NOTIFY_PRE_RESET, + PHY_NOTIFY_POST_RESET, +}; + enum phy_ufs_state { PHY_UFS_HIBERN8_ENTER, PHY_UFS_HIBERN8_EXIT, @@ -170,6 +181,7 @@ struct phy_attrs { * @power_count: used to protect when the PHY is used by multiple consumers * @attrs: used to specify PHY specific attributes * @pwr: power regulator associated with the phy + * @notifier: notifier head for PHY reset events * @debugfs: debugfs directory */ struct phy { @@ -182,6 +194,7 @@ struct phy { int power_count; struct phy_attrs attrs; struct regulator *pwr; + struct blocking_notifier_head notifier; struct dentry *debugfs; }; =20 @@ -267,6 +280,9 @@ int phy_calibrate(struct phy *phy); int phy_notify_connect(struct phy *phy, int port); int phy_notify_disconnect(struct phy *phy, int port); int phy_notify_state(struct phy *phy, union phy_notify state); +int phy_register_notifier(struct phy *phy, struct notifier_block *nb); +int phy_unregister_notifier(struct phy *phy, struct notifier_block *nb); +int phy_notify_reset(struct phy *phy, enum phy_notification event); static inline int phy_get_bus_width(struct phy *phy) { return phy->attrs.bus_width; @@ -428,6 +444,30 @@ static inline int phy_notify_state(struct phy *phy, un= ion phy_notify state) return -ENOSYS; } =20 +static inline int phy_register_notifier(struct phy *phy, + struct notifier_block *nb) +{ + if (!phy) + return 0; + return -ENOSYS; +} + +static inline int phy_unregister_notifier(struct phy *phy, + struct notifier_block *nb) +{ + if (!phy) + return 0; + return -ENOSYS; +} + +static inline int phy_notify_reset(struct phy *phy, + enum phy_notification event) +{ + if (!phy) + return 0; + return -ENOSYS; +} + static inline int phy_configure(struct phy *phy, union phy_configure_opts *opts) { --=20 2.53.0 From nobody Fri Sep 25 07:23:46 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BE154137AE; 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Thu, 24 Sep 2026 19:26:01 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id 9AB9D48002F; Thu, 24 Sep 2026 19:26:01 +0200 (CEST) From: Sebastian Reichel Date: Thu, 24 Sep 2026 19:25:38 +0200 Subject: [PATCH v16 2/6] usb: dwc3: rockchip: introduce glue driver Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-b4-rockchip-dwc3-rockchip-glue-v16-2-126a2e9133c3@collabora.com> References: <20260924-b4-rockchip-dwc3-rockchip-glue-v16-0-126a2e9133c3@collabora.com> In-Reply-To: <20260924-b4-rockchip-dwc3-rockchip-glue-v16-0-126a2e9133c3@collabora.com> To: Thinh Nguyen , Greg Kroah-Hartman , Heiko Stuebner , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam Cc: Igor Paunovic , linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-phy@lists.infradead.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Introduce Rockchip specific glue code for the Synopsys DWC3 USB driver. For now this handles things identical to the default glue. Tested-by: Igor Paunovic # Orange Pi 5 Plus Signed-off-by: Sebastian Reichel --- drivers/usb/dwc3/Kconfig | 11 ++++ drivers/usb/dwc3/Makefile | 1 + drivers/usb/dwc3/core.c | 15 ++++++ drivers/usb/dwc3/dwc3-rockchip.c | 106 +++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 133 insertions(+) diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 18169727a413..3c120ea9746d 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -190,6 +190,17 @@ config USB_DWC3_OCTEON Only the host mode is currently supported. Say 'Y' or 'M' here if you have one such device. =20 +config USB_DWC3_ROCKCHIP + tristate "Rockchip DWC3 Platform Driver" + depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on OF + default USB_DWC3 + help + Rockchip SoCs with DesignWare Core USB3 IP inside, + and IP Core configured for USB 2.0 and USB 3.0 in host + or dual-role mode. + Say 'Y' or 'M' if you have such device. + config USB_DWC3_RTK tristate "Realtek DWC3 Platform Driver" depends on OF && ARCH_REALTEK diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index f37971197203..444e7e7f34b2 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -58,6 +58,7 @@ obj-$(CONFIG_USB_DWC3_IMX8MP) +=3D dwc3-imx8mp.o obj-$(CONFIG_USB_DWC3_IMX) +=3D dwc3-imx.o obj-$(CONFIG_USB_DWC3_XILINX) +=3D dwc3-xilinx.o obj-$(CONFIG_USB_DWC3_OCTEON) +=3D dwc3-octeon.o +obj-$(CONFIG_USB_DWC3_ROCKCHIP) +=3D dwc3-rockchip.o obj-$(CONFIG_USB_DWC3_RTK) +=3D dwc3-rtk.o obj-$(CONFIG_USB_DWC3_GENERIC_PLAT) +=3D dwc3-generic-plat.o obj-$(CONFIG_USB_DWC3_GOOGLE) +=3D dwc3-google.o diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index fd5c2cd36c59..4b7132887a03 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -2448,11 +2448,26 @@ int dwc3_core_probe(const struct dwc3_probe_data *d= ata) } EXPORT_SYMBOL_GPL(dwc3_core_probe); =20 +/* + * List of compatibles, which have "synopsys,dwc3" as a fallback + * compatible, but have a vendor specific glue driver that should + * be used instead of this one. + */ +static const char *const dwc3_compatible_blocklist[] =3D { + "rockchip,rk3588-dwc3", + "rockchip,rk3576-dwc3", +}; + static int dwc3_probe(struct platform_device *pdev) { struct dwc3_probe_data probe_data =3D {}; struct resource *res; struct dwc3 *dwc; + int i; + + for (i =3D 0; i < ARRAY_SIZE(dwc3_compatible_blocklist); i++) + if (device_is_compatible(&pdev->dev, dwc3_compatible_blocklist[i])) + return -ENODEV; =20 res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { diff --git a/drivers/usb/dwc3/dwc3-rockchip.c b/drivers/usb/dwc3/dwc3-rockc= hip.c new file mode 100644 index 000000000000..4129aefd6a8b --- /dev/null +++ b/drivers/usb/dwc3/dwc3-rockchip.c @@ -0,0 +1,106 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (c) 2026, Collabora Ltd. */ +#include +#include +#include +#include "glue.h" + +struct dwc3_rockchip { + struct dwc3 dwc; +}; + +static int dwc3_rockchip_probe(struct platform_device *pdev) +{ + struct dwc3_probe_data probe_data =3D {}; + struct resource *res; + struct dwc3_rockchip *dwc_rk; + + res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "missing memory resource\n"); + return -ENODEV; + } + + dwc_rk =3D devm_kzalloc(&pdev->dev, sizeof(*dwc_rk), GFP_KERNEL); + if (!dwc_rk) + return -ENOMEM; + + dwc_rk->dwc.dev =3D &pdev->dev; + dwc_rk->dwc.glue_ops =3D NULL; + + probe_data.dwc =3D &dwc_rk->dwc; + probe_data.res =3D res; + probe_data.properties =3D DWC3_DEFAULT_PROPERTIES; + + return dwc3_core_probe(&probe_data); +} + +static void dwc3_rockchip_remove(struct platform_device *pdev) +{ + dwc3_core_remove(platform_get_drvdata(pdev)); +} + +static int dwc3_rockchip_runtime_suspend(struct device *dev) +{ + return dwc3_runtime_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_rockchip_runtime_resume(struct device *dev) +{ + return dwc3_runtime_resume(dev_get_drvdata(dev)); +} + +static int dwc3_rockchip_runtime_idle(struct device *dev) +{ + return dwc3_runtime_idle(dev_get_drvdata(dev)); +} + +static int dwc3_rockchip_suspend(struct device *dev) +{ + return dwc3_pm_suspend(dev_get_drvdata(dev)); +} + +static int dwc3_rockchip_resume(struct device *dev) +{ + return dwc3_pm_resume(dev_get_drvdata(dev)); +} + +static void dwc3_rockchip_complete(struct device *dev) +{ + dwc3_pm_complete(dev_get_drvdata(dev)); +} + +static int dwc3_rockchip_prepare(struct device *dev) +{ + return dwc3_pm_prepare(dev_get_drvdata(dev)); +} + +static const struct dev_pm_ops dwc3_rockchip_dev_pm_ops =3D { + SYSTEM_SLEEP_PM_OPS(dwc3_rockchip_suspend, dwc3_rockchip_resume) + RUNTIME_PM_OPS(dwc3_rockchip_runtime_suspend, dwc3_rockchip_runtime_resum= e, + dwc3_rockchip_runtime_idle) + .complete =3D pm_sleep_ptr(dwc3_rockchip_complete), + .prepare =3D pm_sleep_ptr(dwc3_rockchip_prepare), +}; + +static const struct of_device_id dwc3_rockchip_of_match[] =3D { + { .compatible =3D "rockchip,rk3588-dwc3" }, + { .compatible =3D "rockchip,rk3576-dwc3" }, + { } +}; +MODULE_DEVICE_TABLE(of, dwc3_rockchip_of_match); + +static struct platform_driver dwc3_rockchip_driver =3D { + .probe =3D dwc3_rockchip_probe, + .remove =3D dwc3_rockchip_remove, + .driver =3D { + .name =3D "dwc3-rockchip", + .pm =3D pm_ptr(&dwc3_rockchip_dev_pm_ops), + .of_match_table =3D dwc3_rockchip_of_match, + }, +}; + +module_platform_driver(dwc3_rockchip_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("DesignWare DWC3 Rockchip Glue Driver"); --=20 2.53.0 From nobody Fri Sep 25 07:23:46 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BC66392822; Thu, 24 Sep 2026 17:26:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790270765; cv=none; b=KcgRKqGlLDtL4CToZhEgqrU/q9azdwMCi35zDfJ6ENqqD4IteIZaB+0CUazrrYdU8PILeFnu971C5+9mNw8mreVcSXZsrRehZlpTlqm6PS9i05cKlb7/hZGw5sq/rGq7FFyufxuNNqor3iJ/Q9s5Dh2LS18tKt/nyeYG2l6HGDc= ARC-Message-Signature: i=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Add support for custom PHY handling steps in platform glue code by adding a post registration hook. This will be used for handling PHY reset notifications on the Rockchip platform. Tested-by: Igor Paunovic # Orange Pi 5 Plus Acked-by: Thinh Nguyen Reviewed-by: Krishna Kurapati Signed-off-by: Sebastian Reichel --- drivers/usb/dwc3/core.c | 2 +- drivers/usb/dwc3/core.h | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 4b7132887a03..daf5aec07fbf 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1613,7 +1613,7 @@ static int dwc3_core_get_phy(struct dwc3 *dwc) } } =20 - return 0; + return dwc3_post_phy_registration(dwc); } =20 static int dwc3_core_init_mode(struct dwc3 *dwc) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 608daeb7ef10..e9d8df0a298e 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -995,10 +995,12 @@ struct dwc3_scratchpad_array { * need to be passed on to glue layer * @pre_set_role: Notify glue of role switch notifications * @pre_run_stop: Notify run stop enable/disable information to glue + * @post_phy_registration: Called directly after PHY got registered */ struct dwc3_glue_ops { void (*pre_set_role)(struct dwc3 *dwc, enum usb_role role); void (*pre_run_stop)(struct dwc3 *dwc, bool is_on); + int (*post_phy_registration)(struct dwc3 *dwc); }; =20 /** @@ -1655,6 +1657,13 @@ static inline void dwc3_pre_run_stop(struct dwc3 *dw= c, bool is_on) dwc->glue_ops->pre_run_stop(dwc, is_on); } =20 +static inline int dwc3_post_phy_registration(struct dwc3 *dwc) +{ + if (dwc->glue_ops && dwc->glue_ops->post_phy_registration) + return dwc->glue_ops->post_phy_registration(dwc); + return 0; +} + #if IS_ENABLED(CONFIG_USB_DWC3_HOST) || IS_ENABLED(CONFIG_USB_DWC3_DUAL_RO= LE) int dwc3_host_init(struct dwc3 *dwc); void dwc3_host_exit(struct dwc3 *dwc); --=20 2.53.0 From nobody Fri Sep 25 07:23:46 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2C01E415B76; Thu, 24 Sep 2026 17:26:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A On recent Rockchip platforms (at least RK3588 & RK3576), DWC3 IP is used with a USBDP PHY providing USB3 and DP. This PHY needs to be reset when the mode changes, which may happen when plugging in different USB-C devices. If the USBDP PHY resets with the DWC3 IP running, its internal state corrupts resulting in the USBDP PHY not being able to lock some PLL clocks, which effectively renders USB3 unusable. To fix the issue this adds handling for the new PHY framework reset notifications, which will assert PHYSOFTRST before the actual PHY is disabled and will deassert it once the PHY returns. Tested-by: Igor Paunovic # Orange Pi 5 Plus Acked-by: Thinh Nguyen Signed-off-by: Sebastian Reichel --- drivers/usb/dwc3/dwc3-rockchip.c | 127 +++++++++++++++++++++++++++++++++++= +++- drivers/usb/dwc3/trace.c | 3 + 2 files changed, 129 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/dwc3-rockchip.c b/drivers/usb/dwc3/dwc3-rockc= hip.c index 4129aefd6a8b..17b6c2ca9e19 100644 --- a/drivers/usb/dwc3/dwc3-rockchip.c +++ b/drivers/usb/dwc3/dwc3-rockchip.c @@ -2,11 +2,136 @@ /* Copyright (c) 2026, Collabora Ltd. */ #include #include +#include #include #include "glue.h" +#include "io.h" + +struct dwc3_rockchip; + +/** + * struct dwc3_rk_phy_nb - wrapper for PHY notifier block + * @nb: notifier block + * @dwc: back-pointer to the DWC3 controller + * @port_index: USB3 port index this notifier is registered for + */ +struct dwc3_rk_phy_nb { + struct notifier_block nb; + struct dwc3_rockchip *dwc_rk; + u8 port_index; +}; =20 struct dwc3_rockchip { struct dwc3 dwc; + struct dwc3_rk_phy_nb usb3_phy_nb[DWC3_USB3_MAX_PORTS]; + u8 phy_reset_active; +}; + +static int dwc3_usb3_phy_notify(struct notifier_block *nb, + unsigned long action, void *data) +{ + struct dwc3_rk_phy_nb *pnb =3D container_of(nb, struct dwc3_rk_phy_nb, nb= ); + struct dwc3_rockchip *dwc_rk =3D pnb->dwc_rk; + struct dwc3 *dwc =3D &dwc_rk->dwc; + int port =3D pnb->port_index; + unsigned long flags; + u32 reg; + int ret; + + switch (action) { + case PHY_NOTIFY_PRE_RESET: + /* + * If already suspended, the resume path will reinit GUSB3PIPECTL + * via dwc3_core_init(). A forced resume is not possible as that + * would call phy_init() resulting in a deadlock. Due to the + * phy_init() in the resume path there is also no need to block + * async RPM resume on our side, since the PHY synchronizes it + * for us. + * + * pm_runtime_get_if_active() returns 0 when suspended (skip), + * 1 when active (ref held), or -EINVAL when PM is disabled + * (device always active). In the -EINVAL case PM ref counting + * is a no-op, so the unconditional put in POST_RESET is safe. + */ + ret =3D pm_runtime_get_if_active(dwc->dev); + if (!ret) + return NOTIFY_OK; + + /* + * Assert USB3 PHY soft reset within DWC3 before the external + * PHY resets. This disconnects the PIPE interface, preventing + * the DWC3 from interfering with PHY reinitialization and + * avoiding LCPLL lock failures. + */ + spin_lock_irqsave(&dwc->lock, flags); + dwc_rk->phy_reset_active |=3D BIT(port); + reg =3D dwc3_readl(dwc, DWC3_GUSB3PIPECTL(port)); + reg |=3D DWC3_GUSB3PIPECTL_PHYSOFTRST; + dwc3_writel(dwc, DWC3_GUSB3PIPECTL(port), reg); + spin_unlock_irqrestore(&dwc->lock, flags); + break; + + case PHY_NOTIFY_POST_RESET: + spin_lock_irqsave(&dwc->lock, flags); + if (!(dwc_rk->phy_reset_active & BIT(port))) { + spin_unlock_irqrestore(&dwc->lock, flags); + return NOTIFY_OK; + } + + dwc_rk->phy_reset_active &=3D ~BIT(port); + + /* + * Deassert PHY soft reset to reconnect the PIPE interface + * after PHY reinitialization. + */ + reg =3D dwc3_readl(dwc, DWC3_GUSB3PIPECTL(port)); + reg &=3D ~DWC3_GUSB3PIPECTL_PHYSOFTRST; + dwc3_writel(dwc, DWC3_GUSB3PIPECTL(port), reg); + spin_unlock_irqrestore(&dwc->lock, flags); + + pm_runtime_put_autosuspend(dwc->dev); + break; + } + + return NOTIFY_OK; +} + +static void dwc3_rk_phy_unregister_notifiers(void *data) +{ + struct dwc3_rockchip *dwc_rk =3D data; + struct dwc3 *dwc =3D &dwc_rk->dwc; + int i; + + for (i =3D 0; i < dwc->num_usb3_ports; i++) + phy_unregister_notifier(dwc->usb3_generic_phy[i], + &dwc_rk->usb3_phy_nb[i].nb); + + /* Release any PM references from in-flight resets */ + for (i =3D 0; i < dwc->num_usb3_ports; i++) { + if (dwc_rk->phy_reset_active & BIT(i)) + pm_runtime_put_autosuspend(dwc->dev); + } + dwc_rk->phy_reset_active =3D 0; +} + +static int dwc3_rk_phy_register_notifiers(struct dwc3 *dwc) +{ + struct dwc3_rockchip *dwc_rk =3D container_of(dwc, struct dwc3_rockchip, = dwc); + int i; + + for (i =3D 0; i < dwc->num_usb3_ports; i++) { + dwc_rk->usb3_phy_nb[i].nb.notifier_call =3D dwc3_usb3_phy_notify; + dwc_rk->usb3_phy_nb[i].dwc_rk =3D dwc_rk; + dwc_rk->usb3_phy_nb[i].port_index =3D i; + phy_register_notifier(dwc->usb3_generic_phy[i], + &dwc_rk->usb3_phy_nb[i].nb); + } + + return devm_add_action_or_reset(dwc->dev, dwc3_rk_phy_unregister_notifier= s, dwc_rk); +} + +static struct dwc3_glue_ops dwc3_rockchip_glue_ops =3D { + .post_phy_registration =3D dwc3_rk_phy_register_notifiers, }; =20 static int dwc3_rockchip_probe(struct platform_device *pdev) @@ -26,7 +151,7 @@ static int dwc3_rockchip_probe(struct platform_device *p= dev) return -ENOMEM; =20 dwc_rk->dwc.dev =3D &pdev->dev; - dwc_rk->dwc.glue_ops =3D NULL; + dwc_rk->dwc.glue_ops =3D &dwc3_rockchip_glue_ops; =20 probe_data.dwc =3D &dwc_rk->dwc; probe_data.res =3D res; diff --git a/drivers/usb/dwc3/trace.c b/drivers/usb/dwc3/trace.c index 088995885678..8c4e2a7b142e 100644 --- a/drivers/usb/dwc3/trace.c +++ b/drivers/usb/dwc3/trace.c @@ -9,3 +9,6 @@ =20 #define CREATE_TRACE_POINTS #include "trace.h" + +EXPORT_TRACEPOINT_SYMBOL_GPL(dwc3_readl); +EXPORT_TRACEPOINT_SYMBOL_GPL(dwc3_writel); --=20 2.53.0 From nobody Fri Sep 25 07:23:46 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 871C14A64CC; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Platform drivers with optional gadget mode support may want to call usb_udc_vbus_handler to properly handle a cable being re-plugged. Ensure these drivers can call the function without a hard dependency on CONFIG_USB_GADGET or having the ifdef logic in the driver. Signed-off-by: Sebastian Reichel --- include/linux/usb/gadget.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/include/linux/usb/gadget.h b/include/linux/usb/gadget.h index 8285b19a25e0..551e71b6eda0 100644 --- a/include/linux/usb/gadget.h +++ b/include/linux/usb/gadget.h @@ -979,7 +979,12 @@ extern int usb_gadget_ep_match_desc(struct usb_gadget = *gadget, /*------------------------------------------------------------------------= -*/ =20 /* utility to update vbus status for udc core, it may be scheduled */ +#if IS_ENABLED(CONFIG_USB_GADGET) extern void usb_udc_vbus_handler(struct usb_gadget *gadget, bool status); +#else +static inline void usb_udc_vbus_handler(struct usb_gadget *gadget, bool st= atus) +{} +#endif =20 /*------------------------------------------------------------------------= -*/ =20 --=20 2.53.0 From nobody Fri Sep 25 07:23:46 2026 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8769B4A6CD2; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A When USB-C is configured in gadget mode and the cable is unplugged the USB controller is suspended. After plugging in the cable again, the USB controller stays suspended and thus the port status remains not-attached. Fix this by informing the USB core about VBUS updates when the PHY mode changes. Signed-off-by: Sebastian Reichel --- drivers/usb/dwc3/Kconfig | 1 + drivers/usb/dwc3/dwc3-rockchip.c | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 3c120ea9746d..344291daf1b2 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -193,6 +193,7 @@ config USB_DWC3_OCTEON config USB_DWC3_ROCKCHIP tristate "Rockchip DWC3 Platform Driver" depends on ARCH_ROCKCHIP || COMPILE_TEST + depends on USB_GADGET || !USB_GADGET # if USB_GADGET=3Dm, this can't be '= y' depends on OF default USB_DWC3 help diff --git a/drivers/usb/dwc3/dwc3-rockchip.c b/drivers/usb/dwc3/dwc3-rockc= hip.c index 17b6c2ca9e19..ba8ffef2f27e 100644 --- a/drivers/usb/dwc3/dwc3-rockchip.c +++ b/drivers/usb/dwc3/dwc3-rockchip.c @@ -25,8 +25,17 @@ struct dwc3_rockchip { struct dwc3 dwc; struct dwc3_rk_phy_nb usb3_phy_nb[DWC3_USB3_MAX_PORTS]; u8 phy_reset_active; + enum usb_role role; }; =20 +static void dwc3_rockchip_vbus_handler(struct dwc3 *dwc, bool present) +{ + if (!dwc->gadget || !dwc->gadget_driver) + return; + + usb_udc_vbus_handler(dwc->gadget, present); +} + static int dwc3_usb3_phy_notify(struct notifier_block *nb, unsigned long action, void *data) { @@ -57,6 +66,8 @@ static int dwc3_usb3_phy_notify(struct notifier_block *nb, if (!ret) return NOTIFY_OK; =20 + dwc3_rockchip_vbus_handler(dwc, false); + /* * Assert USB3 PHY soft reset within DWC3 before the external * PHY resets. This disconnects the PIPE interface, preventing @@ -69,6 +80,7 @@ static int dwc3_usb3_phy_notify(struct notifier_block *nb, reg |=3D DWC3_GUSB3PIPECTL_PHYSOFTRST; dwc3_writel(dwc, DWC3_GUSB3PIPECTL(port), reg); spin_unlock_irqrestore(&dwc->lock, flags); + break; =20 case PHY_NOTIFY_POST_RESET: @@ -89,6 +101,8 @@ static int dwc3_usb3_phy_notify(struct notifier_block *n= b, dwc3_writel(dwc, DWC3_GUSB3PIPECTL(port), reg); spin_unlock_irqrestore(&dwc->lock, flags); =20 + dwc3_rockchip_vbus_handler(dwc, dwc_rk->role =3D=3D USB_ROLE_DEVICE); + pm_runtime_put_autosuspend(dwc->dev); break; } @@ -130,7 +144,16 @@ static int dwc3_rk_phy_register_notifiers(struct dwc3 = *dwc) return devm_add_action_or_reset(dwc->dev, dwc3_rk_phy_unregister_notifier= s, dwc_rk); } =20 +static void dwc3_rockchip_set_role(struct dwc3 *dwc, enum usb_role role) +{ + struct dwc3_rockchip *dwc_rk =3D container_of(dwc, struct dwc3_rockchip, = dwc); + + dwc_rk->role =3D role; + dwc3_rockchip_vbus_handler(dwc, role =3D=3D USB_ROLE_DEVICE); +} + static struct dwc3_glue_ops dwc3_rockchip_glue_ops =3D { + .pre_set_role =3D dwc3_rockchip_set_role, .post_phy_registration =3D dwc3_rk_phy_register_notifiers, }; =20 --=20 2.53.0