From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAFDE2749C1; Thu, 24 Sep 2026 14:17:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259438; cv=none; b=gOtAB8HMVXmFGeMwbPvx8+WaZEmvaBr5A+FUQvdcjXH6hzaat0PbRRM78gIbYdFvYmTYDVrJ/zbAuysx63of+myxOMCTfWx6puMOyVyOZ0DvrYjdgq1Ky/7+hvV6KwYCstjZSNH3s6KEalz+uofjCtNCN8G6HCR6FfvStHlwJYE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259438; c=relaxed/simple; bh=IdOJLA73Cf6tiU+JKWKZdEv0XqkU6UkmQAdXKUD5Q38=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hjYncnzqnUdy3F9VpkIghn3tl/D9lq2mILZA6mwM4w7+cy3bHhaOxF9kJkI/CZTeRcBXzCFvxagcHqQkYxftv78ArYbSfPgvxyUCnwn7oxQakNvcgp4Sy1SExG+AQBaYnTmapmPsoTqzMm1vbStIdoXT66NsN9l9yeySDgG+3B0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=GvkYb3S9; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="GvkYb3S9" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259434; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xRh1SLhMiStwGt9nJg+3zWmBJZsQViVNXNAHf567sjs=; b=GvkYb3S9x1UnUbSL+yWMS2rR+8qmEmNamA+3YGLoAvtgk+E+kQVudqsKuAQytzY0IFBdht HQIGkYfjhOXMlH1N+DUYfKUMndw4y74nS1F8SOqdFHHa7iTrg4AiBDLwLo+xzEpkLmcjoC 8bHg8LUi3YmrCGj6MZ2l8rZw6OgR1Ug= Date: Thu, 24 Sep 2026 16:17:05 +0200 Subject: [PATCH v3 1/7] dt-bindings: arm: cpus: Add Apple A18 Pro CPU core compatibles Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-1-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian , Krzysztof Kozlowski Add "apple,tahiti-e" and "apple,tahiti-p" compatibles for the A18 Pro efficiency and performance CPU cores respectively. As with the M4 cores, there is no longer a generational codename, so we assign the core compatible based on SoC codename ("Tahiti") plus core type (E-Core / P-Core). Acked-by: Krzysztof Kozlowski Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentatio= n/devicetree/bindings/arm/cpus.yaml index c328e9fb9843..5d79da63301b 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -95,6 +95,8 @@ properties: - apple,mistral - apple,monsoon - apple,sawtooth + - apple,tahiti-e + - apple,tahiti-p - apple,twister - apple,typhoon - arm,arm710t --=20 2.55.0 From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CA0D3890FB; Thu, 24 Sep 2026 14:17:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259440; cv=none; b=Wl1lwItJujuEEoj5mCU6T4XIu5Rh53sv74oj5N/UdO2DXdWOdh8MfwZOMLueLLdIpkSWImFHngv86TBo78UzeOnWlog3JkUYcjvWIx16LViyzuNs/RbWs9GDIE1rS+Z1Db1bJHuigI3Fa5UmWfuOO/yWuvB/8T+yI3JrnxcZufI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259440; c=relaxed/simple; bh=wjBH+AH/mni+lelLioavbWYQx7KLKMYD9qTbt1OA4UM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=R9bqMPo9lYXkhBBrTqJhQ8K2DT6Ek3ng8h+Y/+4Kl76sspJeAmk54pPPhl96VdsuaN03DM1VTZv2JAsNMn7igzeAcYazzXqFk/cNdRZWwYpJ4G373k0W5XerABPQuo6ny8POOCjwakJ6nswpquB9cACFV1anZRMYsDrjXzyS2Nc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=do0zKt7B; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="do0zKt7B" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259436; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pG1UBaGa+qsk9ngBIUiT7RRImk47b7p+y6j0ZwKUTs8=; b=do0zKt7BbBzMSFriVf/eFVRLZi2OY5xX8/rPl0CJ3nJ2VmLTzy/P4/2nSsswyX2m0cXDl0 w2ZRDiFwTfeUFsiRsgIdPKIp3OQVZi5Wxwu5nKHu+wQCOG7X4pqyc3tPJBNljOziVJLvBx htpO7btdx0nNTCbIucz9UUmBbl3ymaw= Date: Thu, 24 Sep 2026 16:17:06 +0200 Subject: [PATCH v3 2/7] dt-bindings: arm: apple: apple,pmgr: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-2-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The PMGR blocks on the Apple silicon A18 Pro SoC (t8140) is compatible with the M1-M4 SoCs. Add "apple,t8140-pmgr" as A18 Pro specific compatible. Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml b/= Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml index da660fa13f77..bf21a5b3a4ac 100644 --- a/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml +++ b/Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml @@ -42,6 +42,7 @@ properties: - apple,t6031-pmgr - apple,t8122-pmgr - apple,t8132-pmgr + - apple,t8140-pmgr - const: apple,t8103-pmgr - const: syscon - const: simple-mfd --=20 2.55.0 From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53B8E381EBE; Thu, 24 Sep 2026 14:17:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259441; cv=none; b=OpWw3dzDG+8144xUce5VYgXNZxysO8JRFFXB1Vctzo+Ct/DCvdK4qMi5ukiFA1GLNLqVDswCXvIzOH0YJs4SuUZK640J516JL4JcmffMpG7hE3em9zVPce9IiNb/9VoiXJN0PnCdBH1FN7dJZEqnZF4PeCvpx+BfAuB7mzULbUA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259441; c=relaxed/simple; bh=HSU5AfF1qGiGG1gi4F92u8oOwoBb+vt88HrQCDKa9mY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KMXhOsOhcco7XbNscXtoippuAQl9gxaHe/MfEF7Sg/Y3emGxB68VcaK8auXHEdPIExetw35qIKLIDFdOTCpe/yIcHjK8xAk5/6OYUjjmhPsyggi3iW92ddI0B+b4fjbHCPMKT0wtvwUBT3aTw/KqebB1CSTgu3RmSrsN3O7FXCM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=jJp8k9j2; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="jJp8k9j2" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259437; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=8WP38J7bBnqQj5OATRhOihbiLBkhVZTvCrt1WmCFA9g=; b=jJp8k9j2rdSBzYfQpJZs21qFtzyKMGaJ0N7CFRDjfefStrMG6l8+cps/FKLT4k/ixQKNhV JQSSH4mQScKCeoZOoTM6e4DShdARWtQM5NYjjJ2vdBaOLSPotxNpEcLyG5Nz5XzqlcfPZq lw2xmqAsuoI9hT8N9wmQ8ridcIHhLUM= Date: Thu, 24 Sep 2026 16:17:07 +0200 Subject: [PATCH v3 3/7] dt-bindings: arm: power: apple,pmgr-pwrstate: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-3-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The device power state management of the PMGR blocks on the Apple silicon A18 Pro SoC (t8140) is compatible with the M1-M4 SoCs. Add "apple,t8140-pmgr-pwrstate" as A18 Pro specific compatible. Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.ya= ml b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml index b24ea8e54e11..dcffdd12c8c7 100644 --- a/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml +++ b/Documentation/devicetree/bindings/power/apple,pmgr-pwrstate.yaml @@ -49,6 +49,7 @@ properties: - apple,t6031-pmgr-pwrstate - apple,t8122-pmgr-pwrstate - apple,t8132-pmgr-pwrstate + - apple,t8140-pmgr-pwrstate - const: apple,t8103-pmgr-pwrstate =20 reg: --=20 2.55.0 From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 91128392822; Thu, 24 Sep 2026 14:17:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259442; cv=none; b=GQLD7e45+JdvPOfKxHp4lDKFKecxGE1eLu/VroVeAumCGBPtfn9WnV0gMWnSqHBcMQnyddBQGdYZdLuMXiDkvIJDdKRdHJZybfgGjohdJ4BUuYVg0MM1u06nuzORc/mN5ZFz65Jc8eS+aLuZ3Hg1Py2g9LGzUVzUWwbZ+TF7eZA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259442; c=relaxed/simple; bh=4k4MJQl03wt/QLivy1TlsfH4lG9cFtpR4TkLllI/mvw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JUnnJC4q50o30jSv2QRfFmQT/2+sv5dmZ5qWhq63MUvSjwO6RTs76zXn7m3zVYTsSbgiCf0wwQbUp05gFh6AK9vIncXuba2FnGq723ijMAwUiKm1P5vfTCqiaOQw4DvWzjcsR12wlteAtOluwE68sojfQ4hh/2hEU/19Caht384= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=Z+mHx8zP; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="Z+mHx8zP" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259438; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DPKwn+CHq5321wH/poteHbXrE1YPS9EjXQyhzbnXKzg=; b=Z+mHx8zPTurc4a2hHEY0N7VVomaQA3sobCOUL4t03BTa8ngYY3NC7iuv6Iv1zE01kVVw3v sTU+cnyMCpmLZvLN8AbhjOCxwOwi6Kp/LbZ6RwqR0fiHmsMkytd80Y2noifh1edmdZY26x 0mHw6pqfHBcuisDk4tsBu85qcwx3tEQ= Date: Thu, 24 Sep 2026 16:17:08 +0200 Subject: [PATCH v3 4/7] dt-bindings: interrupt-controller: apple,aic2: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-4-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The Apple t8140 (A18 Pro) SoC uses an AIC3 as interrupt controller, same as the M3-M4 SoCs. Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml | 1= + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,a= ic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic= 2.yaml index 1cb886785173..e3cadc5ad39d 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -46,6 +46,7 @@ properties: - apple,t6030-aic3 - apple,t6031-aic3 - apple,t8132-aic3 + - apple,t8140-aic3 - const: apple,t8122-aic3 - const: apple,t8122-aic3 =20 --=20 2.55.0 From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F07323955F9; Thu, 24 Sep 2026 14:17:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259443; cv=none; b=mfZUxf+hlF5GRBsecRb/wlj5pT8bcfQw9bAUgKCuLDfYoJtEARxJ4Ho7g7cepZqURFn2LgL5On2Psiu6U24aSs3JJTPW6qG1efBkaw+DuKSPuKJ3dVEWTXWhif3obvvjncMoLgQvxg1JL4oIEwkdMH+DXDGWnUvzM+49mn4rC2s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259443; c=relaxed/simple; bh=EN42ADlzAnxR2iZ8PZSyc0krxLlAUY+AF84DX1vxH2c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=H9LKgLoGF52AIxuMYcnp8iktUNRXFpQrQZHjhndXCycfD8GLYFiq12G+T6Dtl3r8Tps/XSW9yHP2kP28SMZgADFcY0gdwO839O+7v0lo12hxalhwTi6cSTP1hDIWNzx8z8jocR4ghmzUHaJptIvCZdLRDs0xM6GN0WV4y3G+UA8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=dwZFwXSj; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="dwZFwXSj" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259440; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=9gCuftN+XWPYlU01ueRBmJ4HFQ5xYw0hLT+h7rJW6g0=; b=dwZFwXSjfIkVxGdVDYvk+gVRYIOfMfKmMi+CXgq8uSh7y5XeowksoK9z1EOLwMTrYFI560 qRtaRpx8yDM6IVJnrIQOR53RMeuF8UmII65/wWFOC3w68v/uLAh/GA8HeI4IpE0COpOtQj iFSzAC9gBdXhSdHbkMyM8LqRwBVZpY8= Date: Thu, 24 Sep 2026 16:17:09 +0200 Subject: [PATCH v3 5/7] dt-bindings: watchdog: apple,wdt: Add t8140 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-5-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The watchdog on the Apple t8140 (A18 Pro) SoC is compatible with the M1-M4 SoCs. Add "apple,t8140-wdt" as SoC specific compatible. Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/watchdog/apple,wdt.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml b/Do= cumentation/devicetree/bindings/watchdog/apple,wdt.yaml index ca4cf01db59f..1af924157f7c 100644 --- a/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/apple,wdt.yaml @@ -22,6 +22,7 @@ properties: - apple,t6031-wdt - apple,t8122-wdt - apple,t8132-wdt + - apple,t8140-wdt - const: apple,t8103-wdt - items: - enum: --=20 2.55.0 From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86ABD39A7F4; Thu, 24 Sep 2026 14:17:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259445; cv=none; b=KEzw+so6gYLehjYNq7mWbdKx7eaeOGm1myaX8Kzwrmz181jN5INVJSBEtiFoIUUiXyDI/a2IpsIaPcPMlfIksqoW3YIt/EHXRveCXiFbv62OjwTPzDcKTf/8Uv26rwxfr0VT5u6MsQ/6soDQK+shTjzqWwEG4J3FMaoGkrKffyo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259445; c=relaxed/simple; bh=H/POx7Wr/7K5KCoCcuDRbIScU2n4j22o9W8L9XzXnZ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LRaLa3wf+nnuGjMW8Yc0RwT3rkQJr5sp1UaC5vi+MY2JyRkq9Szo28RRzYdiAqMiX+Nuu7qULpHLjlv/ZxEP+cJ1E7euevuKvrghlJUYJzfEr6Mb/L9ot+kwjAUDboa4q5E7x8IDy9rJu4yFveCAdFVCgb+U/xQe3UlAeRVvRgQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=EDwEaAJh; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="EDwEaAJh" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259441; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=XeqnfkBwbS9FJAo4v2yybtoxBaLCPa8f5A+nUsmDogk=; b=EDwEaAJhLONtR9yBUMnZ304yVtgfHiqtcAXyZQ86vzWCaBALdrkjXBfXSBVL3bb9UJ+m1/ KfmiMRShNbuLypH+Yrbx0R1M2Squ2UDN/HFAUlZOCZswladN/nN6BzOZtiXsXKrk9Fd+ya OKUaiY9TowAy3/pjw+WHkcq/Zgt4V5w= Date: Thu, 24 Sep 2026 16:17:10 +0200 Subject: [PATCH v3 6/7] dt-bindings: arm: apple: Add A18 Pro based devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-6-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian The MacBook Neo is the first MacBook to use an A-Series Apple Silicon SoC. The MacBook Neo is overall similar to the M4 series devices. The iPhone 16 Pro is based on the same SoC, but Apple does not allow users running a custom OS on this device. Acked-by: Rob Herring (Arm) Signed-off-by: Yureka Lilian --- Documentation/devicetree/bindings/arm/apple.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/apple.yaml b/Documentati= on/devicetree/bindings/arm/apple.yaml index 5d87a4fef193..7c3e7131a5e7 100644 --- a/Documentation/devicetree/bindings/arm/apple.yaml +++ b/Documentation/devicetree/bindings/arm/apple.yaml @@ -82,6 +82,10 @@ description: | - iPhone 8 Plus - iPhone X =20 + Devices based on the "A18 Pro" SoC: + + - MacBook Neo (A18 Pro, 2026) + Devices based on the "M1" SoC: =20 - Mac mini (M1, 2020) @@ -300,6 +304,13 @@ properties: - const: apple,t8015 - const: apple,arm-platform =20 + - description: Apple A18 Pro SoC based platforms + items: + - enum: + - apple,j700 # MacBook Neo (A18 Pro, 2026) + - const: apple,t8140 + - const: apple,arm-platform + - description: Apple M1 SoC based platforms items: - enum: --=20 2.55.0 From nobody Fri Sep 25 13:54:45 2026 Received: from mail.cyberchaos.dev (mail.cyberchaos.dev [195.39.247.168]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E5C33A380C; Thu, 24 Sep 2026 14:17:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.39.247.168 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259448; cv=none; b=BLZ28h9Qr1vRP+mEmVp1VxoSRUccQpI8/Bz1GAVRTQ+0FE40kjyPIygT4cPbVuvCtwGB6XwJp7OzGAivwflX8ybYqswdx3EZAC6G0vUwMAypoADbTa9Qd/y99XqaYf3ldSk05nF9cqs7FpaTuPZTF8NDivETAuVcE1tlasy7JJ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790259448; c=relaxed/simple; bh=iXG2IIXhuaK3xgyp2cPLAZqui/WW2oD4xpTHwWGQo7s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n4P5lZOg7U/He7bghTkwB+iP7TBNC18RgyKufwu5c15kodvy3uvahw1mL6VM9UEyuC7OvYgdARWp+lJby32CdefsCNcj+mrREpwI4+8qVSbnF0wftg8NBWIrwCmo4Kg6D/jJm4XpWHCcVMiuoFvXq7K7it3DnEP6XWOztuqIBv4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev; spf=pass smtp.mailfrom=cyberchaos.dev; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b=1ksDI9c2; arc=none smtp.client-ip=195.39.247.168 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=cyberchaos.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=cyberchaos.dev header.i=@cyberchaos.dev header.b="1ksDI9c2" From: Yureka Lilian DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cyberchaos.dev; s=mail; t=1790259443; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DDVjMUHaEOcbMhYD12DROe3Y2AT/VC3EQjCH1AC3SLQ=; b=1ksDI9c2AUc/Mu5r5gEUkv9gYlytUK5bt/cwsfenTPDEm3fTOxFaa3fIwaddsWluVdP7Lh xrgqwwAHQ1EE5kf520PTQh0JEZbQkj2AbPKncySGvn4xKSqcaRfq+5eYYSOoJ5iQxN0Otw XTBcpQ21ixlv1ic1LBidUGhYCaUrBbU= Date: Thu, 24 Sep 2026 16:17:11 +0200 Subject: [PATCH v3 7/7] arm64: dts: apple: Add minimal MacBook Neo device tree Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260924-apple-a18-pro-initial-devicetrees-v3-7-94f7ea52cc64@cyberchaos.dev> References: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> In-Reply-To: <20260924-apple-a18-pro-initial-devicetrees-v3-0-94f7ea52cc64@cyberchaos.dev> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lorenzo Pieralisi , Sven Peter , Janne Grunau , Neal Gompa , Hector Martin , Thomas Gleixner , Radu Rendec , Wim Van Sebroeck , Guenter Roeck Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org, Yureka Lilian Added a device tree for the MacBook Neo, which uses the t8140 SoC (A18 Pro) also found in the iPhone 16 Pro. The device tree has a minimal set of devices limited to CPU cores, interrupt controller, watchdog, serial and framebuffer. Using the macOS 26.6.2 iBoot/firmware, the machine reliably boots on a single core using the stock kernel. Booting with smp requires avoiding the wfi and wfit instructions in the idle loop and `delay()` respectively, since those instructions cause a loss of architectural state on the secondary cores. Signed-off-by: Yureka Lilian --- arch/arm64/boot/dts/apple/Makefile | 1 + arch/arm64/boot/dts/apple/t8140-j700.dts | 54 +++ arch/arm64/boot/dts/apple/t8140-pmgr.dtsi | 777 ++++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8140.dtsi | 207 ++++++++ 4 files changed, 1039 insertions(+) diff --git a/arch/arm64/boot/dts/apple/Makefile b/arch/arm64/boot/dts/apple= /Makefile index 62999574a36b..4f31beeb11ac 100644 --- a/arch/arm64/boot/dts/apple/Makefile +++ b/arch/arm64/boot/dts/apple/Makefile @@ -109,3 +109,4 @@ dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j624.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j713.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j715.dtb dtb-$(CONFIG_ARCH_APPLE) +=3D t8132-j773g.dtb +dtb-$(CONFIG_ARCH_APPLE) +=3D t8140-j700.dtb diff --git a/arch/arm64/boot/dts/apple/t8140-j700.dts b/arch/arm64/boot/dts= /apple/t8140-j700.dts new file mode 100644 index 000000000000..227b58a7ce64 --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140-j700.dts @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple MacBook Neo (A18 Pro, 2026) + * + * target-type: J700 + * + * Copyright The Asahi Linux Contributors + */ + +/dts-v1/; + +#include "t8140.dtsi" + +/ { + compatible =3D "apple,j700", "apple,t8140", "apple,arm-platform"; + model =3D "Apple MacBook Neo (A18 Pro, 2026)"; + + aliases { + serial0 =3D &serial0; + }; + + chosen { + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + + stdout-path =3D "serial0"; + + framebuffer@0 { + compatible =3D "apple,simple-framebuffer", + "simple-framebuffer"; + reg =3D <0 0 0 0>; /* To be filled by loader */ + /* Format properties will be added by loader */ + + status =3D "disabled"; + }; + }; + + memory@800000000 { + device_type =3D "memory"; + reg =3D <0x8 0 0x2 0>; /* To be filled by loader */ + }; + + reserved-memory { + ranges; + #address-cells =3D <2>; + #size-cells =3D <2>; + /* To be filled by loader */ + }; +}; + +&serial0 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/apple/t8140-pmgr.dtsi b/arch/arm64/boot/dt= s/apple/t8140-pmgr.dtsi new file mode 100644 index 000000000000..dd43520394ac --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140-pmgr.dtsi @@ -0,0 +1,777 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * PMGR Power domains for the Apple T8140 "A18 Pro" SoC + * + * Copyright The Asahi Linux Contributors + */ + +&pmgr { + ps_sep_aon: power-controller@60 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + label =3D "sep_aon"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_msg: power-controller@108 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x108 4>; + label =3D "msg"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_aic: power-controller@110 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x110 4>; + label =3D "aic"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_dwi: power-controller@118 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x118 4>; + label =3D "dwi"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_gpio: power-controller@120 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x120 4>; + label =3D "gpio"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pmc: power-controller@138 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x138 4>; + label =3D "pmc"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm0: power-controller@140 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x140 4>; + label =3D "pms_fpwm0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm1: power-controller@148 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x148 4>; + label =3D "pms_fpwm1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm2: power-controller@150 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x150 4>; + label =3D "pms_fpwm2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm3: power-controller@158 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x158 4>; + label =3D "pms_fpwm3"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_fpwm4: power-controller@160 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x160 4>; + label =3D "pms_fpwm4"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_pms_c1ppt: power-controller@168 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x168 4>; + label =3D "pms_c1ppt"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_soc_rc: power-controller@170 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x170 4>; + label =3D "soc_rc"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_soc_dpe: power-controller@178 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x178 4>; + label =3D "soc_dpe"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_pmgr_soc_ocla: power-controller@180 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x180 4>; + label =3D "pmgr_soc_ocla"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ispsens0: power-controller@188 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x188 4>; + label =3D "ispsens0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ispsens1: power-controller@190 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x190 4>; + label =3D "ispsens1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ap_tmm: power-controller@1a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1a0 4>; + label =3D "ap_tmm"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_afggfxni0: power-controller@1b8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1b8 4>; + label =3D "afggfxni0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_gfx: power-controller@1f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x1f0 4>; + label =3D "gfx"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_jpg: power-controller@230 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x230 4>; + label =3D "jpg"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_msr: power-controller@238 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x238 4>; + label =3D "msr"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_venc0_sys: power-controller@240 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x240 4>; + label =3D "venc0_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_prores: power-controller@250 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x250 4>; + label =3D "prores"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_apcie_gp: power-controller@258 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x258 4>; + label =3D "apcie_gp"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_isp_sys: power-controller@268 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x268 4>; + label =3D "isp_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ans: power-controller@278 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x278 4>; + label =3D "ans"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_disp_sys: power-controller@280 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x280 4>; + label =3D "disp_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext0_sys: power-controller@288 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x288 4>; + label =3D "dispext0_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_ane_sys: power-controller@290 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x290 4>; + label =3D "ane_sys"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_msr_ase_core: power-controller@298 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x298 4>; + label =3D "msr_ase_core"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_msr>; + #reset-cells =3D <0>; + }; + + ps_apcie_sys_gp: power-controller@2a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a0 4>; + label =3D "apcie_sys_gp"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_sio_cpu: power-controller@2a8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2a8 4>; + label =3D "sio_cpu"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_fpwm0: power-controller@2b0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b0 4>; + label =3D "fpwm0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_fpwm1: power-controller@2b8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2b8 4>; + label =3D "fpwm1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_fpwm2: power-controller@2c0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c0 4>; + label =3D "fpwm2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c0: power-controller@2c8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2c8 4>; + label =3D "i2c0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c1: power-controller@2d0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d0 4>; + label =3D "i2c1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c2: power-controller@2d8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2d8 4>; + label =3D "i2c2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c3: power-controller@2e0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e0 4>; + label =3D "i2c3"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_i2c4: power-controller@2e8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2e8 4>; + label =3D "i2c4"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_spi_p: power-controller@2f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f0 4>; + label =3D "spi_p"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_uart_p: power-controller@2f8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x2f8 4>; + label =3D "uart_p"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_dpa_p: power-controller@300 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x300 4>; + label =3D "dpa_p"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_aes: power-controller@308 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x308 4>; + label =3D "aes"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_apcie_st: power-controller@310 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x310 4>; + label =3D "apcie_st"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_ans>; + #reset-cells =3D <0>; + }; + + ps_disp_fe: power-controller@318 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x318 4>; + label =3D "disp_fe"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_disp_sys>; + #reset-cells =3D <0>; + apple,always-on; /* TODO: figure out if we can enable PM here */ + }; + + ps_dispext0_fe: power-controller@320 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x320 4>; + label =3D "dispext0_fe"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dispext0_sys>; + #reset-cells =3D <0>; + }; + + ps_dispext0_cpu: power-controller@328 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x328 4>; + label =3D "dispext0_cpu"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dispext0_fe>; + #reset-cells =3D <0>; + + status =3D "disabled"; /* Locked, don't touch it */ + }; + + ps_spi0: power-controller@330 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x330 4>; + label =3D "spi0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_spi1: power-controller@338 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x338 4>; + label =3D "spi1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_spi2: power-controller@340 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x340 4>; + label =3D "spi2"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_spi3: power-controller@348 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x348 4>; + label =3D "spi3"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_qspi: power-controller@350 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x350 4>; + label =3D "qspi"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_spi_p>; + #reset-cells =3D <0>; + }; + + ps_uart_n: power-controller@358 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x358 4>; + label =3D "uart_n"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart0: power-controller@360 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x360 4>; + label =3D "uart0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart1: power-controller@368 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x368 4>; + label =3D "uart1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart2: power-controller@370 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x370 4>; + label =3D "uart2"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart3: power-controller@378 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x378 4>; + label =3D "uart3"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart4: power-controller@380 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x380 4>; + label =3D "uart4"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_uart5: power-controller@388 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x388 4>; + label =3D "uart5"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_uart_p>; + #reset-cells =3D <0>; + }; + + ps_dpa0: power-controller@390 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x390 4>; + label =3D "dpa0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dpa_p>; + #reset-cells =3D <0>; + }; + + ps_dpa1: power-controller@398 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x398 4>; + label =3D "dpa1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_dpa_p>; + #reset-cells =3D <0>; + }; + + ps_apcie_sys_st: power-controller@3a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3a0 4>; + label =3D "apcie_sys_st"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_ans>, <&ps_apcie_st>; + #reset-cells =3D <0>; + }; + + ps_apcie_phy_sw: power-controller@3c0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3c0 4>; + label =3D "apcie_phy_sw"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_apcie_sys_st>, <&ps_apcie_sys_gp>; + #reset-cells =3D <0>; + }; + + ps_pmp: power-controller@3d0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d0 4>; + label =3D "pmp"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_pms_sram: power-controller@3d8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3d8 4>; + label =3D "pms_sram"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_atc0_usb_aon: power-controller@3e0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e0 4>; + label =3D "atc0_usb_aon"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + }; + + ps_atc0_common: power-controller@3e8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3e8 4>; + label =3D "atc0_common"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_atc0_usb_aon>; + #reset-cells =3D <0>; + }; + + ps_atc0_usb: power-controller@3f0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x3f0 4>; + label =3D "atc0_usb"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_atc0_common>; + #reset-cells =3D <0>; + }; + + ps_sep: power-controller@c00 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xc00 4>; + label =3D "sep"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_venc0_dma: power-controller@8000 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8000 4>; + label =3D "venc0_dma"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_sys>; + #reset-cells =3D <0>; + }; + + ps_venc0_pipe4: power-controller@8008 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8008 4>; + label =3D "venc0_pipe4"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_dma>; + #reset-cells =3D <0>; + }; + + ps_venc0_pipe5: power-controller@8010 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8010 4>; + label =3D "venc0_pipe5"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_dma>; + #reset-cells =3D <0>; + }; + + ps_venc0_me0: power-controller@8018 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8018 4>; + label =3D "venc0_me0"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_dma>; + #reset-cells =3D <0>; + }; + + ps_venc0_me1: power-controller@8020 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8020 4>; + label =3D "venc0_me1"; + #power-domain-cells =3D <0>; + power-domains =3D <&ps_venc0_me0>; + #reset-cells =3D <0>; + }; +}; + +&pmgr_mini { + ps_debug_gated: power-controller@0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x0 4>; + label =3D "debug_gated"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_spmi0: power-controller@58 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x58 4>; + label =3D "nub_spmi0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_spmi1: power-controller@60 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x60 4>; + label =3D "nub_spmi1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_spmi_a0: power-controller@68 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x68 4>; + label =3D "nub_spmi_a0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_aon_nogate: power-controller@78 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x78 4>; + label =3D "nub_aon_nogate"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_ocla: power-controller@80 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x80 4>; + label =3D "nub_ocla"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_gpio: power-controller@88 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x88 4>; + label =3D "nub_gpio"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_fabric: power-controller@a0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa0 4>; + label =3D "nub_fabric"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_nub_sram: power-controller@a8 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xa8 4>; + label =3D "nub_sram"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_debug_switch: power-controller@b0 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0xb0 4>; + label =3D "debug_switch"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_smc_i2cm0: power-controller@8028 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8028 4>; + label =3D "smc_i2cm0"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_smc_i2cm1: power-controller@8030 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8030 4>; + label =3D "smc_i2cm1"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; + + ps_smc_i2cm2: power-controller@8038 { + compatible =3D "apple,t8140-pmgr-pwrstate", "apple,t8103-pmgr-pwrstate"; + reg =3D <0x8038 4>; + label =3D "smc_i2cm2"; + #power-domain-cells =3D <0>; + #reset-cells =3D <0>; + apple,always-on; + }; +}; diff --git a/arch/arm64/boot/dts/apple/t8140.dtsi b/arch/arm64/boot/dts/app= le/t8140.dtsi new file mode 100644 index 000000000000..150d91bdf6fc --- /dev/null +++ b/arch/arm64/boot/dts/apple/t8140.dtsi @@ -0,0 +1,207 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Apple T8140 "A18 Pro" SoC + * + * Copyright The Asahi Linux Contributors + */ + +#include +#include + +/ { + compatible =3D "apple,t8140", "apple,arm-platform"; + + #address-cells =3D <2>; + #size-cells =3D <2>; + + clkref: clock-ref { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <24000000>; + clock-output-names =3D "clkref"; + }; + + cpus { + #address-cells =3D <2>; + #size-cells =3D <0>; + + cpu-map { + cluster0 { + core0 { + cpu =3D <&cpu_e0>; + }; + + core1 { + cpu =3D <&cpu_e1>; + }; + + core2 { + cpu =3D <&cpu_e2>; + }; + + core3 { + cpu =3D <&cpu_e3>; + }; + }; + + cluster1 { + core0 { + cpu =3D <&cpu_p0>; + }; + + core1 { + cpu =3D <&cpu_p1>; + }; + }; + }; + + cpu_e0: cpu@0 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x0>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e1: cpu@1 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x1>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e2: cpu@2 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x2>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_e3: cpu@3 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-e"; + reg =3D <0x0 0x3>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x10000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x20000>; + next-level-cache =3D <&l2_cache_0>; + }; + + cpu_p0: cpu@10100 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-p"; + reg =3D <0x0 0x10100>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x20000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x30000>; + next-level-cache =3D <&l2_cache_1>; + }; + + cpu_p1: cpu@10101 { + device_type =3D "cpu"; + compatible =3D "apple,tahiti-p"; + reg =3D <0x0 0x10101>; + cpu-release-addr =3D <0 0>; + d-cache-size =3D <0x20000>; + enable-method =3D "spin-table"; + i-cache-size =3D <0x30000>; + next-level-cache =3D <&l2_cache_1>; + }; + + l2_cache_0: l2-cache-0 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-size =3D <0x400000>; + cache-unified; + }; + + l2_cache_1: l2-cache-1 { + compatible =3D "cache"; + cache-level =3D <2>; + cache-size =3D <0x1000000>; + cache-unified; + }; + }; + + soc: soc { + compatible =3D "simple-bus"; + ranges; + #address-cells =3D <2>; + nonposted-mmio; + #size-cells =3D <2>; + + pmgr: power-management@300700000 { + compatible =3D "apple,t8140-pmgr", "apple,t8103-pmgr", + "syscon", "simple-mfd"; + reg =3D <0x3 0x700000 0 0x14000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + /* child nodes are added in t8140-pmgr.dtsi */ + }; + + aic: interrupt-controller@301000000 { + compatible =3D "apple,t8140-aic3", "apple,t8122-aic3"; + reg =3D <0x3 0x01000000 0x0 0x1cc000>, + <0x3 0x01040000 0x0 0x4000>; + reg-names =3D "core", "event"; + #interrupt-cells =3D <3>; + interrupt-controller; + power-domains =3D <&ps_aic>; + }; + + pmgr_mini: power-management@308280000 { + compatible =3D "apple,t8140-pmgr", "apple,t8103-pmgr", + "syscon", "simple-mfd"; + reg =3D <0x3 0x8280000 0 0xc000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + /* child nodes are added in t8140-pmgr.dtsi */ + }; + + wdt: watchdog@3082b0000 { + compatible =3D "apple,t8140-wdt", "apple,t8103-wdt"; + reg =3D <0x3 0x082b0000 0x0 0x4000>; + clocks =3D <&clkref>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + }; + + serial0: serial@385200000 { + compatible =3D "apple,s5l-uart"; + reg =3D <0x3 0x85200000 0x0 0x1000>; + clocks =3D <&clkref>, <&clkref>; + clock-names =3D "uart", "clk_uart_baud0"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + power-domains =3D <&ps_uart0>; + reg-io-width =3D <4>; + + status =3D "disabled"; + }; + }; + + timer { + compatible =3D "arm,armv8-timer"; + interrupt-parent =3D <&aic>; + interrupts =3D , + , + , + ; + interrupt-names =3D "phys", "virt", "hyp-phys", "hyp-virt"; + }; +}; + +#include "t8140-pmgr.dtsi" --=20 2.55.0