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[186.244.17.112]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-144f98209ffsm8100182c88.4.2026.09.23.16.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 16:41:59 -0700 (PDT) From: Felipe Calliari To: linux-media@vger.kernel.org Cc: Sakari Ailus , Hans de Goede , Bryan O'Donoghue , Mauro Carvalho Chehab , Dan Scally , Tomas Moro , linux-kernel@vger.kernel.org, Felipe Calliari , Bryan O'Donoghue Subject: [PATCH v3 1/5] media: ov02c10: Drop duplicate register write Date: Wed, 23 Sep 2026 20:40:56 -0300 Message-ID: <20260923234100.318151-2-calliarifelipe@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260923234100.318151-1-calliarifelipe@gmail.com> References: <20260923144257.119076-1-calliarifelipe@gmail.com> <20260923234100.318151-1-calliarifelipe@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" sensor_1928x1092_30fps_setting[] writes {0x395f, 0x00} twice in a row. The second write is redundant; drop it. No functional change. Signed-off-by: Felipe Calliari Reviewed-by: Bryan O'Donoghue Tested-by: Mars-Wave # Samsung Galaxy Book3 Pro NP960= XFG (github.com/MarsWave) --- drivers/media/i2c/ov02c10.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index d622f5dca..730a40e94 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -209,7 +209,6 @@ static const struct reg_sequence sensor_1928x1092_30fps= _setting[] =3D { {0x395d, 0x05}, {0x395e, 0x02}, {0x395f, 0x00}, - {0x395f, 0x00}, {0x3960, 0x00}, {0x3961, 0x00}, {0x3962, 0x00}, --=20 2.55.0 From nobody Thu Sep 24 13:37:32 2026 Received: from mail-dl2-f42.google.com (mail-dl2-f42.google.com [74.125.229.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55878446070 for ; Wed, 23 Sep 2026 23:42:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.229.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790206925; cv=none; b=vD5/WeoMS9e5RFzgSVXdOmZjHYDxrpUjOKX2yiJ0f4l8CSIjXuopYGPbh6kh1Bog/f3yLTHnEAjy0mVXjBj3TvX+oi83ytszTC7KGlbXBg9okuBdPTqv5c+m6ud2HQiqXSOUaAAUeGpYH7KjEYtioWRJrf1ADuQawx17P+1ZxVU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790206925; c=relaxed/simple; bh=JRbEo3jDUGdpUHqM8S0YjNO5l1q03hO4AFqJdccpCWc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sQY4u7ZHrhSYoCPmVrkmZnXue11ZHaEbLoSp7t9k2aXbMTzJ41+vhddqc2FVhiFDrxa/Y/X7CgYlWGRo8aIP7/HQ8mCxksBaOPJ0hy6j/rhTy3XSBX9J8sCZkIDibsqYX5lO82WDk5Lft+j21/EdkpVOpFfb7tEfVowWm+pBZkU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=b3brL0/J; arc=none smtp.client-ip=74.125.229.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="b3brL0/J" Received: by mail-dl2-f42.google.com with SMTP id a92af1059eb24-1438cb9b3a3so1494153c88.2 for ; Wed, 23 Sep 2026 16:42:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790206922; x=1790811722; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=N7+t2VISKOFozXNbp7BqWZhipJ/lcJUoqiKturNJLsY=; b=b3brL0/JaxwzysuSUxAt3Lyr1f5USQ4J64i5URlKx5gmywjUqrbk0nOcyzFMzEELJT 5XzQ3LGBy6Uj1tBV1Tcz8RQxBlpYPsF13LVHU0S1yRN5litYnXXH9wlSxqGdOAbgkzjH 0NAg/BjS8eHef9c3Ljr4J+mNpVYxIWIO0OpnGZy/Q/G80kvavMzGjfKXKvxJQUgE7jF6 ruAQiGhGc+bmAEhQ9EdXeTWqcwkG+QwZdfCUtW4TK04hBhmswdNV1ViNey1A+/DzG3k4 pALBidpLSNkLvSARcb7nSXEyhlxStPgkgJf3X0aJqiyI4doXsbK4JMz8RrlmyTEGnIeo USCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790206922; x=1790811722; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=N7+t2VISKOFozXNbp7BqWZhipJ/lcJUoqiKturNJLsY=; b=Bv3PfBEkp2UQj7SZq09vs8Xszvvj3PPVyr157gI7zFwlTl4Xgy+ozygENprnvSnUiP hBR3TCv8F8o+P+miIqPD59ahVaSJXUdkWQIFJWKgULfMCQIXAOE93+7M80gDWbp/ac20 8gEVZiVzghdyumUFPIyqAlKtP9CLXGZKOX8KfQpbci3xIn3/ZzRQ4keyt6LWYwG4Dps6 kdApvdeFY4vIcX8IZmZQ4Psfr4ds5khQ1ojBaa8as4rEUVKNA/Lrvc804tMrDshLM+1R ZrniiTVJFWcrQjz4ABtp6l6fRdNa31C6iXSNMgiY4Yq/fYV0J2ijUtOC64rc5lUb/HDf 9Dqw== X-Forwarded-Encrypted: i=1; AKwUvBzw0/ehRtFRqvFBItWeoKMtLnF8+QpSlCHyOJYdaMLmkeYz2JBKN3FpefnEdUcXX+W9/T/A7AT9X31WstQ=@vger.kernel.org X-Gm-Message-State: AFuF++nv2M0ue4JKifV24CSbF/AXVRTlDGMYglX7OsCUbxq7PpFqlzj6 cetF29pizHNi4SXCX2Ny8YiiYpB0BtUj+94at2pZ4jYDv1MhamIuzfgZ X-Gm-Gg: AYBFou1MMnkAS45BG9QemaXX74+EDD1U9mXLZfg51uGHKLBgKKTgAGuA+ZQIRVO0eaG j5xQNRguRkkjyejQhs/kP8VJXWY9yKvIPhpqsF/vwtRcsIeiT8Pr0qzipZEZVUbIhkun8VW7SDD DGvt37V5pb6i3fKJGY5wur/vJ8EvRopFXwgOhvz56NOYDZHMqQqeMXHV0+Q12NCPXKBi6tlRqKa aPqGKf8vTrFJUbW2U0PJberYjJ1woXF9QqylQgx4yQtHbIGuPPyqNxJPSkA8WC/DbMXzKddr8BZ vSmIXQq7ooMz3FRrm1tZjc8VuwCTkteZgnXWWiDb+GHGrxECzxLVTr1N2pD4NQoEAaiDnZ8NV1/ 25NB0D1HnNo/OASKIScWXu1kVoBN8o3wD5DIUKMn0zoNZNfJMW/1eHSrGuc5H4xUSLOuKR9/9sy wReu6rIc5MDbugSgoTK+OxPO+Ey0AOjfP45S8TxNbs823M5DcAKyrFPZDuStEGzfJ2+iL3K8eTd KWoPpMSskVrd8lM4pNU0bOB1V1c/1K/LWvA X-Received: by 2002:a05:7022:b885:b0:144:c11b:6de8 with SMTP id a92af1059eb24-14503fc6fd9mr431913c88.29.1790206922160; Wed, 23 Sep 2026 16:42:02 -0700 (PDT) Received: from archsung (186-244-17-112.user3p.vtal.net.br. [186.244.17.112]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-144f98209ffsm8100182c88.4.2026.09.23.16.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 16:42:01 -0700 (PDT) From: Felipe Calliari To: linux-media@vger.kernel.org Cc: Sakari Ailus , Hans de Goede , Bryan O'Donoghue , Mauro Carvalho Chehab , Dan Scally , Tomas Moro , linux-kernel@vger.kernel.org, Felipe Calliari , Bryan O'Donoghue Subject: [PATCH v3 2/5] media: ov02c10: Implement get_selection Date: Wed, 23 Sep 2026 20:40:57 -0300 Message-ID: <20260923234100.318151-3-calliarifelipe@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260923234100.318151-1-calliarifelipe@gmail.com> References: <20260923144257.119076-1-calliarifelipe@gmail.com> <20260923234100.318151-1-calliarifelipe@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The driver does not implement .get_selection, so userspace cannot query the sensor's native size or active crop rectangle. libcamera reports "Unable to get rectangle N on pad 0/0: Inappropriate ioctl for device" and "The sensor kernel driver needs to be fixed" (see libcamera's Documentation/sensor_driver_requirements.rst). Implement .get_selection returning the fixed geometry of the sensor: - V4L2_SEL_TGT_NATIVE_SIZE / V4L2_SEL_TGT_CROP_BOUNDS: the full 1928x1092 pixel array. - V4L2_SEL_TGT_CROP / V4L2_SEL_TGT_CROP_DEFAULT: the 1920x1080 active area, centred in the 1928x1092 output size programmed in sensor_1928x1092_30fps_setting[] (registers 0x3808-0x380b), i.e. offset by (4, 6). The crop is fixed, so sd_state is not consulted. Signed-off-by: Felipe Calliari Reviewed-by: Bryan O'Donoghue Tested-by: Mars-Wave # Samsung Galaxy Book3 Pro NP960= XFG (github.com/MarsWave) --- drivers/media/i2c/ov02c10.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index 730a40e94..cdccbdef3 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -18,6 +19,13 @@ #define OV02C10_MCLK 19200000 #define OV02C10_RGB_DEPTH 10 =20 +#define OV02C10_NATIVE_WIDTH 1928 +#define OV02C10_NATIVE_HEIGHT 1092 +#define OV02C10_ACTIVE_WIDTH 1920 +#define OV02C10_ACTIVE_HEIGHT 1080 +#define OV02C10_ACTIVE_LEFT 4 +#define OV02C10_ACTIVE_TOP 6 + #define OV02C10_REG_CHIP_ID CCI_REG16(0x300a) #define OV02C10_CHIP_ID 0x5602 =20 @@ -768,11 +776,37 @@ static const struct v4l2_subdev_video_ops ov02c10_vid= eo_ops =3D { .s_stream =3D v4l2_subdev_s_stream_helper, }; =20 +static int ov02c10_get_selection(struct v4l2_subdev *sd, + const struct v4l2_subdev_client_info *ci, + struct v4l2_subdev_state *sd_state, + struct v4l2_subdev_selection *sel) +{ + switch (sel->target) { + case V4L2_SEL_TGT_NATIVE_SIZE: + case V4L2_SEL_TGT_CROP_BOUNDS: + sel->r.top =3D 0; + sel->r.left =3D 0; + sel->r.width =3D OV02C10_NATIVE_WIDTH; + sel->r.height =3D OV02C10_NATIVE_HEIGHT; + return 0; + case V4L2_SEL_TGT_CROP: + case V4L2_SEL_TGT_CROP_DEFAULT: + sel->r.top =3D OV02C10_ACTIVE_TOP; + sel->r.left =3D OV02C10_ACTIVE_LEFT; + sel->r.width =3D OV02C10_ACTIVE_WIDTH; + sel->r.height =3D OV02C10_ACTIVE_HEIGHT; + return 0; + } + + return -EINVAL; +} + static const struct v4l2_subdev_pad_ops ov02c10_pad_ops =3D { .set_fmt =3D ov02c10_set_format, .get_fmt =3D v4l2_subdev_get_fmt, .enum_mbus_code =3D ov02c10_enum_mbus_code, .enum_frame_size =3D ov02c10_enum_frame_size, + .get_selection =3D ov02c10_get_selection, .enable_streams =3D ov02c10_enable_streams, .disable_streams =3D ov02c10_disable_streams, }; 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[186.244.17.112]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-144f98209ffsm8100182c88.4.2026.09.23.16.42.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 16:42:04 -0700 (PDT) From: Felipe Calliari To: linux-media@vger.kernel.org Cc: Sakari Ailus , Hans de Goede , Bryan O'Donoghue , Mauro Carvalho Chehab , Dan Scally , Tomas Moro , linux-kernel@vger.kernel.org, Felipe Calliari Subject: [PATCH v3 3/5] media: ov02c10: Split the PLL registers off the mode tables Date: Wed, 23 Sep 2026 20:40:58 -0300 Message-ID: <20260923234100.318151-4-calliarifelipe@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260923234100.318151-1-calliarifelipe@gmail.com> References: <20260923144257.119076-1-calliarifelipe@gmail.com> <20260923234100.318151-1-calliarifelipe@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The PLL is programmed partly by the common mode table and partly by the per-lane tables, which override 0x0303 and 0x0305 with the same values for either lane count and also set 0x0316. Move the 0x03xx PLL registers into a table of their own, keeping only the values that end up in the sensor, and write it before the mode tables. The PLL settings depend on the external clock rate rather than on the mode or the lane count, and this prepares for supporting clock rates other than 19.2 MHz. No functional change intended. Signed-off-by: Felipe Calliari --- Notes: Changes in v3: - New patch, as asked by Sakari. drivers/media/i2c/ov02c10.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index cdccbdef3..0e5010303 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -89,12 +89,6 @@ struct ov02c10_mode { }; =20 static const struct reg_sequence sensor_1928x1092_30fps_setting[] =3D { - {0x0301, 0x08}, - {0x0303, 0x06}, - {0x0304, 0x01}, - {0x0305, 0xe0}, - {0x0313, 0x40}, - {0x031c, 0x4f}, {0x3020, 0x97}, {0x3022, 0x01}, {0x3026, 0xb4}, @@ -303,10 +297,6 @@ static const struct reg_sequence sensor_1928x1092_30fp= s_1lane_setting[] =3D { {0x394e, 0x0b}, {0x4800, 0x24}, {0x5000, 0xf5}, - /* plls */ - {0x0303, 0x05}, - {0x0305, 0x90}, - {0x0316, 0x90}, {0x3016, 0x12}, }; =20 @@ -330,11 +320,17 @@ static const struct reg_sequence sensor_1928x1092_30f= ps_2lane_setting[] =3D { {0x4d0d, 0x00}, {0x5000, 0xfd}, {0x481f, 0x30}, - /* plls */ + {0x3016, 0x32}, +}; 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[186.244.17.112]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-144f98209ffsm8100182c88.4.2026.09.23.16.42.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 16:42:07 -0700 (PDT) From: Felipe Calliari To: linux-media@vger.kernel.org Cc: Sakari Ailus , Hans de Goede , Bryan O'Donoghue , Mauro Carvalho Chehab , Dan Scally , Tomas Moro , linux-kernel@vger.kernel.org, Felipe Calliari Subject: [PATCH v3 4/5] media: ipu-bridge: Add the OV02C10 26 MHz link frequency Date: Wed, 23 Sep 2026 20:40:59 -0300 Message-ID: <20260923234100.318151-5-calliarifelipe@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260923234100.318151-1-calliarifelipe@gmail.com> References: <20260923144257.119076-1-calliarifelipe@gmail.com> <20260923234100.318151-1-calliarifelipe@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" With a 26 MHz external clock the OV02C10 runs its CSI-2 link at 399.479167 MHz instead of 400 MHz. Add that link frequency to the OVTI02C1 entry so the sensor driver can use it. Signed-off-by: Felipe Calliari --- Notes: Changes in v3: - New patch. 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[186.244.17.112]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-144f98209ffsm8100182c88.4.2026.09.23.16.42.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Sep 2026 16:42:09 -0700 (PDT) From: Felipe Calliari To: linux-media@vger.kernel.org Cc: Sakari Ailus , Hans de Goede , Bryan O'Donoghue , Mauro Carvalho Chehab , Dan Scally , Tomas Moro , linux-kernel@vger.kernel.org, Felipe Calliari Subject: [PATCH v3 5/5] media: ov02c10: Add support for a 26 MHz external clock Date: Wed, 23 Sep 2026 20:41:00 -0300 Message-ID: <20260923234100.318151-6-calliarifelipe@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260923234100.318151-1-calliarifelipe@gmail.com> References: <20260923144257.119076-1-calliarifelipe@gmail.com> <20260923234100.318151-1-calliarifelipe@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some Raptor Lake laptops, e.g. the Samsung Galaxy Book3 series, feed the OV02C10 a 26 MHz external clock, which the driver rejects today. Add a PLL configuration for a 26 MHz clock, with the OP and VT PLL multipliers at 0x0127 instead of 0x0190. This yields a link frequency of 399.479167 MHz, which is added as a second link frequency. Select the PLL configuration and the link frequency, and thus the pixel rate, based on the external clock rate. While at it, terminate the unsupported-clock error message with a newline. Signed-off-by: Felipe Calliari --- Notes: Changes in v3: - Advertise 399.479167 MHz as a second link frequency instead of relying on it being close to 400 MHz. The pixel rate follows from it: 159.791666 MHz on two lanes (Sakari). - Choose between two PLL tables, split off in patch 3, from the external clock rate (Sakari). Fail probe if the firmware does not list the matching link frequency. - Make the last menu item the LINK_FREQ control's maximum and the selected frequency its default. - Stop writing 0x0315. Its reset value, 0x01, is what both tables need. - Drop the dev_dbg() and move the test details to the cover letter (Sakari). drivers/media/i2c/ov02c10.c | 75 +++++++++++++++++++++++++++++++++---- 1 file changed, 67 insertions(+), 8 deletions(-) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index 0e5010303..c7a9f5da1 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -16,7 +16,9 @@ #include =20 #define OV02C10_LINK_FREQ_400MHZ 400000000ULL -#define OV02C10_MCLK 19200000 +#define OV02C10_LINK_FREQ_399MHZ 399479167ULL +#define OV02C10_MCLK_19_2MHZ 19200000 +#define OV02C10_MCLK_26MHZ 26000000 #define OV02C10_RGB_DEPTH 10 =20 #define OV02C10_NATIVE_WIDTH 1928 @@ -333,6 +335,22 @@ static const struct reg_sequence sensor_pll_19_2mhz_se= tting[] =3D { {0x031c, 0x4f}, }; =20 +/* + * With the other PLL registers as for 19.2 MHz, the link frequency is + * mclk * M / 19.2 MHz, M being the OP (0x0304/0x0305) and VT (0x0315/0x03= 16) + * PLL multiplier. 400 MHz would need M =3D 295.38 at 26 MHz; M =3D 295 = =3D 0x0127 + * gives 399.479167 MHz. + */ +static const struct reg_sequence sensor_pll_26mhz_setting[] =3D { + {0x0301, 0x08}, + {0x0303, 0x05}, + {0x0304, 0x01}, + {0x0305, 0x27}, + {0x0313, 0x40}, + {0x0316, 0x27}, + {0x031c, 0x4f}, +}; + static const char * const ov02c10_test_pattern_menu[] =3D { "Disabled", "Color Bar", @@ -343,6 +361,32 @@ static const char * const ov02c10_test_pattern_menu[] = =3D { =20 static const s64 link_freq_menu_items[] =3D { OV02C10_LINK_FREQ_400MHZ, + OV02C10_LINK_FREQ_399MHZ, +}; + +struct ov02c10_clk_config { + /* External clock rate, Hz */ + u32 mclk; + /* Index into link_freq_menu_items[] */ + u32 link_freq_index; + /* PLL register settings for this clock rate */ + const struct reg_sequence *pll_settings; + int pll_settings_length; +}; + +static const struct ov02c10_clk_config ov02c10_clk_configs[] =3D { + { + .mclk =3D OV02C10_MCLK_19_2MHZ, + .link_freq_index =3D 0, + .pll_settings =3D sensor_pll_19_2mhz_setting, + .pll_settings_length =3D ARRAY_SIZE(sensor_pll_19_2mhz_setting), + }, + { + .mclk =3D OV02C10_MCLK_26MHZ, + .link_freq_index =3D 1, + .pll_settings =3D sensor_pll_26mhz_setting, + .pll_settings_length =3D ARRAY_SIZE(sensor_pll_26mhz_setting), + }, }; =20 static const struct ov02c10_mode supported_modes[] =3D { @@ -389,6 +433,8 @@ struct ov02c10 { struct gpio_desc *reset; struct regulator_bulk_data supplies[ARRAY_SIZE(ov02c10_supply_names)]; =20 + const struct ov02c10_clk_config *clk_config; + /* MIPI lane info */ u32 link_freq_index; u8 mipi_lanes; @@ -503,7 +549,8 @@ static int ov02c10_init_controls(struct ov02c10 *ov02c1= 0) ov02c10->link_freq =3D v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov02c10_ctrl_ops, V4L2_CID_LINK_FREQ, - ov02c10->link_freq_index, 0, + ARRAY_SIZE(link_freq_menu_items) - 1, + ov02c10->link_freq_index, link_freq_menu_items); if (ov02c10->link_freq) ov02c10->link_freq->flags |=3D V4L2_CTRL_FLAG_READ_ONLY; @@ -598,8 +645,8 @@ static int ov02c10_enable_streams(struct v4l2_subdev *s= d, return ret; =20 ret =3D regmap_multi_reg_write(ov02c10->regmap, - sensor_pll_19_2mhz_setting, - ARRAY_SIZE(sensor_pll_19_2mhz_setting)); + ov02c10->clk_config->pll_settings, + ov02c10->clk_config->pll_settings_length); if (ret) { dev_err(ov02c10->dev, "failed to write PLL settings\n"); goto out; @@ -878,8 +925,13 @@ static int ov02c10_check_hwcfg(struct ov02c10 *ov02c10) if (ret) goto check_hwcfg_error; =20 - /* v4l2_link_freq_to_bitmap() guarantees at least 1 bit is set */ - ov02c10->link_freq_index =3D ffs(link_freq_bitmap) - 1; + ov02c10->link_freq_index =3D ov02c10->clk_config->link_freq_index; + if (!(link_freq_bitmap & BIT(ov02c10->link_freq_index))) { + ret =3D dev_err_probe(dev, -EINVAL, + "link frequency %lld Hz is not supported\n", + link_freq_menu_items[ov02c10->link_freq_index]); + goto check_hwcfg_error; + } =20 if (bus_cfg.bus.mipi_csi2.num_data_lanes !=3D 1 && bus_cfg.bus.mipi_csi2.num_data_lanes !=3D 2) { @@ -916,6 +968,7 @@ static int ov02c10_probe(struct i2c_client *client) { struct ov02c10 *ov02c10; unsigned long freq; + unsigned int i; int ret; =20 ov02c10 =3D devm_kzalloc(&client->dev, sizeof(*ov02c10), GFP_KERNEL); @@ -930,9 +983,15 @@ static int ov02c10_probe(struct i2c_client *client) "failed to get imaging clock\n"); =20 freq =3D clk_get_rate(ov02c10->img_clk); - if (freq !=3D OV02C10_MCLK) + for (i =3D 0; i < ARRAY_SIZE(ov02c10_clk_configs); i++) { + if (freq =3D=3D ov02c10_clk_configs[i].mclk) { + ov02c10->clk_config =3D &ov02c10_clk_configs[i]; + break; + } + } + if (!ov02c10->clk_config) return dev_err_probe(ov02c10->dev, -EINVAL, - "external clock %lu is not supported", + "external clock %lu is not supported\n", freq); =20 v4l2_i2c_subdev_init(&ov02c10->sd, client, &ov02c10_subdev_ops); --=20 2.55.0