From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f41.google.com (mail-pz2-f41.google.com [74.125.228.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36D482744F for ; Wed, 23 Sep 2026 02:20:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130004; cv=none; b=uqRUvdnpeXEl1zliBc4CWuunqhorxKpuSj8fk5/ANe2/OSnOg8isJyIMh55NBd/d+7Gvzp3H/pEF7MEE6E4Nbl0elYSD2OhnGKmXTdKdfOOCvHmffBhrPzt+AXLJMJEA+g3ylW35ew5F9QMZlRWnGJCz0biYyM3pNDgEzx47Lz8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130004; c=relaxed/simple; bh=RYEvLF9yW7LNBWAkSdNa2U/lQe3026MEqVhKRa6xStk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Mt4bbIo7guVI+j9kAHq2G2qn+25vp/cNvHtih0bEdwUYK9pxI2iPeTGtrXF1FvxrWYQtRMEyAk/6TZbBrqNbwZaEcSXaWWmMf/+XKhq9YiqW3zi4FXFWXHOObb2jghl9SLeQN0eD6EzWWzr6J03Ftts8rvk7aOOljMZtnhs0dOs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UCgiR/ET; arc=none smtp.client-ip=74.125.228.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UCgiR/ET" Received: by mail-pz2-f41.google.com with SMTP id d2e1a72fcca58-86b90133ae8so281040b3a.1 for ; Tue, 22 Sep 2026 19:20:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130002; x=1790734802; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=ieg2P/Lax1Eakf07DndW01SMJ/nBQVYMTevnVB+sbhI=; b=UCgiR/ETM4nMrq7fmAHTr+NNC5JdCgHEgNr1rGY8eZBidGxOhww4UdSoSlLv3w7DKA uoElI0/UajVmz48GZhgR6LZlD/UII5hFiFo5KElRLjSprBU7EquAHHKcGJ5FgnFLBjpn Ppuy7fQ3rEBpfmCOlp/lBt03b5YtOroBQcl84EWYgmJayFLmMgvtxa73ZuCTAcQYIV+i wMF9HCZBvU2lgZqKJTVMI4ZmsVjSefo3RvlOjxt0f8iIVkwztLcWdQlJHDXMBnf8kgBV 1qnzpQTdMNUPSYyaNzX9ZolBVinDiS/ofxECeYM+TDHoHnmAQCIrvUJbVwZIlgrYo/Xr WAdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130002; x=1790734802; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=ieg2P/Lax1Eakf07DndW01SMJ/nBQVYMTevnVB+sbhI=; b=0+m0I04NDkqYHCbFOrm3jpFS3F2cGYuUKF1viO6O3jJhJGs6VpXLFAY87CgLCGClU1 sMn50koOJHFEhtiafR8DvvvOrZPo6RhB2fF++ynEGK/r3GonK7EQCcLEg41z6GJA9I/o AuMiqyNfLLafxaFYe9tCpyen65T05mYCHVU1aQtOqCHsZZ0+F4CiHouLUVtWlPt76Bh4 GOF5J7W9yE8rp29LMJMIBKNBVqAybY6xylQ5srAGuCzUpY/+IATL5sDFdhj9d+jbhdZV sFczqOMjPKZ5kt9zjs08V2Qe5zERLOSa7j7mDFC9mzl7L6lYnT11EWQ3FBVsjS0+u2IC x1/A== X-Forwarded-Encrypted: i=1; AKwUvBzauArBbShvxjdNLhFc0T15xuW6PKPYbMwz2AUP1QuyJC68stse823we33HY4/gdBjCW0Bt5r4RSzm4Cps=@vger.kernel.org X-Gm-Message-State: AFuF++mqRLjDzDtmIHS6L0KwH+ND85q7sPTQlRmrA5YaBFSvny/hWAeR SU76ePG22amQneksqEruXn8iFR0UXAndcq75204mhyqqtL73DAnrvAqF X-Gm-Gg: AYBFou27yIfVfotUn1KI7qFfSiH2HNZn1jVlX67A/6mAwaZAm3qgKV9T1tUnjNE5wjT 5W4MYbR6LoVXXtbVJceCMz0C1Jb3gDbrMcR4NewBTZfGsSByXAoIsbQlkE94XoP4tcu4IsIA1um g5AkM2fvlWFHpwHd6mV2OSYRyL+Nd04MLtaAXLh1c7MirnAzCsWQGR7W77U7kBT08a4FYDF/3/U o5T1OK67yqu8RrmWfw3xQ4wK+S6XQY/RWkBUDf4Wx+9lFQJSdhS07NFVYd9MPD/Ys5hUOTDm/Ve EXekogzY6d0xFo3WnH8TW6209b5ueCB+uZS9kqXjzB848RMwHXLu1EYp2t9C/YUTaGSCwt9Jm/7 Eco1Z1fR4bXviJ38I80mERcVapy+k/8if/rYR4f4hrGkfQqmhaPhz+MGuertzgO8Z0r5dF/jW/y 4/Z/BAd467ipEnEyXaAh1735CHckUxzc/5poWc/7utc0QJOd0biANjzmSRbaEqVjRYqMUHScbVN QI54/DBVJzkbu57Hkb6KY+FTt3r+bJCrKA= X-Received: by 2002:a05:6a00:4c99:b0:874:705d:f63f with SMTP id d2e1a72fcca58-87d1c1c839bmr1274917b3a.33.1790130002435; Tue, 22 Sep 2026 19:20:02 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.19.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:01 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 1/8] net: dsa: motorcomm: Remove YT921X_PORT_MASK_* macros Date: Wed, 23 Sep 2026 10:19:33 +0800 Message-ID: <20260923021945.2203368-2-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove YT921X_PORT_MASK_* macros since they are only thin wrappers around BIT() and GENMASK() and are not used in other places (plain BIT() and GENMASK() are used there). No functional change. Signed-off-by: David Yang Reviewed-by: Andrew Lunn --- drivers/net/dsa/motorcomm/chip.c | 31 +++++++++++++------------------ 1 file changed, 13 insertions(+), 18 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 8b0ac5fc8c8b..825e0bfcff86 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -108,46 +108,41 @@ struct yt921x_info { u16 external_mask; }; =20 -#define YT921X_PORT_MASK_INTn(port) BIT(port) -#define YT921X_PORT_MASK_INT0_n(n) GENMASK((n) - 1, 0) -#define YT921X_PORT_MASK_EXT0 BIT(8) -#define YT921X_PORT_MASK_EXT1 BIT(9) - static const struct yt921x_info yt921x_infos[] =3D { { "YT9215SC", YT9215_MAJOR, 1, 0, - YT921X_PORT_MASK_INT0_n(5), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + GENMASK(4, 0), + BIT(8) | BIT(9), }, { "YT9215S", YT9215_MAJOR, 2, 0, - YT921X_PORT_MASK_INT0_n(5), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + GENMASK(4, 0), + BIT(8) | BIT(9), }, { "YT9215RB", YT9215_MAJOR, 3, 0, - YT921X_PORT_MASK_INT0_n(5), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + GENMASK(4, 0), + BIT(8) | BIT(9), }, { "YT9214NB", YT9215_MAJOR, 3, 2, - YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + BIT(1) | BIT(3), + BIT(8) | BIT(9), }, { "YT9213NB", YT9215_MAJOR, 3, 3, - YT921X_PORT_MASK_INTn(1) | YT921X_PORT_MASK_INTn(3), - YT921X_PORT_MASK_EXT1, + BIT(1) | BIT(3), + BIT(9), }, { "YT9218N", YT9218_MAJOR, 0, 0, - YT921X_PORT_MASK_INT0_n(8), + GENMASK(7, 0), 0, }, { "YT9218MB", YT9218_MAJOR, 1, 0, - YT921X_PORT_MASK_INT0_n(8), - YT921X_PORT_MASK_EXT0 | YT921X_PORT_MASK_EXT1, + GENMASK(7, 0), + BIT(8) | BIT(9), }, {} }; --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f40.google.com (mail-pz2-f40.google.com [74.125.228.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF00B371D02 for ; Wed, 23 Sep 2026 02:20:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.40 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130008; cv=none; b=tVy7fb8+eMkqrYp1jjqbHZFLJbjtHFlqTDCo7oe+RWRWvjj7BTI4a8R25IHCGrc4STRxTD2gMV7M8+0ZEciGiX9sUcplYeOLDx3L0eLVo2p/b3X0oCoNQe/GTxq3UPutmtpAl3dmEVR7FbOWH3cUCeiX5GXjUAyi2a92Njp/0KU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130008; c=relaxed/simple; bh=fHT9kFUml1egySFJHRb80oN/JQKRCyXbPlu5X7ql9xo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TmF70SjHa/5nn+OKVlbLtTyGJKhXNBIzo284JM7CO6FSPBvYK9t96KixriYenS7R2swTz65UJmmSzRYupSCGOewAS9JhtusxfpoX+eOJKJrkdxZ2OeNJpvAEsb+OP+0+Eya71/30QNsD04lEI9utS9SOQPZDLOHXS5W+eeN/PO0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=oHvJHDo5; arc=none smtp.client-ip=74.125.228.40 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="oHvJHDo5" Received: by mail-pz2-f40.google.com with SMTP id d2e1a72fcca58-87ac7657a24so211183b3a.3 for ; Tue, 22 Sep 2026 19:20:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130006; x=1790734806; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=XVqUem5OVBG5DkuvgHi/WRrI10vrvDI5gxlD5SrAEXc=; b=oHvJHDo5nSjVHy90cni0+QmaEHizqL8oYg7lfikFh9lX1Un2EMQgM1MEMU8j8Rp5WJ 60QJ7lytCxu1SZ4lx9Uoy7t9ssa8CjSvEE/DnTtOM3sY7/0K4U2Eyr472kdAFwfEiSgV RwQZVHIcRjOsfUzPkg3kB7F/gI99Pw4GHZvDnEIHKTQO16biOEdG+nml1woeYzguJe5s h39X2BehdJ4uyOka/3QPz7QWT9GqGENHZHqNsIsF8AGP+dubg6Uj7eKNLdVabRcNmiid mbfx9yrPPvtIUW9cBjRNsIXw6dkckkv5bTfXqWQ/3cE36Ohd6JEsudSil7tKE2GJcmf7 dVrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130006; x=1790734806; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=XVqUem5OVBG5DkuvgHi/WRrI10vrvDI5gxlD5SrAEXc=; b=u+sdC3Pf4k9TIGkKW0wMTvc1Q614ZQ6XLjKwiwgxwN30Z10woBTq4tvQVWdbNlSY2k RzxU83CJBYszrXKJbNvjJ2eg3gwv6idE1ocy9AldKo3yeE0rXRj5+wnKY9bnK7ZKUVQn zvwu0HRlc80SgQ+ROZj3irIjcuZjG7pO0M+E3RGI2vD8qMTgEsEj//tdm8g+z97y38fC MYzE3g2FV3dnQ6fdS2QvTPAKh9fV9rbiHA3ws1Jm9hyH/BrSmLvyDswQ/dj9r8Tuu/uN rJZDu6gpealcZehKfnwdIo0htcXJKL3/MB2dudFq1fNy5qKZfw6bq9+0FIMxksqQ5s74 RGkA== X-Forwarded-Encrypted: i=1; AKwUvBzgPVtDBlV3rEoAwYBNBZ9+6/F7c/m7rCCzYah7X22ghrPfSnae7ZaksoMv25hqn0Vt/a3beCyfzyqP1PY=@vger.kernel.org X-Gm-Message-State: AFuF++nfSkrhBk3gwZmnDLmDs8Xqd9byBMkoiLgzxJ+5CjoC3utbKvRy +3J+iG8MPCUCcszbvyLz8I1Lc5bL9d7cc2GxgbMe3m5bO5tIAkZ5OERj X-Gm-Gg: AYBFou3GMPjFkwb3V4an9DYzbsEtcTy5zqv2GNwaUfsYeTrAtkGPEqMtld7lnkSDgnu Q9KMnPB4YoPxmNVWNNB63nuw1F78N//ClIT3FX4+mNbePqp/mc9MrJ+L8l7hWPKq/edvDinuUR5 rsWgdqsiWrKLTkXVUBoqR4Wfpqeo9zzsvPMSOXo2WkJxnmFt6D/KL8uTZoj3SoAG0dUolI6jrwj wHtKik/OdPf0E8fPsbIOmdH5nMzTzJiow05IMaVIp9nTZdM6H9DzaK+R3d64aU2SMCoOXa0vSat jkVHBUF0RduaeIjiBxjD0r8Lva9R7sWYoS6mqH3JUACQcl4b3WjkjPhhHSlc+2nLHIRN85zZC3l fzTcn/FGY1a3j0Pu2OnEHDZ3n/rtHtK/CR5eBqaXwvq+FNNg0kZ7O0dnr5uZps7pnTaI/2NUzGT 2gYcJ0rRxiQoIQIySQTtrlkwTnYr7aYPSBUEobZWmGihJgAH9amWLDzAwELtogG6m6FLrJIz/Vc 5R5x7oiwZ4X+ZWOPWbAg/hDE1ppDm1IcTc= X-Received: by 2002:a05:6a00:9512:b0:878:6ee:671c with SMTP id d2e1a72fcca58-87d1c9bcb2amr1188716b3a.30.1790130006145; Tue, 22 Sep 2026 19:20:06 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:05 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 2/8] net: dsa: motorcomm: Split xMII and SERDES port masks Date: Wed, 23 Sep 2026 10:19:34 +0800 Message-ID: <20260923021945.2203368-3-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Replace external_mask with xmii_mask and serdes_mask, and advertise the interface modes it actually supports. Also move struct yt921x_info into chip.h for future use. Signed-off-by: David Yang Reviewed-by: Andrew Lunn --- drivers/net/dsa/motorcomm/chip.c | 39 ++++++++++++-------------------- drivers/net/dsa/motorcomm/chip.h | 13 +++++++++++ 2 files changed, 27 insertions(+), 25 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 825e0bfcff86..54881856b796 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -96,53 +96,48 @@ static const struct yt921x_mib_desc yt921x_mib_descs[] = =3D { MIB_DESC(1, YT921X_MIB_DATA_TX_OAM, "TxOAM"), }; =20 -struct yt921x_info { - const char *name; - u16 major; - /* Unknown, seems to be plain enumeration */ - u8 mode; - u8 extmode; - /* Ports with integral GbE PHYs, not including MCU Port 10 */ - u16 internal_mask; - /* TODO: see comments in yt921x_dsa_phylink_get_caps() */ - u16 external_mask; -}; - static const struct yt921x_info yt921x_infos[] =3D { { "YT9215SC", YT9215_MAJOR, 1, 0, GENMASK(4, 0), + BIT(9), BIT(8) | BIT(9), }, { "YT9215S", YT9215_MAJOR, 2, 0, GENMASK(4, 0), - BIT(8) | BIT(9), + BIT(9), + BIT(8), }, { "YT9215RB", YT9215_MAJOR, 3, 0, GENMASK(4, 0), BIT(8) | BIT(9), + 0, }, { "YT9214NB", YT9215_MAJOR, 3, 2, BIT(1) | BIT(3), - BIT(8) | BIT(9), + BIT(9), + BIT(8), }, { "YT9213NB", YT9215_MAJOR, 3, 3, BIT(1) | BIT(3), BIT(9), + BIT(9), }, { "YT9218N", YT9218_MAJOR, 0, 0, GENMASK(7, 0), 0, + 0, }, { "YT9218MB", YT9218_MAJOR, 1, 0, GENMASK(7, 0), BIT(8) | BIT(9), + BIT(8) | BIT(9), }, {} }; @@ -4021,15 +4016,10 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, = int port, */ __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); - } else if (info->external_mask & BIT(port)) { - /* TODO: external ports may support SERDES only, XMII only, or - * SERDES + XMII depending on the chip. However, we can't get - * the accurate config table due to lack of document, thus - * we simply declare SERDES + XMII and rely on the correctness - * of devicetree for now. - */ + return; + } =20 - /* SERDES */ + if (BIT(port) & info->serdes_mask) { __set_bit(PHY_INTERFACE_MODE_SGMII, config->supported_interfaces); /* REVSGMII (SGMII in PHY role) should go here, once @@ -4042,9 +4032,8 @@ yt921x_dsa_phylink_get_caps(struct dsa_switch *ds, in= t port, __set_bit(PHY_INTERFACE_MODE_2500BASEX, config->supported_interfaces); config->mac_capabilities |=3D MAC_2500FD; - - /* XMII */ - + } + if (BIT(port) & info->xmii_mask) { /* Not tested. To add support for XMII: * - Add proper interface modes below * - Handle them in yt921x_port_config() diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 83cd454955dd..83e76cefbccd 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -960,6 +960,19 @@ struct yt921x_reg_ops { int (*write)(void *context, u32 reg, u32 val); }; =20 +struct yt921x_info { + const char *name; + u16 major; + /* Unknown, seems to be plain enumeration */ + u8 mode; + u8 extmode; + /* Ports with integral GbE PHYs, not including MCU Port 10 */ + u16 internal_mask; + /* Note: xmii_mask and serdes_mask may overlap */ + u16 xmii_mask; + u16 serdes_mask; +}; + struct yt921x_priv { struct dsa_switch ds; =20 --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f43.google.com (mail-pz2-f43.google.com [74.125.228.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFC9037CD2F for ; Wed, 23 Sep 2026 02:20:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130014; cv=none; b=QF6tDJiKZ1GifsznAkXbHb830IeK0WaJtdOWw9Z7qqiWoMDNNfX0XlGT5YyXT4kHy+DxNYFwNSiJiudqMNEnVPRuHFkjcWVQVqVfRsrjNd2jlyndD6y2m5CqjcJrc+t9UwOJaFUJAdshs0LpGsLVLW7dtOv7ACGfLhpIyFPj1Xw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130014; c=relaxed/simple; bh=mWRv0fUewWtvfdIm/iZol6Zv6zLYlS1qtrgbRxlFKwQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MtEQKEy1GiR2hwSOrtdrRrRqPCEB1e0D8iS7+ZduTr4Dz/ts++/MFVlDDybSgCOBEkKyLJr4IFqf/19dmVYtJG+hDwpHdJkACbQCQA2YLK2+iUva5D1KH1YGlUBwT0iB/krnQojU0Jjb4F/iQwnRVZh3gIYbXzmAH5O2vuzjyaA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=lNMLdo1J; arc=none smtp.client-ip=74.125.228.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="lNMLdo1J" Received: by mail-pz2-f43.google.com with SMTP id d2e1a72fcca58-85469d249c5so319405b3a.3 for ; Tue, 22 Sep 2026 19:20:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130010; x=1790734810; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=BXcSdB4eMNtobBEIQ28OELyVE1Use551bMoEsfYuMdA=; b=lNMLdo1JjZ1Ns9fxOlRdf5w0EdvtqZRs1b1vb5k5iHzZM7c1ATCiOK3bnUwdFU6nMt Vma56uodJZMfsNCLCJTnw2gnmONL4tzf9gjuIrPD6uP8zf8r5daMjx5kUVyH6U7qBC9z 0BmfwVjFGTMZ1afKebagdH4W7kgvZ2Zj0qvqqYol2YHtDY3fHgZeXhj3wmBh6ljdSdFc ttkLDuznAtoBbtnw2cMBBZ2X9B5qhLqeMZ6FgsFjSBfatt7LJvpvezOGsGdoqAl2meeN xuBl4dublWfxy8LPngMsVaPohPCEGY+vB+pemh0tHkHpc/B4cGgsKo0vzgo+2CDArJU1 aY+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130010; x=1790734810; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=BXcSdB4eMNtobBEIQ28OELyVE1Use551bMoEsfYuMdA=; b=0KLMUtPflQl482zj852qFClo0yh8g81impwzDuDBEiPXdew2ay2gzRgLqoPNYBtU1T iPY9HEU2NXQBRvQ3Mn9SxKk1h9tao1+veglq9YvTbPMrRU/eKT0cMVSEFsKmwLyozgE1 6PrXIzMie96m6UR84TzwaWjesqVAii9OlxMxk0zPIVPKpxSFOwbRGyOwJDB2ZUvTMvIp LI8uvOX9qj2kVClAVmCivDBATQIXov1ujxi7DLEBnMgAfyUiyC1udAUnkFFDp8U6saiU zDJNohMhcAj5RGpegjPCRXSM/I5WOozYuH8U+9U6t8dzEeAXPUTe+mfmxqHy0A7HKmaD 4Tmw== X-Forwarded-Encrypted: i=1; AKwUvBx2Nat+n8drjPVWrmAJVEplZxpXr1/IZGaHdbnTvzhhbhCkVfvQegL009kcho03vk123P2lKneYhUfzyaA=@vger.kernel.org X-Gm-Message-State: AFuF++lyx/RAjZbkBdJtWC/bU1g7m7IJ8CJeWBOVFVa93OUtQqRk9MfD ouO3tqpS8JE73N+rW6lOGUq1PJiGA0pgmLLISFWclCnHYK2HokxhNlZ7 X-Gm-Gg: AYBFou2xVfTk7k+hf7edouea6fzOEXyYK+pQ2s/et6vb+N+n1aa8ZcKeC4sApeenTV3 Csnlp/7oSbT1ZxAQhx5X4ah88Rq6bGdkujkWUCkqqXISrCFxWc3en7bghh+3QexcwkxoYYNu5Q1 nHpoRucAb++5ONJjOg8oWIBmiNd3swHrmXNHy/3QJ9fLQX1GauWaTNjRj7IY4XJlkOH45rID8mi Ln9I3UBnAQvMCQgIPFj9lJa1BZ4cyEOiu6cl6Z3+ujZRddIwH60ZyhsefIQp3V6crVzO2ewENuJ ud7jB8J99i535g7C9E9C9rpbjyX/OeYK7FpIWiMje9cItV36UiyXepkyL8eDfuIc/RINKXY6ydy GPGBZ+YTyP3oez11auCjwjnYOFs1ZeXxcxcU0RZGexdfNbOBjnh5am4oPSB75B//W1znFChCJi0 qAgZ2ErsiiraROKt+aOdZjs8bXu46n/hk8a54Zbtl9k7N5j0lugHWB3TAasPNMYptoTrvkwqz9L qYps7KdE9CNNAgl9XWGFNRP X-Received: by 2002:a05:6a00:ab0f:b0:874:706d:8570 with SMTP id d2e1a72fcca58-87d1c3b6b7amr1124034b3a.33.1790130010269; Tue, 22 Sep 2026 19:20:10 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:09 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 3/8] net: dsa: motorcomm: Identify port type at runtime Date: Wed, 23 Sep 2026 10:19:35 +0800 Message-ID: <20260923021945.2203368-4-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The yt921x_port_is_internal/external() macros hardcoded the port layout: they treat ports 8 and 9 as external on every chip and count the dummy ports as internal. Identify the actual port capabilities using chip info and track configuration of external ports (although only SerDes is supported now). This is a hardening and cleanup step ahead of the SerDes PCS support, no behavior changes intended. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 40 +++++++++++++++++++++++--------- drivers/net/dsa/motorcomm/chip.h | 11 +++++---- 2 files changed, 35 insertions(+), 16 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 54881856b796..ea4b29882b5c 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -3738,6 +3738,7 @@ yt921x_dsa_port_set_apptrust(struct dsa_switch *ds, i= nt port, const u8 *sel, =20 static int yt921x_port_down(struct yt921x_priv *priv, int port) { + const struct yt921x_info *info =3D priv->info; u32 mask; int res; =20 @@ -3746,12 +3747,13 @@ static int yt921x_port_down(struct yt921x_priv *pri= v, int port) if (res) return res; =20 - if (yt921x_port_is_external(port)) { + if (BIT(port) & info->serdes_mask) { mask =3D YT921X_SERDES_LINK; res =3D yt921x_reg_clear_bits(priv, YT921X_SERDESn(port), mask); if (res) return res; - + } + if (BIT(port) & info->xmii_mask) { mask =3D YT921X_XMII_LINK; res =3D yt921x_reg_clear_bits(priv, YT921X_XMIIn(port), mask); if (res) @@ -3766,6 +3768,8 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, phy_interface_t interface, int speed, int duplex, bool tx_pause, bool rx_pause) { + const struct yt921x_info *info =3D priv->info; + struct yt921x_port *pp =3D &priv->ports[port]; u32 mask; u32 ctrl; int res; @@ -3800,7 +3804,10 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, if (res) return res; =20 - if (yt921x_port_is_external(port)) { + if (!(BIT(port) & (info->serdes_mask | info->xmii_mask))) + return 0; + + if (pp->serdes) { mask =3D YT921X_SERDES_SPEED_M; switch (speed) { case SPEED_10: @@ -3836,7 +3843,7 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, mask, ctrl); if (res) return res; - + } else { mask =3D YT921X_XMII_LINK; res =3D yt921x_reg_set_bits(priv, YT921X_XMIIn(port), mask); if (res) @@ -3876,17 +3883,16 @@ static int yt921x_port_config(struct yt921x_priv *priv, int port, unsigned int mode, phy_interface_t interface) { + const struct yt921x_info *info =3D priv->info; + struct yt921x_port *pp =3D &priv->ports[port]; struct device *dev =3D to_device(priv); u32 mask; u32 ctrl; int res; =20 - if (!yt921x_port_is_external(port)) { - if (interface !=3D PHY_INTERFACE_MODE_INTERNAL) { - dev_err(dev, "Wrong mode %d on port %d\n", - interface, port); - return -EINVAL; - } + if (BIT(port) & info->internal_mask) { + if (interface !=3D PHY_INTERFACE_MODE_INTERNAL) + goto err; return 0; } =20 @@ -3896,6 +3902,9 @@ yt921x_port_config(struct yt921x_priv *priv, int port= , unsigned int mode, case PHY_INTERFACE_MODE_100BASEX: case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_2500BASEX: + if (!(BIT(port) & info->serdes_mask)) + goto err; + mask =3D YT921X_SERDES_CTRL_PORTn(port); res =3D yt921x_reg_set_bits(priv, YT921X_SERDES_CTRL, mask); if (res) @@ -3906,6 +3915,11 @@ yt921x_port_config(struct yt921x_priv *priv, int por= t, unsigned int mode, if (res) return res; =20 + /* The order is quite arbitrary - we can't return to a safe + * state on IO errors. + */ + pp->serdes =3D true; + mask =3D YT921X_SERDES_MODE_M; switch (interface) { case PHY_INTERFACE_MODE_SGMII: @@ -3931,10 +3945,14 @@ yt921x_port_config(struct yt921x_priv *priv, int po= rt, unsigned int mode, break; /* add XMII support here */ default: - return -EINVAL; + goto err; } =20 return 0; + +err: + dev_err(dev, "Wrong mode %d on port %d\n", interface, port); + return -EINVAL; } =20 static void diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 83e76cefbccd..fd552f7dced4 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -858,9 +858,6 @@ enum yt921x_fdb_entry_status { =20 #define YT921X_NAME "yt921x" =20 -#define yt921x_port_is_internal(port) ((port) < 8) -#define yt921x_port_is_external(port) ((port) =3D=3D 8 || (port) =3D=3D 9) - struct yt921x_mib { u64 rx_broadcast; u64 rx_pause; @@ -936,8 +933,12 @@ struct yt921x_acl_blk { struct yt921x_port { unsigned char index; =20 - bool hairpin; - bool isolated; + /* SerDes in use */ + bool serdes:1; + /* BR_HAIRPIN_MODE */ + bool hairpin:1; + /* BR_ISOLATED */ + bool isolated:1; =20 struct delayed_work mib_read; struct yt921x_mib mib; --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f12.google.com (mail-pz2-f12.google.com [74.125.228.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADFEA37E5F2 for ; Wed, 23 Sep 2026 02:20:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130016; cv=none; b=WrH51Fusv5+fDa9K5qUe+LaLxwT07QwGcChqUO5HKK05/42wmwNrGHYoPE0WtCwDo34ETUVW81vesPAVImlqqLejDClvHZ4xLbGQqirIMuZTGlC5s8H5qnNTu4et0OfulG2n1bmpeHtUj0WkznkPxu2Dio6JUlCPdUCjOvfZ5qw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130016; c=relaxed/simple; bh=+2bw9YYH/ysY8b+Uxn2uSh36zJURPPMfdZQVHtkzt+w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Jh3TgjSPe+x1AjA2q0gSiRL6AOi3+cxl+fjDCETpkfw7QdIDij526NLCBGDWr8tWhSaGtSY+NxbL6lnTMC9pReRQqAQje2hWd9OdbfANrrp8jUvnwN4jkU3Q5t7dnsI8fUOmv18H0bCrnL8MEpRaxEmDle191FmIs/VSihYLiLk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=gRItkmve; arc=none smtp.client-ip=74.125.228.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gRItkmve" Received: by mail-pz2-f12.google.com with SMTP id 41be03b00d2f7-cc1cebcb8d7so182987a12.0 for ; Tue, 22 Sep 2026 19:20:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130014; x=1790734814; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=uxrKOcoxhEURAlkIAb3tuWb2mfFnLgLdoNfRqIX5q8E=; b=gRItkmveDRXqa7Ylht+NB7CZuKHvmARiCKvEh9CQW5qHsLH3hUn1jJYzzUEEKjdvDa OOPoUVGRb+zGdOvpHOZ2ft4wq+Ag4oynRxstoBDqeyQgnL6u8ufj8m7NVo42gOPWgY8z yHwhl/weYh6CJoxEdGQHMhjHDij3/LS3N3bSSNAFj/ZAkeE10dmipue/2Q6qrRsVOdL5 iGYGJj1jF8exP6pjxELy05zD35z6JN53VZwAHtmupbBRUeBSOVv5yCmVwy3zuwI5soTS XuLHKPmZ6kMoespxmzyqLeOnadtEgJES0pqhqvNm078SntCHScsbPr47fmDUc1NBsNeK fcbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130014; x=1790734814; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=uxrKOcoxhEURAlkIAb3tuWb2mfFnLgLdoNfRqIX5q8E=; b=2ibs90WB+WPQu5WAgBa0gUyU6WKlyIMvUYXBiPB8zzHHcP//h9rYbHJoYSyd6D+tKf q9CzfihUm8551bFLPZfX7pMpHju534mdzSFKh0LKOm9d0+dNZR1v5RGCcvPWXo14swfo esQDKVhLY04NhCptRGOxgDfDoegbMik0pOsBHSkTtoSSXe6NBMy17/IIU7f0qXPA94PT 6/RBczqBUgJFyPUNgeX4AHRej0zn31+PwDYN3xWuyQp9IJ/zxiJood2TBG7uWqozautd EXU2WaJW21iEwt5EhhOp9+AJa+POJXDhkPbz5yRcVVI22FeNNHswsLAuqz7Z/NeXjnDd 2jwQ== X-Forwarded-Encrypted: i=1; AKwUvBwB9m3z8VV3xHdnIgMg4Q+SQ/BSBm28GxsaT1kxAAcKNoFPBCg7mMPsVKDmBsZI0s4tWPt/V9gryy/KBPc=@vger.kernel.org X-Gm-Message-State: AFuF++mXBSHg3qRQYz1RvoyrOtJFZFPIAtBEeB24jbaUcbj6UUS507ed KBrjCrRyQBLQpb2pw6sp5jsoChKzy5nzCc0A/TaR77+se4BpRDMcPKa/ X-Gm-Gg: AYBFou1fJnMXCWR/Sj6SA2gp1zOd4YetiBMXpHfMZocaTTYGooP3AdufYPblgGy1Xeg XUwpjJ7zkhxRXA6yu1JAkokbXkBU1NX10ZOZk+7A34hKu81OQR4ZvblLC5s/VmY+9TiIWRDcDLV CfU46sTxkidLnbaY/+wgKVZJpubQVz3tGasN/aSwF8ZOF/dinlNF8W+SbrxtdIxS9eylEqXsJyd +hI2SEvS6K2QKCCSsIGgqlSB9IAJUSjBZ8sKL2UB6rPgC778m+lPJRFD4HOPIFA+tswlAaPz8fP FQBn40mon4SaNKnd1o6MblxF5GP9QT5kQbIrIuPovZ/tmsTlnLTqWyiFtdLf6Yq+hA5NV1b3dQs +S+VPCWKY1oLYK0npMqTLaXxq1OldfWarxjB167eEuPR6QvdzsIYjNM6lJzvzp23Cuxhx7/YZni WWntc6zI8WxO7UJtsVOtDiAtCplzY0vzpqN6TTSyCkDptd95X1+CF69wtEhP42XdqleU0B58edK 4jWRuWfoJlbLZjDNlvdNNl8 X-Received: by 2002:a05:6a21:ed0d:b0:3dd:a008:575d with SMTP id adf61e73a8af0-3ddf82fdb3fmr826347637.27.1790130013883; Tue, 22 Sep 2026 19:20:13 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:13 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 4/8] net: dsa: motorcomm: Fix register bit field names Date: Wed, 23 Sep 2026 10:19:36 +0800 Message-ID: <20260923021945.2203368-5-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Review and fix the incorrectness in the bit field names. No functional change. Signed-off-by: David Yang Reviewed-by: Andrew Lunn --- drivers/net/dsa/motorcomm/chip.c | 3 ++- drivers/net/dsa/motorcomm/chip.h | 9 +++++---- 2 files changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index ea4b29882b5c..f22c37e0b5bc 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -3742,7 +3742,8 @@ static int yt921x_port_down(struct yt921x_priv *priv,= int port) u32 mask; int res; =20 - mask =3D YT921X_PORT_LINK | YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN; + mask =3D YT921X_PORT_CTRL_LINK_AN | YT921X_PORT_RX_MAC_EN | + YT921X_PORT_TX_MAC_EN; res =3D yt921x_reg_clear_bits(priv, YT921X_PORTn_CTRL(port), mask); if (res) return res; diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index fd552f7dced4..3fb0c6a69dd8 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -42,7 +42,7 @@ #define YT921X_PVID_SEL 0x80014 #define YT921X_PVID_SEL_SVID_PORTn(port) BIT(port) #define YT921X_SERDES_CTRL 0x80028 -#define YT921X_SERDES_CTRL_PORTn_TEST(port) BIT((port) - 3) +#define YT921X_SERDES_CTRL_TEST BIT(6) #define YT921X_SERDES_CTRL_PORTn(port) BIT((port) - 8) #define YT921X_IO_LEVEL 0x80030 #define YT9215_IO_LEVEL_NORMAL_M GENMASK(5, 4) @@ -94,11 +94,12 @@ #define YT921X_SERDES_SPEED_1000 YT921X_SERDES_SPEED(2) #define YT921X_SERDES_SPEED_10000 YT921X_SERDES_SPEED(3) #define YT921X_SERDES_SPEED_2500 YT921X_SERDES_SPEED(4) -#define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) +#define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) /* Bit 7-0 shared= with PORT_STATUS */ #define YT921X_PORT_CTRL_PAUSE_AN BIT(10) +#define YT921X_PORT_CTRL_LINK_AN BIT(9) +#define YT921X_PORT_CTRL_HALF_PAUSE BIT(8) /* Half-duplex back pressure= mode */ #define YT921X_PORTn_STATUS(port) (0x80200 + 4 * (port)) -#define YT921X_PORT_LINK BIT(9) /* CTRL: auto negotiation */ -#define YT921X_PORT_HALF_PAUSE BIT(8) /* Half-duplex back pressure mod= e */ +#define YT921X_PORT_LINK BIT(8) #define YT921X_PORT_DUPLEX_FULL BIT(7) #define YT921X_PORT_RX_PAUSE BIT(6) #define YT921X_PORT_TX_PAUSE BIT(5) --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f12.google.com (mail-pz2-f12.google.com [74.125.228.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EAC8A382F1A for ; Wed, 23 Sep 2026 02:20:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130019; cv=none; b=QkBIGRM7B0o2rqE2tSWYXpBUrpyFkqCZUxT+m0hIXjEJ87OBEIHYMgv78zQyBgeYDoK8YdnP0IsjIge8Ci6syAD2NNRIToYklNqiBWTwdBgpq/7nYCgJgO5S8sZ5eSHNaTwtsR6ehhhC16dIWfQk8mF9PwuhPf1c2ekfZ4Zj1FI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130019; c=relaxed/simple; bh=uV7nskBIpDf7b1+sE//lNQT9qbsMS4sKk4qV93w23WA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AOE1IE3XX0kfmyarJrCIIGGwqwO1fUcmxymM35zgS1YHTa7NpkVLfutxgF3xgDK3iTvPzDD+3QbQaOdw11fehm7/JCrrWMjz0EdTkXzyF5p9024sqy1mCPtaZJ15t1RKzgyybzwG9tTPI15ZmEUNvyWThv9h4XmRcECByUBEf6M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=grFyNKhA; arc=none smtp.client-ip=74.125.228.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="grFyNKhA" Received: by mail-pz2-f12.google.com with SMTP id d2e1a72fcca58-868cfc5c244so200990b3a.3 for ; Tue, 22 Sep 2026 19:20:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130017; x=1790734817; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=HRv54spnuBOKi0zqhyEPtOohGBUa24TYUK5n/dGkrGo=; b=grFyNKhAJhe9Ndg+uxNVvQ8Q204vzfb2H3ZdbgREsvyboDlRlBghfvBFbwTSUpa/+O c9uL+qqN6Ou2PV/gQCi3k3un2V7d94cquBlxSxbsImXRLnqiBe+OKgnhms+tm9jMd/Oa Q6bNAnQeVuXeHF67Fyu/2JPJ1tuSJ3bE533kS0bIgdnZc5y34H9Y9oKn3E2UyeWdxCn7 tQNHLIIoHpSnYnfnLKF3vxtCC3ejgauBtjK00MdQEnzpzLOKojQEdH1imax6ajs3/SAg CmQfVpedckpUsLl2ghosKLlFkARec4zs3pS0neuxyzxR6Ausib66SHVKTNqogZKdQinA gFtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130017; x=1790734817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=HRv54spnuBOKi0zqhyEPtOohGBUa24TYUK5n/dGkrGo=; b=rsUmx5ZPO9fVmPfumLYXyE7QB7uzuanXQVldsQWPjm0WuowDC4lO7GaMAKVOqJoxZo pqQ4yq/pLSazm12Ha3a9BOUIK/cX2mbUVwyjVmU0+rGiEbVJijQiDVE6xdrVGyRNXmuG Ul1lxE1Wf7OZDOoVgc8Z6TAkQOiSfqUfTC1ZRIQyTAWMJQCjVwWNoDr2sdSisZiq+HTc hO+BSa10Vvu76As9Eut6Ch1wc6TBi6e627z3PrMJZZYu0J5uwS7Iy8Lx6tcCfT6srhFS 2ViIZk6jBbF8uBM9L5vxaMiGXDEBYJtYTgXJDOmXNwilg8m9WvdVK/e5vw7XwBrs7WS4 QJSw== X-Forwarded-Encrypted: i=1; AKwUvBzTV8oGKXco9qHDdAJTxs8s9eQ7au5WtQv7jYgGCq09D0dhHGQEomJw78a+KZnBVplNfgexf6+nOHZ1Sl8=@vger.kernel.org X-Gm-Message-State: AFuF++khGHzYgPFpeVXkTuilmY1RSrDlJZNicoF5Vx0nKIAJXAtprBmT sUaIuArqHug4Yt1vg7hHmq3W6tgojxr57dkq9etBvS31nAQ3YwT92bez X-Gm-Gg: AYBFou01NODRioFnvDjvJL7a2dBjQr4hDW2Uf+DO/jATGG4JHuvXkYFls5GRQ3z4hmv Jg12ldcXMjc0xsZU47kS/yUNwDfx+vGgpzks0BakS8me0XOJGv+k6AjSstBxhSsK6xTTbIdEhrI YQHd/wjVMrk0OJxkgVuqyeEPnyALumotrTzzIkk77sXA1yN/C9xslTAV/jDq5ikwmynqmgXXzhm NKeLjd8lVREM8ctF8u/wa4bLto5V9Hn1LHCQQ9ZQAp6ByqIolsFqj8hbysYczjzWHUUo8HsZ1t4 d0YAC7GOsQvA2N2J0O0AcUYdV2uFdFz+WruxY6WZYlBIiDWw3/u219QTYHtF+xSsCVoWqMQS8zQ kB1OcU2+OWFVeAq7y754SCyzhqb6abOZUkv2POOLPHa17CvcIkrv+xXlV6ykqf2QHPx3XPPfCCF vV9Cp4v6rFG3MHGemJB8ZpKYJVCgZtgh4WZU/b7q2GUc2bJcvt0BQzmnLGPLvEX35e09rIHIE2G xnRMmG47X9SgH1v9RWKqOjGK8rLlvNFB3M= X-Received: by 2002:a05:6a00:35c6:b0:858:b809:6ec0 with SMTP id d2e1a72fcca58-87d1b2b0ccamr1194044b3a.23.1790130017235; Tue, 22 Sep 2026 19:20:17 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:16 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 5/8] net: dsa: motorcomm: Introduce yt921x_speed Date: Wed, 23 Sep 2026 10:19:37 +0800 Message-ID: <20260923021945.2203368-6-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" FIELD_PREP values cannot be used as case labels. Introduce enum for future use. Signed-off-by: David Yang --- drivers/net/dsa/motorcomm/chip.c | 62 ++++---------------------------- drivers/net/dsa/motorcomm/chip.h | 43 ++++++++++++++-------- 2 files changed, 34 insertions(+), 71 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index f22c37e0b5bc..06e2c60b415f 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -3771,29 +3771,15 @@ yt921x_port_up(struct yt921x_priv *priv, int port, = unsigned int mode, { const struct yt921x_info *info =3D priv->info; struct yt921x_port *pp =3D &priv->ports[port]; + int ps =3D ethtool_speed_to_yt921x(speed); u32 mask; u32 ctrl; int res; =20 - switch (speed) { - case SPEED_10: - ctrl =3D YT921X_PORT_SPEED_10; - break; - case SPEED_100: - ctrl =3D YT921X_PORT_SPEED_100; - break; - case SPEED_1000: - ctrl =3D YT921X_PORT_SPEED_1000; - break; - case SPEED_2500: - ctrl =3D YT921X_PORT_SPEED_2500; - break; - case SPEED_10000: - ctrl =3D YT921X_PORT_SPEED_10000; - break; - default: + if (ps =3D=3D YT921X_SPEED_INVALID) return -EINVAL; - } + + ctrl =3D YT921X_PORT_SPEED(ps); if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_PORT_DUPLEX_FULL; if (tx_pause) @@ -3810,25 +3796,7 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, =20 if (pp->serdes) { mask =3D YT921X_SERDES_SPEED_M; - switch (speed) { - case SPEED_10: - ctrl =3D YT921X_SERDES_SPEED_10; - break; - case SPEED_100: - ctrl =3D YT921X_SERDES_SPEED_100; - break; - case SPEED_1000: - ctrl =3D YT921X_SERDES_SPEED_1000; - break; - case SPEED_2500: - ctrl =3D YT921X_SERDES_SPEED_2500; - break; - case SPEED_10000: - ctrl =3D YT921X_SERDES_SPEED_10000; - break; - default: - return -EINVAL; - } + ctrl =3D YT921X_SERDES_SPEED(ps); mask |=3D YT921X_SERDES_DUPLEX_FULL; if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_SERDES_DUPLEX_FULL; @@ -3850,25 +3818,7 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, if (res) return res; =20 - switch (speed) { - case SPEED_10: - ctrl =3D YT921X_MDIO_POLLING_SPEED_10; - break; - case SPEED_100: - ctrl =3D YT921X_MDIO_POLLING_SPEED_100; - break; - case SPEED_1000: - ctrl =3D YT921X_MDIO_POLLING_SPEED_1000; - break; - case SPEED_2500: - ctrl =3D YT921X_MDIO_POLLING_SPEED_2500; - break; - case SPEED_10000: - ctrl =3D YT921X_MDIO_POLLING_SPEED_10000; - break; - default: - return -EINVAL; - } + ctrl =3D YT921X_MDIO_POLLING_SPEED(ps); if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_MDIO_POLLING_DUPLEX_FULL; ctrl |=3D YT921X_MDIO_POLLING_LINK; diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 3fb0c6a69dd8..30d131eb9844 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -89,11 +89,6 @@ #define YT921X_SERDES_DUPLEX_FULL BIT(3) #define YT921X_SERDES_SPEED_M GENMASK(2, 0) #define YT921X_SERDES_SPEED(x) FIELD_PREP(YT921X_SERDES_SPEED_M, (x)) -#define YT921X_SERDES_SPEED_10 YT921X_SERDES_SPEED(0) -#define YT921X_SERDES_SPEED_100 YT921X_SERDES_SPEED(1) -#define YT921X_SERDES_SPEED_1000 YT921X_SERDES_SPEED(2) -#define YT921X_SERDES_SPEED_10000 YT921X_SERDES_SPEED(3) -#define YT921X_SERDES_SPEED_2500 YT921X_SERDES_SPEED(4) #define YT921X_PORTn_CTRL(port) (0x80100 + 4 * (port)) /* Bit 7-0 shared= with PORT_STATUS */ #define YT921X_PORT_CTRL_PAUSE_AN BIT(10) #define YT921X_PORT_CTRL_LINK_AN BIT(9) @@ -107,11 +102,6 @@ #define YT921X_PORT_TX_MAC_EN BIT(3) #define YT921X_PORT_SPEED_M GENMASK(2, 0) #define YT921X_PORT_SPEED(x) FIELD_PREP(YT921X_PORT_SPEED_M, (x)) -#define YT921X_PORT_SPEED_10 YT921X_PORT_SPEED(0) -#define YT921X_PORT_SPEED_100 YT921X_PORT_SPEED(1) -#define YT921X_PORT_SPEED_1000 YT921X_PORT_SPEED(2) -#define YT921X_PORT_SPEED_10000 YT921X_PORT_SPEED(3) -#define YT921X_PORT_SPEED_2500 YT921X_PORT_SPEED(4) #define YT921X_PON_STRAP_FUNC 0x80320 #define YT921X_PON_STRAP_VAL 0x80324 #define YT921X_PON_STRAP_CAP 0x80328 @@ -122,11 +112,16 @@ #define YT921X_MDIO_POLLING_LINK BIT(3) #define YT921X_MDIO_POLLING_SPEED_M GENMASK(2, 0) #define YT921X_MDIO_POLLING_SPEED(x) FIELD_PREP(YT921X_MDIO_POLLING_SP= EED_M, (x)) -#define YT921X_MDIO_POLLING_SPEED_10 YT921X_MDIO_POLLING_SPEED(0) -#define YT921X_MDIO_POLLING_SPEED_100 YT921X_MDIO_POLLING_SPEED(1) -#define YT921X_MDIO_POLLING_SPEED_1000 YT921X_MDIO_POLLING_SPEED(2) -#define YT921X_MDIO_POLLING_SPEED_10000 YT921X_MDIO_POLLING_SPEED(3) -#define YT921X_MDIO_POLLING_SPEED_2500 YT921X_MDIO_POLLING_SPEED(4) + +enum yt921x_speed { + YT921X_SPEED_10, + YT921X_SPEED_100, + YT921X_SPEED_1000, + YT921X_SPEED_10000, + YT921X_SPEED_2500, + YT921X_SPEED_INVALID +}; + #define YT921X_SENSOR 0x8036c #define YT921X_SENSOR_TEMP BIT(18) #define YT921X_TEMP 0x80374 @@ -1004,4 +999,22 @@ struct yt921x_priv { struct yt921x_acl_blk *acl_blks[YT921X_ACL_BLK_NUM]; }; =20 +static inline int ethtool_speed_to_yt921x(int speed) +{ + switch (speed) { + case SPEED_10: + return YT921X_SPEED_10; + case SPEED_100: + return YT921X_SPEED_100; + case SPEED_1000: + return YT921X_SPEED_1000; + case SPEED_2500: + return YT921X_SPEED_2500; + case SPEED_10000: + return YT921X_SPEED_10000; + default: + return YT921X_SPEED_INVALID; + } +} + #endif --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f12.google.com (mail-pz2-f12.google.com [74.125.228.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7850437D10E for ; Wed, 23 Sep 2026 02:20:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130023; cv=none; b=hcY5nGTeag2OBm0/B7dpZf5l/weUNeZxA5wWFIrcPaLh8mBcHhYdkeIsOGJC3azChsZT+uD/D5KfJUN/fLDqoi+IQ9n0yWJE2689G1uxOlBE8/aGwoi+OXjIzGb0mhHcjhihKfByrYctdzwR3VmKCVntbLDxZnWH4db66WPzl4o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130023; c=relaxed/simple; bh=Xomkn+Srsksc9rJ4hB1Sw80030NagAwzSURN/+X4zrE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Bj4sJg98M7PWGYEtjW2q/iNjYsOe6v51GP1FYr9eXao/cjRLo16ghtoSgnvOy7vnPP3JqIXWfbTnwHQQBO1QRFc/ZblLeR2gbqWmMmeAGc4WJXN0nKjM/Hjhms4JBdtQaKb4P/UiQykfOyjWKYm7N5MMKhI+hN+rLopCPqyoQfM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=QbfMBNmy; arc=none smtp.client-ip=74.125.228.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QbfMBNmy" Received: by mail-pz2-f12.google.com with SMTP id d2e1a72fcca58-8686f46e4adso369244b3a.0 for ; Tue, 22 Sep 2026 19:20:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130022; x=1790734822; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=PwBq1Y5sOSoRLLcFFPEkua7arDxpIQDc0k7JtosP1rk=; b=QbfMBNmyeQlQj2lae2UC1CT5KCtaayh0tOaY2puZqROPVQYL1XaamNVlEuZRM7iCJq 8cwKFUB/J4otdK609eG5VNoBbqwbFQzQqTTBZyVQgnRJZ0mauZlFdWu5IHoJx/hUZA20 KxEo4KIgBSc44gXaLGZWor0OYqntnEQhBq2xtASIYoS59EeYZPBjW2Txv5vnIJPXOUkU n178KmGLbzVSnLs+LBAUyjq7/Ms80UE7OfLK6cEJ+ZhJTG9ZXDKPu2PhCnue3ABOIA2P NM0NX6ugiXqAfMMGkrDMvsGE6G+nvIpz6i1QZteFF8wSIQVP9//VRzeGtjsejJIoxbrR 88cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130022; x=1790734822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=PwBq1Y5sOSoRLLcFFPEkua7arDxpIQDc0k7JtosP1rk=; b=llw0AjEtO/BzkosXZOHvDX8DBsILc81Y1zctY5YRKsykpVn+TFV6gtPsxerAXKH+4c XFN0bHkw3YpMWJTK/OXgC7/1aIst8EBELKv/PDmq8nkOPjDyHjdgQTCJ6xKx/MjyYed4 AFLwCbIP+vt9lD/at73ljZUdlt/z3estkmQ+P53GXiodaLECveUpdOzN4/3Ycw3m4QuN 6TveNqFHuf27xBz2Qzu6937XYEgsLhoyBuyGcgVVnHqZ0jeCT7LzIPuElFwhdHEAl4po MxU2rBVy+X2ddnPrfNWZrNOYeFnhzYr9MEC/XrpTjkiIqVb+9gmDKHmrckFAzRuVU932 Xl/g== X-Forwarded-Encrypted: i=1; AKwUvBx5sa2Zk/GE+FHcXXw2Ri2E+GnqvuNVdO4bBnPDvkfwhtnQgWCPXY7owXlzwvFOfsWCV8hWryg4qIP8w50=@vger.kernel.org X-Gm-Message-State: AFuF++n/OxMp9gc/CcuDmYywMuxPsx8V8cgH4C8k8KPPWfszvwk8YWD6 SjlPdG93bPgy4f5bZc8iObMPkQpwhWP7WyIXSMoLGNLvpHg8oIRZP9FA X-Gm-Gg: AYBFou1b8fq9iuuHZGageLc1jL+bKJGN7HZMW3q4XZYwFJvQXEM5GZxwnVpS9bC86MI YWW6+AIl5Ifk6Uvc1DB/gJeu67knBqm2rylS2VXaFsVRLuGziIEQm5ynSg0r9/Dix+xkKIizQZu KA65hPmrkcw0kr/Iv11RAuJe34QD1O3eIb8n3bWAzLhUe8oBc5AY4Hse1RT9tPQ0G9x9I2RkBlk QqTw+j0gXnYZtnlLOzECcN5xKzH0DQspKyLLjdd4b51pYs4J+ar/aYVP82TE0c3kDku23KgpUhs kttn8HL1j2jHxKNX4+rgrni1hLlj3tR05e3wjmVy6UF/feskVx+0MVP1SYfRX/rmi6rVzHPtPQI x2RUStyRIxRrAHbJE+haWeR++Od9YxZJcUJgHz0tNPiWOf6th4vvfjk2YtPIJ0OtS6UNKMKPOwE /qZRV+FYwm78gSM/k4OurMt18au8WdfIzPV5noU2eTNUM6UaJaQSk2u3ce9692BPVCD+Lja4IQi yYL38fYfgS+Q3e6nI9Z1mL8NIh8jfC2voTH5k03YtXnkg== X-Received: by 2002:a05:6a00:bb0e:b0:878:34d7:6a2f with SMTP id d2e1a72fcca58-87d1cdc1447mr1088739b3a.49.1790130021643; Tue, 22 Sep 2026 19:20:21 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:21 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 6/8] net: dsa: motorcomm: Hoist port_to_priv helper into chip.h Date: Wed, 23 Sep 2026 10:19:38 +0800 Message-ID: <20260923021945.2203368-7-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" yt921x_poll_mib() open-codes the same container_of_const() expression that leds.c defines as to_yt921x_priv(). Move the macro to chip.h as yt921x_port_to_priv() so both files use one definition. Signed-off-by: David Yang Reviewed-by: Andrew Lunn --- drivers/net/dsa/motorcomm/chip.c | 3 +-- drivers/net/dsa/motorcomm/chip.h | 3 +++ drivers/net/dsa/motorcomm/leds.c | 14 ++++++-------- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 06e2c60b415f..ee433f1e1b58 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -598,9 +598,8 @@ static void yt921x_poll_mib(struct work_struct *work) { struct yt921x_port *pp =3D container_of_const(work, struct yt921x_port, mib_read.work); - struct yt921x_priv *priv =3D (void *)(pp - pp->index) - - offsetof(struct yt921x_priv, ports); unsigned long delay =3D YT921X_STATS_INTERVAL_JIFFIES; + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int port =3D pp->index; int res; =20 diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 30d131eb9844..6a9fb27ddfb7 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -999,6 +999,9 @@ struct yt921x_priv { struct yt921x_acl_blk *acl_blks[YT921X_ACL_BLK_NUM]; }; =20 +#define yt921x_port_to_priv(pp) \ + container_of_const((pp), struct yt921x_priv, ports[(pp)->index]) + static inline int ethtool_speed_to_yt921x(int speed) { switch (speed) { diff --git a/drivers/net/dsa/motorcomm/leds.c b/drivers/net/dsa/motorcomm/l= eds.c index 0e8761f37995..6613fe3b0471 100644 --- a/drivers/net/dsa/motorcomm/leds.c +++ b/drivers/net/dsa/motorcomm/leds.c @@ -12,8 +12,6 @@ #define to_yt921x_led(led_cdev) \ container_of_const((led_cdev), struct yt921x_led, cdev) #define to_yt921x_port(led) ((led)->port) -#define to_yt921x_priv(pp) \ - container_of_const((pp), struct yt921x_priv, ports[(pp)->index]) #define to_device(priv) ((priv)->ds.dev) =20 static u32 yt921x_led_regaddr(struct yt921x_priv *priv, int port, int grou= p) @@ -321,7 +319,7 @@ yt921x_cled_brightness_set_blocking(struct led_classdev= *led_cdev, { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); @@ -337,7 +335,7 @@ yt921x_cled_blink_set(struct led_classdev *led_cdev, un= signed long *delay_on, { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); @@ -353,7 +351,7 @@ yt921x_cled_hw_control_get_device(struct led_classdev *= led_cdev) { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); struct dsa_port *dp; =20 dp =3D dsa_to_port(&priv->ds, pp->index); @@ -374,7 +372,7 @@ yt921x_cled_hw_control_is_supported(struct led_classdev= *led_cdev, { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); =20 if (yt921x_led_trigger_is_supported(priv, pp->index, led->group, flags)) return 0; @@ -386,7 +384,7 @@ yt921x_cled_hw_control_get(struct led_classdev *led_cde= v, unsigned long *flagsp) { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); @@ -401,7 +399,7 @@ yt921x_cled_hw_control_set(struct led_classdev *led_cde= v, unsigned long flags) { struct yt921x_led *led =3D to_yt921x_led(led_cdev); struct yt921x_port *pp =3D to_yt921x_port(led); - struct yt921x_priv *priv =3D to_yt921x_priv(pp); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); int res; =20 mutex_lock(&priv->reg_lock); --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pz2-f41.google.com (mail-pz2-f41.google.com [74.125.228.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 85FE9377EA1 for ; Wed, 23 Sep 2026 02:20:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=74.125.228.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130028; cv=none; b=VpO8aE7Fye7fRW2iOoKB3XyEru41P8JM8BkGWmBxAQGz9vZCLtpWEKIjkhxiH5Kgf53LnjnS0Koo16o2RRn7Ot9lyzS3rKKq/JDpp5ocEhY9hKMZmxU1kJ4uh/psEAfNv6PXd3zYBNrA8fyS2zyP34CTaGPci66echPSlDLRxrA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130028; c=relaxed/simple; bh=xjUv0NwzYr0Oa3odjBrlzQpjLtYUWPN9ltEzFzeZgtU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HqsTcjQdtlyRSaNdKB7rBN42UY9r1qWEAITbHWEDxMoPjM/QnncuE6N1vi5n+p+NJtlkuc8wi9oq0mksbrcLvgbrbzK3vz94vfW0XFLuW76EgGZtOb2qXpGYf+7Ml1XnmscYFBH8GbkbrqGo5B58q/kJhaALx7r3ihNgJ5qVazY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=e9ehQVyG; arc=none smtp.client-ip=74.125.228.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="e9ehQVyG" Received: by mail-pz2-f41.google.com with SMTP id d2e1a72fcca58-85a4329731cso285043b3a.3 for ; Tue, 22 Sep 2026 19:20:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130026; x=1790734826; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=w3yzwbr4GKjVvqORjzKamnj3DkZgDBWV6VbdLMWVI3w=; b=e9ehQVyGJwX0dYhou0kses8xqYsbH9w7eIt74eTLd0x8koejZ6S9cHx22MnmkhY35Q JcCzjig6mKfQpcXZbVURW8YYcHgSQMFdPFd0SLhEV+83XxzFRB3sfwOQrHgn7EEHavUT d6P+5fuPQP/QH0B5OjOn8AnuIDlt9fRZEl1uCAjePtg5A8t3W70x3dhaoL7It5yIhdZ1 HXsK0qkHtzKPwaX+AEZJdM4YFX1F5LLe9pGU94BgQXHa5k0ki2tcowefQ8B6WdUoauWA N20z7mqcHehbaTaFCDruwSG1vkahejmYsyPg3ryLgRXrerqjTz9Rg9pdKYIv4NN3fucT 3Kjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130026; x=1790734826; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=w3yzwbr4GKjVvqORjzKamnj3DkZgDBWV6VbdLMWVI3w=; b=AkX7M+5UcO/2iaIh61n8v4QyUuMqn0QIh3lBeOLJotLt4Kq7Kl7B9Hbx2aUm3VvAK/ FlaZXhZWIAdn1jkhJQhynsV5S+nOXaGlCjvB/f/EcG0e9c0KcZ+PnbHDBsdJhPpV9YnG 7SC3yq7JWHJPZtpaQt4PwpTxQLn3Tdgb+v587Zdr6iZV55YbkZUw8bWJEUZHMyuDoAPO zUJzhcbLRhlUv13xXIVPPMq1ufPwQMzgNuaxKrL14yulyfuM7GrBTLJfhoXlIx5XNbGZ 8AKrMaRGp8O9KNLw1PixiKEzlABLSk/o56rEGYa6ZzB+Gik7Xm2cVAk003i1k+q3ug/G +lBA== X-Forwarded-Encrypted: i=1; AKwUvByIO8jP9PFgRLPN+OCK/sQNBY9NboYURKCMhUiMEo6CsXSzQ5sOwR5oqH8ERzk2JqYL++DLEe+xHX/3ndo=@vger.kernel.org X-Gm-Message-State: AFuF++l1pG4Pl2fVtjd/W+UgWpIi8pO+Q5OFTnL50wyXVj8Qhl5feQWL R+lzPOAYU7MT7AOzxK1iWvydG4u5QTGWL0BsYulQWBvF1W3p4FwbBmze X-Gm-Gg: AYBFou1EOg460Q8mIooarP14nA3yKKHEUdz3NLCCVIc7yKD94fXb987QGRJ762UBGY7 qmBHIkDBpuqGgope2oiFQ+wScRKB3lxhsvzcnn5b/ByEvpx4FPwy0Vw6PDM6Lt8EjUyV+SoCxu/ jydRlTuLEXp2MToznHM26q/3887QvVpthd90QBZv4GYx7cFUh9Da878pR6/VpdFsMwcRczKc5je bHhwMycqKoUVZkom88pzl1EPRDrnnDxDDPI2GS1bolr02WdgCPRp/AnIZFTBBw1B6++G4Ga8hja PZ2BD9NCS1cvvK8axDdnh1ySfodLR9rj8HkudnZu74Jqo89BBLpnfErt5vld9gmC8iYDlq1NNBA 98gDNzAntQycJt+/niKFqSoB1tDJ1Qy3DHIbLmPKg6RH6fVNoEqU9YDwGL50t4vThsHMjd4xwcs OqQ31ObFsM/7Oe3A+zyOplqqrMpgFknqlNHAORktu7Yus3wTi0Xbc8yaUYPz3XIvlo8ErALU4iJ ZgwHlWe+xA4x+L+VRxSORNe X-Received: by 2002:a05:6300:2788:20b0:3dd:fb34:7662 with SMTP id adf61e73a8af0-3ddfb34c3f8mr440526637.47.1790130025518; Tue, 22 Sep 2026 19:20:25 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:24 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 7/8] net: dsa: motorcomm: Split MDIO bus module Date: Wed, 23 Sep 2026 10:19:39 +0800 Message-ID: <20260923021945.2203368-8-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Split it in order to be used in other modules. Signed-off-by: David Yang Reviewed-by: Andrew Lunn --- drivers/net/dsa/motorcomm/Makefile | 1 + drivers/net/dsa/motorcomm/chip.c | 269 +------------------------- drivers/net/dsa/motorcomm/chip.h | 21 -- drivers/net/dsa/motorcomm/mdio_bus.c | 278 +++++++++++++++++++++++++++ drivers/net/dsa/motorcomm/mdio_bus.h | 39 ++++ 5 files changed, 319 insertions(+), 289 deletions(-) create mode 100644 drivers/net/dsa/motorcomm/mdio_bus.c create mode 100644 drivers/net/dsa/motorcomm/mdio_bus.h diff --git a/drivers/net/dsa/motorcomm/Makefile b/drivers/net/dsa/motorcomm= /Makefile index aeb12cb91f93..f7cce7eabbb8 100644 --- a/drivers/net/dsa/motorcomm/Makefile +++ b/drivers/net/dsa/motorcomm/Makefile @@ -2,4 +2,5 @@ obj-$(CONFIG_NET_DSA_YT921X) +=3D yt921x.o yt921x-objs :=3D chip.o yt921x-$(CONFIG_NET_DSA_YT921X_LEDS) +=3D leds.o +yt921x-objs +=3D mdio_bus.o yt921x-objs +=3D smi.o diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index ee433f1e1b58..6e1219ef05d7 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -27,6 +27,7 @@ =20 #include "chip.h" #include "leds.h" +#include "mdio_bus.h" #include "smi.h" =20 struct yt921x_mib_desc { @@ -266,274 +267,6 @@ static const struct yt921x_reg_ops yt921x_reg_ops_mdi= o =3D { =20 /* TODO: SPI/I2C */ =20 -static int yt921x_intif_wait(struct yt921x_priv *priv) -{ - u32 val =3D 0; - - return yt921x_reg_wait(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START, - &val); -} - -static int -yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) -{ - struct device *dev =3D to_device(priv); - u32 mask; - u32 ctrl; - u32 val; - int res; - - res =3D yt921x_intif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_READ; - res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - res =3D yt921x_intif_wait(priv); - if (res) - return res; - res =3D yt921x_reg_read(priv, YT921X_INT_MBUS_DIN, &val); - if (res) - return res; - - if ((u16)val !=3D val) - dev_info(dev, - "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", - __func__, port, reg, val); - *valp =3D (u16)val; - return 0; -} - -static int -yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val) -{ - u32 mask; - u32 ctrl; - int res; - - res =3D yt921x_intif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_WRITE; - res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_DOUT, val); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - return yt921x_intif_wait(priv); -} - -static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg) -{ - struct yt921x_priv *priv =3D mbus->priv; - u16 val; - int res; - - if (port >=3D YT921X_PORT_NUM) - return U16_MAX; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_intif_read(priv, port, reg, &val); - mutex_unlock(&priv->reg_lock); - - if (res) - return res; - return val; -} - -static int -yt921x_mbus_int_write(struct mii_bus *mbus, int port, int reg, u16 data) -{ - struct yt921x_priv *priv =3D mbus->priv; - int res; - - if (port >=3D YT921X_PORT_NUM) - return -ENODEV; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_intif_write(priv, port, reg, data); - mutex_unlock(&priv->reg_lock); - - return res; -} - -static int -yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp) -{ - struct device *dev =3D to_device(priv); - struct mii_bus *mbus; - int res; - - mbus =3D devm_mdiobus_alloc(dev); - if (!mbus) - return -ENOMEM; - - mbus->name =3D "YT921x internal MDIO bus"; - snprintf(mbus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); - mbus->priv =3D priv; - mbus->read =3D yt921x_mbus_int_read; - mbus->write =3D yt921x_mbus_int_write; - mbus->parent =3D dev; - mbus->phy_mask =3D (u32)~GENMASK(YT921X_PORT_NUM - 1, 0); - - res =3D devm_of_mdiobus_register(dev, mbus, mnp); - if (res) - return res; - - priv->mbus_int =3D mbus; - - return 0; -} - -static int yt921x_extif_wait(struct yt921x_priv *priv) -{ - u32 val =3D 0; - - return yt921x_reg_wait(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START, - &val); -} - -static int -yt921x_extif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) -{ - struct device *dev =3D to_device(priv); - u32 mask; - u32 ctrl; - u32 val; - int res; - - res =3D yt921x_extif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_READ; - res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - res =3D yt921x_extif_wait(priv); - if (res) - return res; - res =3D yt921x_reg_read(priv, YT921X_EXT_MBUS_DIN, &val); - if (res) - return res; - - if ((u16)val !=3D val) - dev_info(dev, - "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", - __func__, port, reg, val); - *valp =3D (u16)val; - return 0; -} - -static int -yt921x_extif_write(struct yt921x_priv *priv, int port, int reg, u16 val) -{ - u32 mask; - u32 ctrl; - int res; - - res =3D yt921x_extif_wait(priv); - if (res) - return res; - - mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | - YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; - ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | - YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_WRITE; - res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_DOUT, val); - if (res) - return res; - res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); - if (res) - return res; - - return yt921x_extif_wait(priv); -} - -static int yt921x_mbus_ext_read(struct mii_bus *mbus, int port, int reg) -{ - struct yt921x_priv *priv =3D mbus->priv; - u16 val; - int res; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_extif_read(priv, port, reg, &val); - mutex_unlock(&priv->reg_lock); - - if (res) - return res; - return val; -} - -static int -yt921x_mbus_ext_write(struct mii_bus *mbus, int port, int reg, u16 data) -{ - struct yt921x_priv *priv =3D mbus->priv; - int res; - - mutex_lock(&priv->reg_lock); - res =3D yt921x_extif_write(priv, port, reg, data); - mutex_unlock(&priv->reg_lock); - - return res; -} - -static int -yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp) -{ - struct device *dev =3D to_device(priv); - struct mii_bus *mbus; - int res; - - mbus =3D devm_mdiobus_alloc(dev); - if (!mbus) - return -ENOMEM; - - mbus->name =3D "YT921x external MDIO bus"; - snprintf(mbus->id, MII_BUS_ID_SIZE, "%s@ext", dev_name(dev)); - mbus->priv =3D priv; - /* TODO: c45? */ - mbus->read =3D yt921x_mbus_ext_read; - mbus->write =3D yt921x_mbus_ext_write; - mbus->parent =3D dev; - - res =3D devm_of_mdiobus_register(dev, mbus, mnp); - if (res) - return res; - - priv->mbus_ext =3D mbus; - - return 0; -} - /* Read and handle overflow of 32bit MIBs. MIB buffer must be zeroed befor= e. */ static int yt921x_read_mib(struct yt921x_priv *priv, int port) { diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index 6a9fb27ddfb7..f68b77f815b1 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -243,27 +243,6 @@ enum yt921x_speed { #define YT9218_SYS_CLK_167M 0 #define YT921X_SYS_CLK_143M 1 =20 -#define YT921X_EXT_MBUS_OP 0x6a000 -#define YT921X_INT_MBUS_OP 0xf0000 -#define YT921X_MBUS_OP_START BIT(0) -#define YT921X_EXT_MBUS_CTRL 0x6a004 -#define YT921X_INT_MBUS_CTRL 0xf0004 -#define YT921X_MBUS_CTRL_PORT_M GENMASK(25, 21) -#define YT921X_MBUS_CTRL_PORT(x) FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (= x)) -#define YT921X_MBUS_CTRL_REG_M GENMASK(20, 16) -#define YT921X_MBUS_CTRL_REG(x) FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x)) -#define YT921X_MBUS_CTRL_TYPE_M GENMASK(11, 8) /* wild guess */ -#define YT921X_MBUS_CTRL_TYPE(x) FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (= x)) -#define YT921X_MBUS_CTRL_TYPE_C22 YT921X_MBUS_CTRL_TYPE(4) -#define YT921X_MBUS_CTRL_OP_M GENMASK(3, 2) /* wild guess */ -#define YT921X_MBUS_CTRL_OP(x) FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x)) -#define YT921X_MBUS_CTRL_WRITE YT921X_MBUS_CTRL_OP(1) -#define YT921X_MBUS_CTRL_READ YT921X_MBUS_CTRL_OP(2) -#define YT921X_EXT_MBUS_DOUT 0x6a008 -#define YT921X_INT_MBUS_DOUT 0xf0008 -#define YT921X_EXT_MBUS_DIN 0x6a00c -#define YT921X_INT_MBUS_DIN 0xf000c - #define YT921X_PORTn_EGR(port) (0x100000 + 4 * (port)) #define YT921X_PORT_EGR_TPID_CTAG_M GENMASK(5, 4) #define YT921X_PORT_EGR_TPID_CTAG(x) FIELD_PREP(YT921X_PORT_EGR_TPID_C= TAG_M, (x)) diff --git a/drivers/net/dsa/motorcomm/mdio_bus.c b/drivers/net/dsa/motorco= mm/mdio_bus.c new file mode 100644 index 000000000000..ba70343f3f33 --- /dev/null +++ b/drivers/net/dsa/motorcomm/mdio_bus.c @@ -0,0 +1,278 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2026 David Yang + */ + +#include + +#include "chip.h" +#include "mdio_bus.h" +#include "smi.h" + +#define to_device(priv) ((priv)->ds.dev) + +static int yt921x_intif_wait(struct yt921x_priv *priv) +{ + u32 val =3D 0; + + return yt921x_reg_wait(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START, + &val); +} + +static int +yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) +{ + struct device *dev =3D to_device(priv); + u32 mask; + u32 ctrl; + u32 val; + int res; + + res =3D yt921x_intif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_READ; + res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + res =3D yt921x_intif_wait(priv); + if (res) + return res; + res =3D yt921x_reg_read(priv, YT921X_INT_MBUS_DIN, &val); + if (res) + return res; + + if ((u16)val !=3D val) + dev_info(dev, + "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", + __func__, port, reg, val); + *valp =3D (u16)val; + return 0; +} + +static int +yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val) +{ + u32 mask; + u32 ctrl; + int res; + + res =3D yt921x_intif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_WRITE; + res =3D yt921x_reg_update_bits(priv, YT921X_INT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_DOUT, val); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_INT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + return yt921x_intif_wait(priv); +} + +static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg) +{ + struct yt921x_priv *priv =3D mbus->priv; + u16 val; + int res; + + if (port >=3D YT921X_PORT_NUM) + return U16_MAX; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_read(priv, port, reg, &val); + mutex_unlock(&priv->reg_lock); + + if (res) + return res; + return val; +} + +static int +yt921x_mbus_int_write(struct mii_bus *mbus, int port, int reg, u16 data) +{ + struct yt921x_priv *priv =3D mbus->priv; + int res; + + if (port >=3D YT921X_PORT_NUM) + return -ENODEV; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_write(priv, port, reg, data); + mutex_unlock(&priv->reg_lock); + + return res; +} + +int yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp) +{ + struct device *dev =3D to_device(priv); + struct mii_bus *mbus; + int res; + + mbus =3D devm_mdiobus_alloc(dev); + if (!mbus) + return -ENOMEM; + + mbus->name =3D "YT921x internal MDIO bus"; + snprintf(mbus->id, MII_BUS_ID_SIZE, "%s", dev_name(dev)); + mbus->priv =3D priv; + mbus->read =3D yt921x_mbus_int_read; + mbus->write =3D yt921x_mbus_int_write; + mbus->parent =3D dev; + mbus->phy_mask =3D (u32)~GENMASK(YT921X_PORT_NUM - 1, 0); + + res =3D devm_of_mdiobus_register(dev, mbus, mnp); + if (res) + return res; + + priv->mbus_int =3D mbus; + + return 0; +} + +static int yt921x_extif_wait(struct yt921x_priv *priv) +{ + u32 val =3D 0; + + return yt921x_reg_wait(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START, + &val); +} + +static int +yt921x_extif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) +{ + struct device *dev =3D to_device(priv); + u32 mask; + u32 ctrl; + u32 val; + int res; + + res =3D yt921x_extif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_READ; + res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + res =3D yt921x_extif_wait(priv); + if (res) + return res; + res =3D yt921x_reg_read(priv, YT921X_EXT_MBUS_DIN, &val); + if (res) + return res; + + if ((u16)val !=3D val) + dev_info(dev, + "%s: port %d, reg 0x%x: Expected u16, got 0x%08x\n", + __func__, port, reg, val); + *valp =3D (u16)val; + return 0; +} + +static int +yt921x_extif_write(struct yt921x_priv *priv, int port, int reg, u16 val) +{ + u32 mask; + u32 ctrl; + int res; + + res =3D yt921x_extif_wait(priv); + if (res) + return res; + + mask =3D YT921X_MBUS_CTRL_PORT_M | YT921X_MBUS_CTRL_REG_M | + YT921X_MBUS_CTRL_TYPE_M | YT921X_MBUS_CTRL_OP_M; + ctrl =3D YT921X_MBUS_CTRL_PORT(port) | YT921X_MBUS_CTRL_REG(reg) | + YT921X_MBUS_CTRL_TYPE_C22 | YT921X_MBUS_CTRL_WRITE; + res =3D yt921x_reg_update_bits(priv, YT921X_EXT_MBUS_CTRL, mask, ctrl); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_DOUT, val); + if (res) + return res; + res =3D yt921x_reg_write(priv, YT921X_EXT_MBUS_OP, YT921X_MBUS_OP_START); + if (res) + return res; + + return yt921x_extif_wait(priv); +} + +static int yt921x_mbus_ext_read(struct mii_bus *mbus, int port, int reg) +{ + struct yt921x_priv *priv =3D mbus->priv; + u16 val; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_extif_read(priv, port, reg, &val); + mutex_unlock(&priv->reg_lock); + + if (res) + return res; + return val; +} + +static int +yt921x_mbus_ext_write(struct mii_bus *mbus, int port, int reg, u16 data) +{ + struct yt921x_priv *priv =3D mbus->priv; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_extif_write(priv, port, reg, data); + mutex_unlock(&priv->reg_lock); + + return res; +} + +int yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp) +{ + struct device *dev =3D to_device(priv); + struct mii_bus *mbus; + int res; + + mbus =3D devm_mdiobus_alloc(dev); + if (!mbus) + return -ENOMEM; + + mbus->name =3D "YT921x external MDIO bus"; + snprintf(mbus->id, MII_BUS_ID_SIZE, "%s@ext", dev_name(dev)); + mbus->priv =3D priv; + /* TODO: c45? */ + mbus->read =3D yt921x_mbus_ext_read; + mbus->write =3D yt921x_mbus_ext_write; + mbus->parent =3D dev; + + res =3D devm_of_mdiobus_register(dev, mbus, mnp); + if (res) + return res; + + priv->mbus_ext =3D mbus; + + return 0; +} diff --git a/drivers/net/dsa/motorcomm/mdio_bus.h b/drivers/net/dsa/motorco= mm/mdio_bus.h new file mode 100644 index 000000000000..ae5792b8da24 --- /dev/null +++ b/drivers/net/dsa/motorcomm/mdio_bus.h @@ -0,0 +1,39 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2026 David Yang + */ + +#ifndef _YT_MDIO_BUS_H +#define _YT_MDIO_BUS_H + +#include +#include +#include + +#define YT921X_EXT_MBUS_OP 0x6a000 +#define YT921X_INT_MBUS_OP 0xf0000 +#define YT921X_MBUS_OP_START BIT(0) +#define YT921X_EXT_MBUS_CTRL 0x6a004 +#define YT921X_INT_MBUS_CTRL 0xf0004 +#define YT921X_MBUS_CTRL_PORT_M GENMASK(25, 21) +#define YT921X_MBUS_CTRL_PORT(x) FIELD_PREP(YT921X_MBUS_CTRL_PORT_M, (= x)) +#define YT921X_MBUS_CTRL_REG_M GENMASK(20, 16) +#define YT921X_MBUS_CTRL_REG(x) FIELD_PREP(YT921X_MBUS_CTRL_REG_M, (x)) +#define YT921X_MBUS_CTRL_TYPE_M GENMASK(11, 8) /* wild guess */ +#define YT921X_MBUS_CTRL_TYPE(x) FIELD_PREP(YT921X_MBUS_CTRL_TYPE_M, (= x)) +#define YT921X_MBUS_CTRL_TYPE_C22 YT921X_MBUS_CTRL_TYPE(4) +#define YT921X_MBUS_CTRL_OP_M GENMASK(3, 2) /* wild guess */ +#define YT921X_MBUS_CTRL_OP(x) FIELD_PREP(YT921X_MBUS_CTRL_OP_M, (x)) +#define YT921X_MBUS_CTRL_WRITE YT921X_MBUS_CTRL_OP(1) +#define YT921X_MBUS_CTRL_READ YT921X_MBUS_CTRL_OP(2) +#define YT921X_EXT_MBUS_DOUT 0x6a008 +#define YT921X_INT_MBUS_DOUT 0xf0008 +#define YT921X_EXT_MBUS_DIN 0x6a00c +#define YT921X_INT_MBUS_DIN 0xf000c + +struct yt921x_priv; + +int yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp= ); +int yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp= ); + +#endif --=20 2.53.0 From nobody Thu Sep 24 14:25:57 2026 Received: from mail-pf1-f182.google.com (mail-pf1-f182.google.com [209.85.210.182]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C12FC386C36 for ; Wed, 23 Sep 2026 02:20:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.182 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130031; cv=none; b=UIIWVGWJESCC1Qgl3m3/piyvP56SzvQym2djm9FGTkg/CWHYdZZ0t2zw+mReQW9mPQqrzYFpwZugxqyxMZHpYHzf5m4otczQnsHcFzTBKDQNbtnTfWRJcDwdI4M5o1vULlwL2hZNKuq9K3l4GBiiz9k6IU/6fYJ6mPM6QI5iUZQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790130031; c=relaxed/simple; bh=9C96KT3JNLCoH8XeCit/4HN3mRD/x/j1N4cfXLE2Vms=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kcfJvclYuHkE97sNiU65lbV3qY9QhqV6TqvphdVOYLvfCsRQBfJQJejM7WKhN8S6OEDqWGyZG1Z/YzO4TpenfqdDV8GnOkAJvfnqqyC57TriztM6QLSOjzYuTn/eENdGl8qNCi5gKGeYqsRofq4yH+ITDkX0SVJYdS43GDObkJQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=FubTD5TQ; arc=none smtp.client-ip=209.85.210.182 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="FubTD5TQ" Received: by mail-pf1-f182.google.com with SMTP id d2e1a72fcca58-853e2610bb4so916294b3a.0 for ; Tue, 22 Sep 2026 19:20:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1790130029; x=1790734829; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=ZB74M6zwbEzpiSrfPYfeLYGb4Rpj7emMLz+trRKHvuU=; b=FubTD5TQVeqwAzSI4rmSEfVzqWv5C6yhSRYufqH2setfp5F5k05JUEVB7FKd+acw9V XSMpoNhe/MQ1GBa4IoITinkQT0gbH/tbl6MLJ0Hd5CnpbWfXzG800g5yciLYTCf7+xGe 1GFsyAgwi2O8c+6DekW/rngal3hOyfqM17HvLTEXYQAT/zUeopXENoPThHK4OCaSkyXT nF643Ax0omtqR6siyEjmXicWNdOUDQ+kqvh0O4ze4yVRJWgRhjAYrsBw57a5VKSUNU8s mBJM5VRMb+5mnH+DlWXQ8+Jdggc7jbgphJZrbAH+JhAnAG628P2nINZj7/MK8wq65YHE P9bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1790130029; x=1790734829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=ZB74M6zwbEzpiSrfPYfeLYGb4Rpj7emMLz+trRKHvuU=; b=GnmC6uk/Dhyq7ufMxocc1h0+Xyo3Dmnf7hfnYKK3medAGHCqfvfAAQrcoExWf+4AOV rmQ+81KD7XVWKQFoj3X/XEr2qRdXbPuN4im8vLx3yWk1Q3LBY0LseVgG/k1sTsU1ZqHB z7HPaEwA0a4c+cVfvIeHUh5GOsU6recowxRjydOJK0TCzd/9bIqXU6uo8O1t4/bzAp4f /I/SmNWr3hQ85xUnbuLwPSXGuRn+6bqH3QrKLp8tuOknlINq2tBXOpnXvrIMpCTAFH71 nrdcBL2JLqL+DC3HyEvGIW0HMqfB1rLFHoN7wuPqC0dOEhmxhg5GU63EdNJQ22ssV4JM vNdQ== X-Forwarded-Encrypted: i=1; AKwUvBw54NFj69KraAqjVtspaH4akOllvgcCQ7OuQNlnXGryZgn4sX0GXMF/n+LTmBi9a1IHHXupUtVVZ2HOzJQ=@vger.kernel.org X-Gm-Message-State: AFuF++n8bdOR+JFKUfyrB07bI7FPX0xsO3lJvkZYxNj6BKJvpXwN0nhY r5A7ltphqSj6TO+vbEPnfOV+uLb21weiiFfjaLaPV8SLnXbK/bbeD8R1 X-Gm-Gg: AYBFou0QzE1kxoW2DwEGSgmlBTKZP1t4/y4Ei6Ml98WYQuPux5kW2uT4ucoNy7jzL7g YQKFv2hlzs2fK6PdaaP4ZvJdMNrFb2EZrKU+WLWGWBfDRB8jZ/NGcO+4tYc4xZw5rvjo4WO3DTT x3ti1vH5224+VPcZ23YwxM2OZuA8R7U8W3r1vWZw85l8YRBoYKsN6danVKiggzHbnFkik4MaODL vNmRmum3ip2R+679/Qb4j0IwOmEHeU69EHUol7khj0dxqB7wzZVyEbgNj8WHycHpJK+zDIlvyd7 tY8/Ox7PFwg1ooKVRn3pEtSd7QkWvqvxItnAMIM0uWFFWMZd8DaD35A7SZWWL2OHnISbuz7JoQq U3Z+5kcgXmlEPEaXadkFqYJF0O1aCRuAPFxzn4gdc/wbmDIhxthv1gLlAGv7+ifgFHOREyddYA5 Hen2OualqoPtMA+2bWcCnL8k/j6fEUrrH62zGIda1qe+KgIDOjNzVSBgLh6zU36sgC1Mu2GOG0Q kytVtHFOrC1NV5taS/f+EdL X-Received: by 2002:a05:6a00:14cd:b0:871:c901:d689 with SMTP id d2e1a72fcca58-87c8452f3dbmr2071444b3a.23.1790130028745; Tue, 22 Sep 2026 19:20:28 -0700 (PDT) Received: from d.home.yangfl.dn42 ([2a09:bac1:76c0:d30::4d0:61]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87d1e0f4fe8sm502924b3a.51.2026.09.22.19.20.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 19:20:28 -0700 (PDT) From: David Yang To: netdev@vger.kernel.org Cc: David Yang , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Russell King , linux-kernel@vger.kernel.org Subject: [PATCH net-next v4 8/8] net: dsa: motorcomm: Add SerDes PCS Date: Wed, 23 Sep 2026 10:19:40 +0800 Message-ID: <20260923021945.2203368-9-mmyangfl@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260923021945.2203368-1-mmyangfl@gmail.com> References: <20260923021945.2203368-1-mmyangfl@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Support in-band negotiation of the SerDes ports. Signed-off-by: David Yang Reviewed-by: Andrew Lunn --- drivers/net/dsa/motorcomm/Makefile | 1 + drivers/net/dsa/motorcomm/chip.c | 83 ++++++--- drivers/net/dsa/motorcomm/chip.h | 6 + drivers/net/dsa/motorcomm/mdio_bus.c | 31 +++- drivers/net/dsa/motorcomm/mdio_bus.h | 15 ++ drivers/net/dsa/motorcomm/pcs-921x.c | 247 +++++++++++++++++++++++++++ drivers/net/dsa/motorcomm/pcs.h | 13 ++ 7 files changed, 367 insertions(+), 29 deletions(-) create mode 100644 drivers/net/dsa/motorcomm/pcs-921x.c create mode 100644 drivers/net/dsa/motorcomm/pcs.h diff --git a/drivers/net/dsa/motorcomm/Makefile b/drivers/net/dsa/motorcomm= /Makefile index f7cce7eabbb8..1d2c1b3064c4 100644 --- a/drivers/net/dsa/motorcomm/Makefile +++ b/drivers/net/dsa/motorcomm/Makefile @@ -3,4 +3,5 @@ obj-$(CONFIG_NET_DSA_YT921X) +=3D yt921x.o yt921x-objs :=3D chip.o yt921x-$(CONFIG_NET_DSA_YT921X_LEDS) +=3D leds.o yt921x-objs +=3D mdio_bus.o +yt921x-objs +=3D pcs-921x.o yt921x-objs +=3D smi.o diff --git a/drivers/net/dsa/motorcomm/chip.c b/drivers/net/dsa/motorcomm/c= hip.c index 6e1219ef05d7..3ff2de383157 100644 --- a/drivers/net/dsa/motorcomm/chip.c +++ b/drivers/net/dsa/motorcomm/chip.c @@ -28,6 +28,7 @@ #include "chip.h" #include "leds.h" #include "mdio_bus.h" +#include "pcs.h" #include "smi.h" =20 struct yt921x_mib_desc { @@ -3511,6 +3512,10 @@ yt921x_port_up(struct yt921x_priv *priv, int port, u= nsigned int mode, if (ps =3D=3D YT921X_SPEED_INVALID) return -EINVAL; =20 + mask =3D YT921X_PORT_SPEED_M | YT921X_PORT_TX_MAC_EN | + YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_PAUSE | + YT921X_PORT_RX_PAUSE | YT921X_PORT_DUPLEX_FULL | + YT921X_PORT_CTRL_LINK_AN; ctrl =3D YT921X_PORT_SPEED(ps); if (duplex =3D=3D DUPLEX_FULL) ctrl |=3D YT921X_PORT_DUPLEX_FULL; @@ -3519,7 +3524,9 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, if (rx_pause) ctrl |=3D YT921X_PORT_RX_PAUSE; ctrl |=3D YT921X_PORT_RX_MAC_EN | YT921X_PORT_TX_MAC_EN; - res =3D yt921x_reg_write(priv, YT921X_PORTn_CTRL(port), ctrl); + if (pp->serdes && pp->inband) + ctrl |=3D YT921X_PORT_CTRL_LINK_AN; + res =3D yt921x_reg_update_bits(priv, YT921X_PORTn_CTRL(port), mask, ctrl); if (res) return res; =20 @@ -3539,7 +3546,8 @@ yt921x_port_up(struct yt921x_priv *priv, int port, un= signed int mode, if (rx_pause) ctrl |=3D YT921X_SERDES_RX_PAUSE; mask |=3D YT921X_SERDES_LINK; - ctrl |=3D YT921X_SERDES_LINK; + if (!pp->inband) + ctrl |=3D YT921X_SERDES_LINK; res =3D yt921x_reg_update_bits(priv, YT921X_SERDESn(port), mask, ctrl); if (res) @@ -3570,7 +3578,6 @@ yt921x_port_config(struct yt921x_priv *priv, int port= , unsigned int mode, struct yt921x_port *pp =3D &priv->ports[port]; struct device *dev =3D to_device(priv); u32 mask; - u32 ctrl; int res; =20 if (BIT(port) & info->internal_mask) { @@ -3603,28 +3610,6 @@ yt921x_port_config(struct yt921x_priv *priv, int por= t, unsigned int mode, */ pp->serdes =3D true; =20 - mask =3D YT921X_SERDES_MODE_M; - switch (interface) { - case PHY_INTERFACE_MODE_SGMII: - ctrl =3D YT921X_SERDES_MODE_SGMII; - break; - case PHY_INTERFACE_MODE_100BASEX: - ctrl =3D YT921X_SERDES_MODE_100BASEX; - break; - case PHY_INTERFACE_MODE_1000BASEX: - ctrl =3D YT921X_SERDES_MODE_1000BASEX; - break; - case PHY_INTERFACE_MODE_2500BASEX: - ctrl =3D YT921X_SERDES_MODE_2500BASEX; - break; - default: - return -EINVAL; - } - res =3D yt921x_reg_update_bits(priv, YT921X_SERDESn(port), - mask, ctrl); - if (res) - return res; - break; /* add XMII support here */ default: @@ -3638,6 +3623,29 @@ yt921x_port_config(struct yt921x_priv *priv, int por= t, unsigned int mode, return -EINVAL; } =20 +static struct phylink_pcs * +yt921x_phylink_mac_select_pcs(struct phylink_config *config, + phy_interface_t interface) +{ + struct dsa_port *dp =3D dsa_phylink_to_port(config); + struct yt921x_priv *priv =3D to_yt921x_priv(dp->ds); + const struct yt921x_info *info =3D priv->info; + int port =3D dp->index; + + if (!(BIT(port) & info->serdes_mask)) + return NULL; + + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + case PHY_INTERFACE_MODE_100BASEX: + case PHY_INTERFACE_MODE_1000BASEX: + case PHY_INTERFACE_MODE_2500BASEX: + return &priv->ports[port].pcs; + default: + return NULL; + } +} + static void yt921x_phylink_mac_link_down(struct phylink_config *config, unsigned int m= ode, phy_interface_t interface) @@ -4225,6 +4233,11 @@ static int yt921x_chip_setup(struct yt921x_priv *pri= v) if (res) return res; =20 + res =3D yt921x_reg_clear_bits(priv, YT921X_SERDES_CTRL, + YT921X_SERDES_CTRL_TEST); + if (res) + return res; + return 0; } =20 @@ -4234,6 +4247,8 @@ static int yt921x_dsa_setup(struct dsa_switch *ds) struct device *dev =3D to_device(priv); struct device_node *np =3D dev->of_node; struct device_node *child; + unsigned long mask; + int port; int res; =20 mutex_lock(&priv->reg_lock); @@ -4267,6 +4282,23 @@ static int yt921x_dsa_setup(struct dsa_switch *ds) return -ENODEV; } =20 + mask =3D priv->info->serdes_mask; + for_each_set_bit(port, &mask, YT921X_PORT_NUM) { + struct yt921x_port *pp =3D &priv->ports[port]; + + pp->pcs.ops =3D &yt921x_phylink_pcs_ops; + pp->pcs.poll =3D true; + + __set_bit(PHY_INTERFACE_MODE_SGMII, + pp->pcs.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_100BASEX, + pp->pcs.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_1000BASEX, + pp->pcs.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_2500BASEX, + pp->pcs.supported_interfaces); + } + mutex_lock(&priv->reg_lock); res =3D yt921x_chip_setup(priv); mutex_unlock(&priv->reg_lock); @@ -4284,6 +4316,7 @@ static int yt921x_dsa_setup(struct dsa_switch *ds) } =20 static const struct phylink_mac_ops yt921x_phylink_mac_ops =3D { + .mac_select_pcs =3D yt921x_phylink_mac_select_pcs, .mac_link_down =3D yt921x_phylink_mac_link_down, .mac_link_up =3D yt921x_phylink_mac_link_up, .mac_config =3D yt921x_phylink_mac_config, diff --git a/drivers/net/dsa/motorcomm/chip.h b/drivers/net/dsa/motorcomm/c= hip.h index f68b77f815b1..28e4f26f9cc4 100644 --- a/drivers/net/dsa/motorcomm/chip.h +++ b/drivers/net/dsa/motorcomm/chip.h @@ -910,6 +910,8 @@ struct yt921x_port { =20 /* SerDes in use */ bool serdes:1; + /* Link from in-band status (PHYLINK_PCS_NEG_INBAND) */ + bool inband:1; /* BR_HAIRPIN_MODE */ bool hairpin:1; /* BR_ISOLATED */ @@ -929,8 +931,12 @@ struct yt921x_port { =20 struct yt921x_led *leds[YT921X_LED_GROUP_NUM]; #endif + + struct phylink_pcs pcs; }; =20 +#define pcs_to_yt921x_port(_pcs) container_of((_pcs), struct yt921x_port, = pcs) + struct yt921x_reg_ops { int (*read)(void *context, u32 reg, u32 *valp); int (*write)(void *context, u32 reg, u32 val); diff --git a/drivers/net/dsa/motorcomm/mdio_bus.c b/drivers/net/dsa/motorco= mm/mdio_bus.c index ba70343f3f33..1a3f3cc68275 100644 --- a/drivers/net/dsa/motorcomm/mdio_bus.c +++ b/drivers/net/dsa/motorcomm/mdio_bus.c @@ -19,8 +19,7 @@ static int yt921x_intif_wait(struct yt921x_priv *priv) &val); } =20 -static int -yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *valp) +int yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *va= lp) { struct device *dev =3D to_device(priv); u32 mask; @@ -58,8 +57,7 @@ yt921x_intif_read(struct yt921x_priv *priv, int port, int= reg, u16 *valp) return 0; } =20 -static int -yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 val) +int yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 va= l) { u32 mask; u32 ctrl; @@ -86,6 +84,31 @@ yt921x_intif_write(struct yt921x_priv *priv, int port, i= nt reg, u16 val) return yt921x_intif_wait(priv); } =20 +int +yt921x_intif_modify_changed(struct yt921x_priv *priv, int port, int reg, + u16 mask, u16 val) +{ + int res; + u16 v; + u16 u; + + res =3D yt921x_intif_read(priv, port, reg, &v); + if (res) + return res; + + u =3D v; + u &=3D ~mask; + u |=3D val; + if (u =3D=3D v) + return 0; + + res =3D yt921x_intif_write(priv, port, reg, u); + if (res) + return res; + + return 1; +} + static int yt921x_mbus_int_read(struct mii_bus *mbus, int port, int reg) { struct yt921x_priv *priv =3D mbus->priv; diff --git a/drivers/net/dsa/motorcomm/mdio_bus.h b/drivers/net/dsa/motorco= mm/mdio_bus.h index ae5792b8da24..e79b725d435b 100644 --- a/drivers/net/dsa/motorcomm/mdio_bus.h +++ b/drivers/net/dsa/motorcomm/mdio_bus.h @@ -33,6 +33,21 @@ =20 struct yt921x_priv; =20 +int yt921x_intif_read(struct yt921x_priv *priv, int port, int reg, u16 *va= lp); +int yt921x_intif_write(struct yt921x_priv *priv, int port, int reg, u16 va= l); +int yt921x_intif_modify_changed(struct yt921x_priv *priv, int port, int re= g, + u16 mask, u16 val); + +static inline int +yt921x_intif_modify(struct yt921x_priv *priv, int port, int reg, u16 mask, + u16 val) +{ + int res; + + res =3D yt921x_intif_modify_changed(priv, port, reg, mask, val); + return res >=3D 0 ? 0 : res; +} + int yt921x_mbus_int_init(struct yt921x_priv *priv, struct device_node *mnp= ); int yt921x_mbus_ext_init(struct yt921x_priv *priv, struct device_node *mnp= ); =20 diff --git a/drivers/net/dsa/motorcomm/pcs-921x.c b/drivers/net/dsa/motorco= mm/pcs-921x.c new file mode 100644 index 000000000000..47467d803e13 --- /dev/null +++ b/drivers/net/dsa/motorcomm/pcs-921x.c @@ -0,0 +1,247 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2026 David Yang + */ + +#include "chip.h" +#include "mdio_bus.h" +#include "pcs.h" +#include "smi.h" + +#define to_device(priv) ((priv)->ds.dev) + +static int +yt921x_serdes_config(struct yt921x_priv *priv, int port, unsigned int neg_= mode, + phy_interface_t interface, + const unsigned long *advertising, bool permit_pause_to_mac) +{ + bool inband =3D neg_mode & PHYLINK_PCS_NEG_INBAND; + struct yt921x_port *pp =3D &priv->ports[port]; + bool changed =3D false; + u16 bmcr; + u32 mask; + u32 ctrl; + u16 val; + int adv; + int res; + + switch (interface) { + case PHY_INTERFACE_MODE_SGMII: + ctrl =3D YT921X_SERDES_MODE_SGMII; + break; + case PHY_INTERFACE_MODE_100BASEX: + ctrl =3D YT921X_SERDES_MODE_100BASEX; + break; + case PHY_INTERFACE_MODE_1000BASEX: + ctrl =3D YT921X_SERDES_MODE_1000BASEX; + break; + case PHY_INTERFACE_MODE_2500BASEX: + ctrl =3D YT921X_SERDES_MODE_2500BASEX; + break; + default: + return -EOPNOTSUPP; + } + + res =3D yt921x_reg_update_bits(priv, YT921X_SERDESn(port), + YT921X_SERDES_MODE_M, ctrl); + if (res) + return res; + + mask =3D YT921X_PORT_CTRL_LINK_AN | YT921X_PORT_CTRL_PAUSE_AN; + ctrl =3D 0; + if (inband) + ctrl |=3D YT921X_PORT_CTRL_LINK_AN; + if (neg_mode =3D=3D PHYLINK_PCS_NEG_INBAND_ENABLED && permit_pause_to_mac= && + interface !=3D PHY_INTERFACE_MODE_SGMII) + ctrl |=3D YT921X_PORT_CTRL_PAUSE_AN; + res =3D yt921x_reg_update_bits(priv, YT921X_PORTn_CTRL(port), mask, ctrl); + if (res) + return res; + + if (inband) { + res =3D yt921x_reg_clear_bits(priv, YT921X_SERDESn(port), + YT921X_SERDES_LINK); + if (res) + return res; + } + + adv =3D phylink_mii_c22_pcs_encode_advertisement(interface, advertising); + if (adv >=3D 0) { + res =3D yt921x_intif_modify_changed(priv, port, MII_ADVERTISE, + U16_MAX, adv); + if (res < 0) + return res; + + changed =3D !!res; + } + + res =3D yt921x_intif_read(priv, port, MII_BMCR, &val); + if (res) + return res; + + bmcr =3D val; + if (neg_mode =3D=3D PHYLINK_PCS_NEG_INBAND_ENABLED) + bmcr |=3D BMCR_ANENABLE; + else + bmcr &=3D ~BMCR_ANENABLE; + + /* If the ANENABLE bit was changed, the PHY will restart negotiation, + * so we don't need to flag a change to trigger its own restart. + */ + if (bmcr !=3D val) + changed =3D false; + + bmcr &=3D ~BMCR_ISOLATE; + res =3D yt921x_intif_write(priv, port, MII_BMCR, bmcr); + if (res) + return res; + + pp->inband =3D inband; + return changed; +} + +static unsigned int +yt921x_phylink_pcs_inband_caps(struct phylink_pcs *pcs, + phy_interface_t interface) +{ + if (interface =3D=3D PHY_INTERFACE_MODE_100BASEX) + return LINK_INBAND_DISABLE; + + return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE; +} + +static void +yt921x_phylink_pcs_get_state(struct phylink_pcs *pcs, unsigned int neg_mod= e, + struct phylink_link_state *state) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + struct device *dev =3D to_device(priv); + int port =3D pp->index; + u16 bmsr; + u16 lpa; + int res; + + mutex_lock(&priv->reg_lock); + + res =3D yt921x_intif_read(priv, port, MII_BMSR, &bmsr); + if (res) + goto end; + + res =3D yt921x_intif_read(priv, port, MII_LPA, &lpa); + +end: + mutex_unlock(&priv->reg_lock); + + if (res) { + dev_err_ratelimited(dev, "Failed to %s PCS port %d: %i\n", + "get state of", port, res); + state->link =3D false; + return; + } + + if (state->interface =3D=3D PHY_INTERFACE_MODE_100BASEX) { + state->speed =3D SPEED_100; + state->duplex =3D DUPLEX_FULL; + state->pause |=3D MLO_PAUSE_TX | MLO_PAUSE_RX; + state->link =3D !!(bmsr & BMSR_LSTATUS); + return; + } + + phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); +} + +static void yt921x_phylink_pcs_an_restart(struct phylink_pcs *pcs) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + struct device *dev =3D to_device(priv); + int port =3D pp->index; + u16 val; + int res; + + mutex_lock(&priv->reg_lock); + + res =3D yt921x_intif_read(priv, port, MII_BMCR, &val); + if (res) + goto end; + + val |=3D BMCR_ANRESTART; + res =3D yt921x_intif_write(priv, port, MII_BMCR, val); + +end: + mutex_unlock(&priv->reg_lock); + + if (res) + dev_err(dev, "Failed to %s PCS port %d: %i\n", "restart", + port, res); +} + +static void yt921x_phylink_pcs_disable(struct phylink_pcs *pcs) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + struct device *dev =3D to_device(priv); + int port =3D pp->index; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_intif_modify(priv, port, MII_BMCR, BMCR_PDOWN, BMCR_PDOWN); + mutex_unlock(&priv->reg_lock); + + if (res) + dev_err(dev, "Failed to %s PCS port %d: %i\n", "power down", + port, res); +} + +static int yt921x_phylink_pcs_enable(struct phylink_pcs *pcs) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + int port =3D pp->index; + u16 val; + int res; + + mutex_lock(&priv->reg_lock); + + res =3D yt921x_intif_read(priv, port, MII_BMCR, &val); + if (res) + goto end; + + val &=3D ~BMCR_PDOWN; + val |=3D BMCR_ANRESTART; + res =3D yt921x_intif_write(priv, port, MII_BMCR, val); + +end: + mutex_unlock(&priv->reg_lock); + + return res; +} + +static int +yt921x_phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, + phy_interface_t interface, + const unsigned long *advertising, + bool permit_pause_to_mac) +{ + struct yt921x_port *pp =3D pcs_to_yt921x_port(pcs); + struct yt921x_priv *priv =3D yt921x_port_to_priv(pp); + int port =3D pp->index; + int res; + + mutex_lock(&priv->reg_lock); + res =3D yt921x_serdes_config(priv, port, neg_mode, interface, + advertising, permit_pause_to_mac); + mutex_unlock(&priv->reg_lock); + + return res; +} + +const struct phylink_pcs_ops yt921x_phylink_pcs_ops =3D { + .pcs_inband_caps =3D yt921x_phylink_pcs_inband_caps, + .pcs_get_state =3D yt921x_phylink_pcs_get_state, + .pcs_an_restart =3D yt921x_phylink_pcs_an_restart, + .pcs_disable =3D yt921x_phylink_pcs_disable, + .pcs_enable =3D yt921x_phylink_pcs_enable, + .pcs_config =3D yt921x_phylink_pcs_config, +}; diff --git a/drivers/net/dsa/motorcomm/pcs.h b/drivers/net/dsa/motorcomm/pc= s.h new file mode 100644 index 000000000000..42426558086a --- /dev/null +++ b/drivers/net/dsa/motorcomm/pcs.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (c) 2026 David Yang + */ + +#ifndef _YT_PCS_H +#define _YT_PCS_H + +#include + +extern const struct phylink_pcs_ops yt921x_phylink_pcs_ops; + +#endif --=20 2.53.0