From nobody Thu Sep 24 12:55:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 350DD5383E7; Wed, 23 Sep 2026 14:38:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790174321; cv=none; b=c3OjRayN1P/zYJslJLO85MJ4a6DyFSqez+Ronfl9wQLehd/IurYuQvTuN9LNBqKrjrqWBsMLs0vdc+fLHbnxRPto86pySpNYUmJNlo4jbS3W7sLSmRsSa7a12RbiE+jo5EpZQZqBNj36wMUlKhQx/RbSVPTHNRh2AgUxyN1t0KQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790174321; c=relaxed/simple; bh=kHBmBVl2JMu6+02FSgWbrN1W6OrCsYXxzGowr9KGA/o=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=p56BkHaiEPeR4KOr26BwZq+bwc4o+3X3BwS8B+yd5wCPoBqYvqYGZI926Uj6MmDqwDlonPfZzzWMhNcJQ4aMoYiQcbh6gsF6vQEeEYmljNh3dvjn6RthJGtBT+Cr9rzqAiT7RxIKhYlvhJ7fQNBcG/0PP3ZIDJmucWv7Z0r0e80= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VqzvuPr2; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VqzvuPr2" Received: by smtp.kernel.org (Postfix) with ESMTPS id DD7DFC2BCB8; Wed, 23 Sep 2026 14:38:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1790174320; bh=kHBmBVl2JMu6+02FSgWbrN1W6OrCsYXxzGowr9KGA/o=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VqzvuPr2sZvvNnS5gBOfAp1/DKPDSDiP+ottvViCTjRhpwbt1rCHG7x33AJJURvvW 4Eezz2EUH+jgcvYEAe0EQVqlW3UmTEc0lwFBZn6mOS/lKlOm/t/AynMoUmBmO2c380 Wh39MtZ0rbzljG/Rfb/bXrP4PIpG/LStGpF0JFUVAR8TsureE+9mNQ1jYxBak6bZVR AIH0Qlh54lUxS6ep4KmgDSqPKPtNILdNSWLEuktGxbgo8gONUm2gNHCxFLGyqbKJhX AMCcwjq5jrF4/fmrHEb0X7FS7icchtDz4b1FtWnkd8ejgKVCbKKGuOpXzBNTGSPIx3 kOOKJadpIyDpg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE4E7C98304; Wed, 23 Sep 2026 14:38:40 +0000 (UTC) From: Ronald Claveau via B4 Relay Date: Wed, 23 Sep 2026 16:37:50 +0200 Subject: [PATCH v2 1/2] dt-bindings: thermal: amlogic: describe bus clock for t7-thermal Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260923-fix-t7-thermal-clock-v2-1-bff7a09eb487@aliel.fr> References: <20260923-fix-t7-thermal-clock-v2-0-bff7a09eb487@aliel.fr> In-Reply-To: <20260923-fix-t7-thermal-clock-v2-0-bff7a09eb487@aliel.fr> To: Guillaume La Roque , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Conor Dooley , linux-pm@vger.kernel.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ronald Claveau , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2573; i=linux-kernel-dev@aliel.fr; h=from:subject:message-id; bh=lXYK+uXkBcJdi1W1oKXkGFGmegAqeXjq24I9R+Ha9zQ=; b=owGbwMvMwCWm1SvKXP3cUInxtFoSQ9bmJzENK2KyWp9JqwS0LY4yE/a88ylD9WC55p7u+XuDU pmDFL93lLIwiHExyIopsvTPtTzx7vLRM1/3qKfAzGFlAhnCwMUpABOZws7I8NZhIe/BD3sLTJsD toYc2xoftf1Sh6mUhtiV40m+2RFirYwMN5ZffBImk7FX4MUM038LFseru67q3bnBg7MmLXn3hOk L+QE= X-Developer-Key: i=linux-kernel-dev@aliel.fr; a=openpgp; fpr=DFD863F61375BF917F0012173953305EF1D0EC3E X-Endpoint-Received: by B4 Relay for linux-kernel-dev@aliel.fr/default with auth_id=744 X-Original-From: Ronald Claveau Reply-To: linux-kernel-dev@aliel.fr From: Ronald Claveau The t7 thermal sensor needs a bus clock, in addition to the existing functional clock, to gate register access to the sensor. This bus clock is specific to each sensor, unlike the functional clock which is shared between sensors. The current binding only describes a single unnamed clock and therefore cannot represent this hardware requirement, so add a second clock entry and clock-names for clarity. Make the second clock mandatory for the t7-thermal compatible only, via an additional if/then/else, to avoid breaking other Amlogic SoCs that still use a single clock. Update the t7 example to match. Fixes: b1c8ccdbd4e9 ("dt-bindings: thermal: amlogic: Add support for T7") Reviewed-by: Krzysztof Kozlowski Signed-off-by: Ronald Claveau --- .../bindings/thermal/amlogic,thermal.yaml | 29 ++++++++++++++++++= ++-- 1 file changed, 27 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml= b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml index 8cfa44dcda58c..e72cb39ac635d 100644 --- a/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/amlogic,thermal.yaml @@ -32,7 +32,15 @@ properties: maxItems: 1 =20 clocks: - maxItems: 1 + minItems: 1 + items: + - description: Bus clock, gates register access to the sensor. + - description: Functional clock of the temperature sensor, shared be= tween sensors. + + clock-names: + items: + - const: bus + - const: core =20 power-domains: maxItems: 1 @@ -72,6 +80,22 @@ allOf: else: required: - amlogic,secure-monitor + - if: + properties: + compatible: + contains: + const: amlogic,t7-thermal + then: + properties: + clocks: + minItems: 2 + required: + - clock-names + else: + properties: + clocks: + maxItems: 1 + clock-names: false =20 unevaluatedProperties: false =20 @@ -94,7 +118,8 @@ examples: compatible =3D "amlogic,t7-thermal"; reg =3D <0x20000 0x50>; interrupts =3D ; - clocks =3D <&clkc_periphs CLKID_TS>; + clocks =3D <&clkc_periphs CLKID_SYS_TS_A73>, <&clkc_periphs CLKID_= TS>; + clock-names =3D "bus", "core"; #thermal-sensor-cells =3D <0>; amlogic,secure-monitor =3D <&sm 1>; }; --=20 2.49.0 From nobody Thu Sep 24 12:55:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C6F85383E8; Wed, 23 Sep 2026 14:38:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790174321; cv=none; b=Qltuc3iVsOjrECCWqtl0+Zj8FiNQffsOuee90OOyghliIgIy2Uonzrtl33YHMHlBLv0oEwfejOg+dii5s2d8D4gc0iRjM7PaWAloOFwh1U30MszNrznF6VPuuXSwpAW19H83WGk45BpU1yTS/z1xrT0h7dyYZt6xoti/6s0EqqM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1790174321; c=relaxed/simple; bh=2cp5TqtnmLKuQQO6egpZp0WLgpqr652FwOWFnsG50JI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=YmTsAvseEZ88lya8nwgQW/ZmAtIThAYhbsPvQBnF2JHJV4xaoP9PL63yRtAzXGEBqgsnmx/+tnwFQgJbBREmN4Zj7/jbVeup88tWlmsfDlSzUkOY3mRXzjsYrMKlB8xUJvJr9CkYDOAPJyQdoRBJf9Schi4wHzjm0P7mMs3yw1c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LbMHK+Zk; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LbMHK+Zk" Received: by smtp.kernel.org (Postfix) with ESMTPS id ECBA9C2BCF4; Wed, 23 Sep 2026 14:38:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1790174321; bh=2cp5TqtnmLKuQQO6egpZp0WLgpqr652FwOWFnsG50JI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=LbMHK+ZkDZGRpGB7+udgFUr9y+GZxuHe3dnhcBdgGzk63weTQOuTGuu6m0l6LsEQ7 r5YSliNyYmk55+va5u7XIESoQqZExsSuhDRxF6Nf066byG4HdTN/Ab1wFHF3i9uow7 JlCfRdF0FJ6kcfcrzq10/hfyWmeZTeUB5HQIMpJFbKm5nhW1PfG9oLS7UK6VMJ6W2/ pMi5TwAqYJ1rMnexZtVUAGp/tDH4tDyj+roKIRxDXE856eiUjfUk3Bp0KltMeebnDS HDx95iHKaGjXiw/R6U8qVzGzRG1wrWU0Wd2vMwN7teiUGxVYScQZ3RFIMQGUjL0bbo 4x/ikiSCFrIQg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE823C9830C; Wed, 23 Sep 2026 14:38:40 +0000 (UTC) From: Ronald Claveau via B4 Relay Date: Wed, 23 Sep 2026 16:37:51 +0200 Subject: [PATCH v2 2/2] thermal/drivers/amlogic: switch to clk_bulk API to support multiple clocks Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260923-fix-t7-thermal-clock-v2-2-bff7a09eb487@aliel.fr> References: <20260923-fix-t7-thermal-clock-v2-0-bff7a09eb487@aliel.fr> In-Reply-To: <20260923-fix-t7-thermal-clock-v2-0-bff7a09eb487@aliel.fr> To: Guillaume La Roque , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Conor Dooley , linux-pm@vger.kernel.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Ronald Claveau X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=2489; i=linux-kernel-dev@aliel.fr; h=from:subject:message-id; bh=d3X7NjHQSZTVQAEva268K6UvycI2mQfSqEccqomqrNU=; b=owGbwMvMwCWm1SvKXP3cUInxtFoSQ9bmJ7HPb1p8btvjlPvoXNjC7e8YnrUx5W5pqDwfua7rS OnJDau/dpSyMIhxMciKKbL0z7U88e7y0TNf96inwMxhZQIZwsDFKQATOanDyDB/j4efWe4T5wlm Uq0RB2RXbg40Ndlz+ULDKWduZ8N2WVdGhjvr5rxQ4e46tPZrBceLTsGNj837jiTo/dUWZZ/9dtX ZdB4A X-Developer-Key: i=linux-kernel-dev@aliel.fr; a=openpgp; fpr=DFD863F61375BF917F0012173953305EF1D0EC3E X-Endpoint-Received: by B4 Relay for linux-kernel-dev@aliel.fr/default with auth_id=744 X-Original-From: Ronald Claveau Reply-To: linux-kernel-dev@aliel.fr From: Ronald Claveau The t7-thermal variant now exposes two clocks (bus and core) in its devicetree binding, but the driver only knows how to get and manage a single struct clk. Using devm_clk_get() would silently ignore the second clock, so switch to devm_clk_bulk_get_all() and the matching clk_bulk_prepare_enable()/clk_bulk_disable_unprepare() calls. This lets the driver transparently handle however many clocks a given compatible declares, without needing per-variant clock-handling code, and keeps working for existing SoCs that only have one. Fixes: 18d65de8157c ("thermal/drivers/amlogic: Add support for secure monit= or calibration readout") Signed-off-by: Ronald Claveau --- drivers/thermal/amlogic_thermal.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/thermal/amlogic_thermal.c b/drivers/thermal/amlogic_th= ermal.c index a0b530624b60c..60728de6968ac 100644 --- a/drivers/thermal/amlogic_thermal.c +++ b/drivers/thermal/amlogic_thermal.c @@ -100,7 +100,8 @@ struct amlogic_thermal { const struct amlogic_thermal_data *data; struct regmap *regmap; struct regmap *sec_ao_map; - struct clk *clk; + struct clk_bulk_data *clks; + int num_clks; struct thermal_zone_device *tzd; u32 trim_info; struct meson_sm_firmware *sm_fw; @@ -142,7 +143,7 @@ static int amlogic_thermal_enable(struct amlogic_therma= l *data) { int ret; =20 - ret =3D clk_prepare_enable(data->clk); + ret =3D clk_bulk_prepare_enable(data->num_clks, data->clks); if (ret) return ret; =20 @@ -156,7 +157,7 @@ static void amlogic_thermal_disable(struct amlogic_ther= mal *data) { regmap_update_bits(data->regmap, TSENSOR_CFG_REG1, TSENSOR_CFG_REG1_ENABLE, 0); - clk_disable_unprepare(data->clk); + clk_bulk_disable_unprepare(data->num_clks, data->clks); } =20 static int amlogic_thermal_get_temp(struct thermal_zone_device *tz, int *t= emp) @@ -323,9 +324,10 @@ static int amlogic_thermal_probe(struct platform_devic= e *pdev) if (IS_ERR(pdata->regmap)) return PTR_ERR(pdata->regmap); =20 - pdata->clk =3D devm_clk_get(dev, NULL); - if (IS_ERR(pdata->clk)) - return dev_err_probe(dev, PTR_ERR(pdata->clk), "failed to get clock\n"); + ret =3D devm_clk_bulk_get_all(dev, &pdata->clks); + if (ret <=3D 0) + return dev_err_probe(dev, ret ?: -ENOENT, "failed to get clocks\n"); + pdata->num_clks =3D ret; =20 if (pdata->data->use_sm) ret =3D amlogic_thermal_probe_sm(pdev, pdata); --=20 2.49.0