From nobody Thu Sep 24 20:34:09 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 494FC33AD8C; Mon, 21 Sep 2026 03:56:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789962990; cv=none; b=PyUhcvgIF5XLnM8RvlYkAh6YPOQOElRzzG20KDgcEAa7VORchUKWoK/NQWnwW3SWYx+NhiRkRZDZJJvFtK9AWVhsp+ekcRN8iiPKq88ZfsJIgHlHHbK0RdNGaIa6rS9WbnPcrmbwUPL2lSAbNY2EN2zQ91ZWZrNtoqkKLRJ6GdQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789962990; c=relaxed/simple; bh=DuA4vGK359czk76fR54fow6IlJIGrbXTELlIgIlVM2E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=jmifNBxWGYek3ZT1gHsdIuQE4CntCEWFFPzTmeiQEiR0m+jhBdsNjblAyhxOX/xxXGC2bLlCrkNmYzmnABGOOXWSqTO9zoBv3G9mBQdW+FB2kPWDCVWXEhf4TSzRFg9lP8MluE1CjUYcZDiLRkJViFlDhZcXrhfRq11vCLVVEn0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=oEqDVXBE; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="oEqDVXBE" Received: by smtp.kernel.org (Postfix) with ESMTPS id C0D3FC2BCB3; Mon, 21 Sep 2026 03:56:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789962989; bh=DuA4vGK359czk76fR54fow6IlJIGrbXTELlIgIlVM2E=; h=From:Date:Subject:To:Cc:Reply-To:From; b=oEqDVXBE05MbgC2AVe1An3cAuYve8Lu3dtW6HXe0RIZeyBwfHHrhYG+Izem7HLDvD KyhOzb+5ngf9YupinvSechtOUCaFg80bwkXhODJebv6xi9zVyOUK4qdPeWQEkd0NAW wWPGAV5xI5MrP7qCIMp1xNdoZZOxBZuGdsXamKX+xQNB7bpa5KQM/d0SVz9XIhDI1t 7nfvdLACCu3Nwc5da1egjB23D/lwfRNdA9EwT01Zh3jsgpnl24SpHb6UA8F6F3au1Z nkvxNgSAyNzNWQAeZqWfhSV9AroNSlcJvNlM6s+7Ie5T1mMQ106K8nNPUu29yrw1H+ TlC3+Ju+bf+2w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98153C982E1; Mon, 21 Sep 2026 03:56:29 +0000 (UTC) From: Nicolo Giuliani via B4 Relay Date: Mon, 21 Sep 2026 05:56:29 +0200 Subject: [PATCH net v2] net: dsa: mv88e6xxx: 88E6191X and 88E6193X have no PTP Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260921-send-net-v2-1-031ad720f140@studio.unibo.it> X-B4-Tracking: v=1; b=H4sIAOyqsGoC/2WNQQ6CMBBFr0JmbQktLYgr72FclDLKuGhJpxAN4 e4WXLp8Py/vr8AYCRkuxQoRF2IKPoM6FeBG658oaMgMqlJN1clOMPpBeEyia601jamt02fI+hT xQe8jdYMswP038ty/0KU9smsjcQrxcxwu8pD/24sUUujaGNcq3RjEK6d5oFDOnvpQUo5v2/YFo RWcor0AAAA= X-Change-ID: 20260919-send-net-97aa5653ac48 To: Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Richard Cochran Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Nicolo Giuliani X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789962988; l=6074; i=nicolo.giuliani6@studio.unibo.it; s=20260919; h=from:subject:message-id; bh=zvg227S60l2Y4KCjY2ZtncW2AyMuzOIIib4Gk2dmg1o=; b=267QZv6EzlKHut28OGs6bee7NNvCO2ylUTtereN1FBJtrz6WZ65ovebBlYIm1VmCLUGJx59CP 7Gme7E5F2a0COndbzmMLnwQLUpWCEoK5kf7j5ZSR1ck9AsvzNiZKrLZ X-Developer-Key: i=nicolo.giuliani6@studio.unibo.it; a=ed25519; pk=D652ecdT01GkA1eoFWNFNX85xIg5ZnFwUWyjfestgQw= X-Endpoint-Received: by B4 Relay for nicolo.giuliani6@studio.unibo.it/20260919 with auth_id=1040 X-Original-From: Nicolo Giuliani Reply-To: nicolo.giuliani6@studio.unibo.it From: Nicolo Giuliani The 88E6191X and 88E6193X are 6393 family devices that share mv88e6393x_ops with the 88E6393X and are marked as ptp_support. Marvell's UMSD driver describes both as parts without AVB (88E6193X: "BGA package - No AVB, No Routing, No Cut-through"), and the register access confirms it on an 88E6193X: the whole indirect AVB register space behind Global 2 registers 0x16 and 0x17 reads zero, for every port, block and address, with the 6390 and with the 6352 command encoding. Writes to the TAI registers, including the clock period register and the TAI global configuration register, read back as zero. Since commit 7e3c18097a70 ("net: dsa: mv88e6xxx: read cycle counter period from hardware") the PTP setup reads the TAI clock period, so the switch fails to probe: mv88e6xxx ...: unexpected cycle counter period of 0 ps Add mv88e6191x_ops, a copy of mv88e6393x_ops without avb_ops and ptp_ops, use it for the 88E6191X and the 88E6193X and stop setting ptp_support for them. The 88E6393X is unchanged. Tested on an 88E6193X (Sophos XGS 107w): the switch probes and the ports work. I do not have an 88E6191X, it is changed because UMSD describes it the same way. Fixes: de776d0d316f ("net: dsa: mv88e6xxx: add support for mv88e6393x famil= y") Suggested-by: Andrew Lunn Assisted-by: LLM Signed-off-by: Nicolo Giuliani Reviewed-by: Andrew Lunn --- Changes in v2: - New patch instead of skipping PTP setup: the 88E6191X and 88E6193X have n= o AVB/PTP unit (per Andrew Lunn, from Marvell's UMSD; the AVB register spac= e reads zero on an 88E6193X), so they get their own ops without avb_ops and= ptp_ops and lose ptp_support - Link to v1: https://patch.msgid.link/20260919-send-net-v1-1-4355c72465ee@= studio.unibo.it --- drivers/net/dsa/mv88e6xxx/chip.c | 68 ++++++++++++++++++++++++++++++++++++= +--- 1 file changed, 64 insertions(+), 4 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/c= hip.c index 7f68a0c55..a4a8c7e11 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5639,6 +5639,68 @@ static const struct mv88e6xxx_ops mv88e6390x_ops =3D= { .pcs_ops =3D &mv88e6390_pcs_ops, }; =20 +static const struct mv88e6xxx_ops mv88e6191x_ops =3D { + /* MV88E6XXX_FAMILY_6393 without AVB and PTP: 6191X and 6193X */ + .irl_init_all =3D mv88e6390_g2_irl_init_all, + .get_eeprom =3D mv88e6xxx_g2_get_eeprom8, + .set_eeprom =3D mv88e6xxx_g2_set_eeprom8, + .set_switch_mac =3D mv88e6xxx_g2_set_switch_mac, + .phy_read =3D mv88e6xxx_g2_smi_phy_read_c22, + .phy_write =3D mv88e6xxx_g2_smi_phy_write_c22, + .phy_read_c45 =3D mv88e6xxx_g2_smi_phy_read_c45, + .phy_write_c45 =3D mv88e6xxx_g2_smi_phy_write_c45, + .port_set_link =3D mv88e6xxx_port_set_link, + .port_sync_link =3D mv88e6xxx_port_sync_link, + .port_set_rgmii_delay =3D mv88e6390_port_set_rgmii_delay, + .port_set_speed_duplex =3D mv88e6393x_port_set_speed_duplex, + .port_tag_remap =3D mv88e6390_port_tag_remap, + .port_set_policy =3D mv88e6393x_port_set_policy, + .port_set_frame_mode =3D mv88e6351_port_set_frame_mode, + .port_set_ucast_flood =3D mv88e6352_port_set_ucast_flood, + .port_set_mcast_flood =3D mv88e6352_port_set_mcast_flood, + .port_set_ether_type =3D mv88e6393x_port_set_ether_type, + .port_set_jumbo_size =3D mv88e6165_port_set_jumbo_size, + .port_egress_rate_limiting =3D mv88e6097_port_egress_rate_limiting, + .port_pause_limit =3D mv88e6390_port_pause_limit, + .port_disable_learn_limit =3D mv88e6xxx_port_disable_learn_limit, + .port_disable_pri_override =3D mv88e6xxx_port_disable_pri_override, + .port_get_cmode =3D mv88e6352_port_get_cmode, + .port_set_cmode =3D mv88e6393x_port_set_cmode, + .port_setup_message_port =3D mv88e6xxx_setup_message_port, + .port_set_upstream_port =3D mv88e6393x_port_set_upstream_port, + .port_enable_tcam =3D mv88e6xxx_port_enable_tcam, + .stats_snapshot =3D mv88e6390_g1_stats_snapshot, + .stats_set_histogram =3D mv88e6390_g1_stats_set_histogram, + .stats_get_sset_count =3D mv88e6320_stats_get_sset_count, + .stats_get_strings =3D mv88e6320_stats_get_strings, + .stats_get_stat =3D mv88e6390_stats_get_stat, + /* .set_cpu_port is missing because this family does not support a global + * CPU port, only per port CPU port which is set via + * .port_set_upstream_port method. + */ + .set_egress_port =3D mv88e6393x_set_egress_port, + .watchdog_ops =3D &mv88e6393x_watchdog_ops, + .mgmt_rsvd2cpu =3D mv88e6393x_port_mgmt_rsvd2cpu, + .pot_clear =3D mv88e6xxx_g2_pot_clear, + .hardware_reset_pre =3D mv88e6xxx_g2_eeprom_wait, + .hardware_reset_post =3D mv88e6xxx_g2_eeprom_wait, + .reset =3D mv88e6352_g1_reset, + .rmu_disable =3D mv88e6390_g1_rmu_disable, + .atu_get_hash =3D mv88e6165_g1_atu_get_hash, + .atu_set_hash =3D mv88e6165_g1_atu_set_hash, + .vtu_getnext =3D mv88e6390_g1_vtu_getnext, + .vtu_loadpurge =3D mv88e6390_g1_vtu_loadpurge, + .stu_getnext =3D mv88e6390_g1_stu_getnext, + .stu_loadpurge =3D mv88e6390_g1_stu_loadpurge, + .serdes_get_lane =3D mv88e6393x_serdes_get_lane, + .serdes_irq_mapping =3D mv88e6390_serdes_irq_mapping, + /* TODO: serdes stats */ + .gpio_ops =3D &mv88e6352_gpio_ops, + .phylink_get_caps =3D mv88e6393x_phylink_get_caps, + .pcs_ops =3D &mv88e6393x_pcs_ops, + .tcam_ops =3D &mv88e6393_tcam_ops, +}; + static const struct mv88e6xxx_ops mv88e6393x_ops =3D { /* MV88E6XXX_FAMILY_6393 */ .irl_init_all =3D mv88e6390_g2_irl_init_all, @@ -6163,8 +6225,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = =3D { .atu_move_port_mask =3D 0x1f, .pvt =3D true, .multi_chip =3D true, - .ptp_support =3D true, - .ops =3D &mv88e6393x_ops, + .ops =3D &mv88e6191x_ops, }, =20 [MV88E6193X] =3D { @@ -6190,8 +6251,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = =3D { .atu_move_port_mask =3D 0x1f, .pvt =3D true, .multi_chip =3D true, - .ptp_support =3D true, - .ops =3D &mv88e6393x_ops, + .ops =3D &mv88e6191x_ops, }, =20 [MV88E6220] =3D { --- base-commit: 6c096bb08de97cdca051fecddad22cac6a1fd275 change-id: 20260919-send-net-97aa5653ac48 Best regards, -- =20 Nicolo Giuliani