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BAM-DMUX DMA mappings must therefore be constrained to a designated region that can be shared with the modem. Add an optional memory-region property to reference a restricted DMA pool used for BAM-DMUX mappings, and a qcom,vmid property to identify the remote execution environment that is granted access to the pool through SCM. Require memory-region whenever qcom,vmid is specified. Co-developed-by: Deepak Kumar Singh Signed-off-by: Deepak Kumar Singh Signed-off-by: Vishnu Santhosh --- .../devicetree/bindings/net/qcom,bam-dmux.yaml | 38 ++++++++++++++++++= ++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml b/Doc= umentation/devicetree/bindings/net/qcom,bam-dmux.yaml index 33746c238513d72366bc52359fb10f275475b331..5351269b0ab72ede808ae47b55d= 57580af209038 100644 --- a/Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml +++ b/Documentation/devicetree/bindings/net/qcom,bam-dmux.yaml @@ -72,6 +72,24 @@ properties: - const: tx - const: rx =20 + memory-region: + maxItems: 1 + description: + Phandle to a reserved-memory node compatible with restricted-dma-poo= l. + The BAM-DMUX device uses the pool for DMA mappings. + + qcom,vmid: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 1 + items: + minimum: 1 + maximum: 63 + description: + VMID of the remote execution environment that is granted access to t= he + restricted DMA pool through SCM. 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Sergey Ryazanov , Johannes Berg Cc: linux-arm-msm@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Santhosh , Deepak Kumar Singh X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789873371; l=6606; i=vishnu.santhosh@oss.qualcomm.com; s=20251203; h=from:subject:message-id; bh=Bq/8VmaQSvu+teA/tFUI171RAyxDvtCGGxirmcY7iUY=; b=HrvaXyZvnGeDk3tyNWWY4NVpXJ7/rHHq6zd6/NwJ0v32xceEJfWIW/JOBDvxUeb+VZlh5g0xA 1DmmrBf/7x8BFyzWgH7sWLr8HtZDXrsivnmykWP8d1GS1RMJLZ2OX4T X-Developer-Key: i=vishnu.santhosh@oss.qualcomm.com; a=ed25519; pk=G8/AJPecB1feGI7wxArGWGN0PPGQS0GUaD4THQCbdis= X-Proofpoint-ORIG-GUID: DifJy_k5CA5LhVjnWSVY3XsKPfruXy1S X-Proofpoint-GUID: DifJy_k5CA5LhVjnWSVY3XsKPfruXy1S X-Authority-Analysis: v=2.4 cv=DtfDa2/+ c=1 sm=1 tr=0 ts=6aaf4cee cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=EUspDBNiAAAA:8 a=1SZFiLht8NXrNnb3tK8A:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIwMDAzOSBTYWx0ZWRfX62faXdOxK3Wd aXSkkeWqG/2vLuEMQx/HZfOE6onvTE+vMt1iii+9PdscRWjviBDNv32MTCOUqMOstZHA+8eyet7 WokVOixvlhrf2Lrgi1j5r6hVMKi2ZO7p++WqFOj40nT8SYz8iNXF8EzAdpSHfF9UDTNaRs0gY5I sUC1YTRjJsWcuINIau9+EKISlOJg0Q5eanKScBf0NFkKDw8mI2NRVdcB5oLALyjI+GmDjvv3GIy jqQ1zxJUWTWwTb+v+Ffu0+OuALFULWzOb7SAaYHsJK4Kc8OL3eMDXHBIuoOuAFkNL5Lyn8RUmT1 rkcY2cdqrSq6u0bZ/pO3jqr3RhduiULt4KIOZfuYR4g5k6nX9tkg8EmtlqnE9PgqAl6U7jQ0q6N 3h3yHi7r4xsxC5biKP4tze8AtJ9A3GIWASZIT5VJZO7exvewzOWGcFiI6MVKIFGPbqcoFoXKPsG slrtIYQ00X7Ih4pCA0g== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIwMDAzOSBTYWx0ZWRfX24dxbVUcEIHO mWvaDa8Iif63lSMFrefixyce956t2/IwW/Mvimest+r1KESn40yUsN8FQHQiQSrDGWMuZAU2Ang QGRTfdavt/N/NhJPvtSKdUm25OW4hnQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-20_01,2026-09-16_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 adultscore=0 spamscore=0 suspectscore=0 clxscore=1015 phishscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609200039 Some Qualcomm SoCs, such as Shikra, run the modem in a separate security domain with restricted access to system memory. BAM-DMUX DMA mappings and BAM descriptor FIFOs must therefore be constrained to a designated memory region that can be shared with the modem. Accesses outside that region can trigger an XPU violation. When qcom,vmid is present, require a restricted DMA pool and assign the entire pool to both the local and remote execution environments before requesting the DMA channels. This ensures that BAM-DMUX mappings are within the assigned region. When the BAM DMA controller references the same pool, its descriptor FIFOs are covered by the assignment as well. Track the assigned execution environments explicitly and reclaim the pool for the local environment after DMA channels and mappings are released during remove or probe error cleanup. Fail probing when restricted DMA pool support is unavailable, when the VMID property is malformed, or when memory-region does not reference a restricted DMA pool. Co-developed-by: Deepak Kumar Singh Signed-off-by: Deepak Kumar Singh Signed-off-by: Vishnu Santhosh --- drivers/net/wwan/Kconfig | 1 + drivers/net/wwan/qcom_bam_dmux.c | 95 ++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 96 insertions(+) diff --git a/drivers/net/wwan/Kconfig b/drivers/net/wwan/Kconfig index 958dbc7347fa84ee869439bf8b503037faab8bef..1b133c56231615269698140187c= a3141dfe48dbf 100644 --- a/drivers/net/wwan/Kconfig +++ b/drivers/net/wwan/Kconfig @@ -65,6 +65,7 @@ config MHI_WWAN_MBIM config QCOM_BAM_DMUX tristate "Qualcomm BAM-DMUX WWAN network driver" depends on (DMA_ENGINE && PM && QCOM_SMEM_STATE) || COMPILE_TEST + select QCOM_SCM help The BAM Data Multiplexer provides access to the network data channels of modems integrated into many older Qualcomm SoCs, e.g. Qualcomm diff --git a/drivers/net/wwan/qcom_bam_dmux.c b/drivers/net/wwan/qcom_bam_d= mux.c index cc6ace8d64371eb8d00c638a39b234ee540b83c9..c81e668d4e961a645f7e2d823c3= 136845f086b08 100644 --- a/drivers/net/wwan/qcom_bam_dmux.c +++ b/drivers/net/wwan/qcom_bam_dmux.c @@ -9,10 +9,12 @@ #include #include #include +#include #include #include #include #include +#include #include #include #include @@ -75,6 +77,9 @@ struct bam_dmux { struct completion pc_ack_completion; =20 struct dma_chan *rx, *tx; + phys_addr_t dma_pool_base; + size_t dma_pool_size; + u64 dma_pool_perms; struct bam_dmux_skb_dma rx_skbs[BAM_DMUX_NUM_SKB]; struct bam_dmux_skb_dma tx_skbs[BAM_DMUX_NUM_SKB]; spinlock_t tx_lock; /* Protect tx_skbs, tx_next_skb */ @@ -762,6 +767,90 @@ static int __maybe_unused bam_dmux_runtime_resume(stru= ct device *dev) return 0; } =20 +static int bam_dmux_assign_dma_pool(struct bam_dmux *dmux) +{ + struct device *dev =3D dmux->dev; + struct device_node *rmem_np; + struct reserved_mem *rmem; + struct qcom_scm_vmperm dst[2]; + u64 src =3D BIT_ULL(QCOM_SCM_VMID_HLOS); + u32 vmid; + int ret; + + if (!of_property_present(dev->of_node, "qcom,vmid")) + return 0; + + ret =3D of_property_read_u32(dev->of_node, "qcom,vmid", &vmid); + if (ret) + return dev_err_probe(dev, ret, "Failed to read qcom,vmid\n"); + if (vmid =3D=3D QCOM_SCM_VMID_HLOS || vmid >=3D BITS_PER_TYPE(u64)) + return dev_err_probe(dev, -EINVAL, "Invalid qcom,vmid %u\n", vmid); + + if (!IS_ENABLED(CONFIG_DMA_RESTRICTED_POOL)) + return dev_err_probe(dev, -EOPNOTSUPP, + "qcom,vmid requires DMA_RESTRICTED_POOL\n"); + + rmem_np =3D of_parse_phandle(dev->of_node, "memory-region", 0); + if (!rmem_np) + return dev_err_probe(dev, -EINVAL, + "qcom,vmid requires memory-region\n"); + + if (!of_device_is_compatible(rmem_np, "restricted-dma-pool")) { + of_node_put(rmem_np); + return dev_err_probe(dev, -EINVAL, + "memory-region must reference a restricted DMA pool\n"); + } + + rmem =3D of_reserved_mem_lookup(rmem_np); + of_node_put(rmem_np); + if (!rmem) + return dev_err_probe(dev, -EINVAL, + "Failed to look up restricted DMA pool\n"); + + if (!qcom_scm_is_available()) + return -EPROBE_DEFER; + + dst[0].vmid =3D QCOM_SCM_VMID_HLOS; + dst[0].perm =3D QCOM_SCM_PERM_RW; + dst[1].vmid =3D vmid; + dst[1].perm =3D QCOM_SCM_PERM_RW; + + ret =3D qcom_scm_assign_mem(rmem->base, rmem->size, &src, dst, + ARRAY_SIZE(dst)); + if (ret) + return dev_err_probe(dev, ret, + "SCM assign restricted DMA pool failed\n"); + + dmux->dma_pool_base =3D rmem->base; + dmux->dma_pool_size =3D rmem->size; + /* Track the destination VMIDs explicitly for the reclaim operation. */ + dmux->dma_pool_perms =3D BIT_ULL(QCOM_SCM_VMID_HLOS) | BIT_ULL(vmid); + + return 0; +} + +static void bam_dmux_reclaim_dma_pool(struct bam_dmux *dmux) +{ + struct qcom_scm_vmperm hlos =3D { + .vmid =3D QCOM_SCM_VMID_HLOS, + .perm =3D QCOM_SCM_PERM_RW, + }; + u64 src =3D dmux->dma_pool_perms; + int ret; + + if (!dmux->dma_pool_perms) + return; + + ret =3D qcom_scm_assign_mem(dmux->dma_pool_base, dmux->dma_pool_size, &sr= c, + &hlos, 1); + if (ret) { + dev_err(dmux->dev, "SCM reclaim restricted DMA pool failed: %d\n", ret); + return; + } + + dmux->dma_pool_perms =3D 0; +} + static int bam_dmux_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -796,6 +885,10 @@ static int bam_dmux_probe(struct platform_device *pdev) "Failed to get pc-ack state\n"); dmux->pc_ack_mask =3D BIT(bit); =20 + ret =3D bam_dmux_assign_dma_pool(dmux); + if (ret) + return ret; + init_waitqueue_head(&dmux->pc_wait); init_completion(&dmux->pc_ack_completion); complete_all(&dmux->pc_ack_completion); @@ -845,6 +938,7 @@ static int bam_dmux_probe(struct platform_device *pdev) err_disable_pm: pm_runtime_disable(dev); pm_runtime_dont_use_autosuspend(dev); + bam_dmux_reclaim_dma_pool(dmux); return ret; } =20 @@ -879,6 +973,7 @@ static void bam_dmux_remove(struct platform_device *pde= v) disable_irq(dmux->pc_irq); bam_dmux_power_off(dmux); bam_dmux_free_skbs(dmux->tx_skbs, DMA_TO_DEVICE); + bam_dmux_reclaim_dma_pool(dmux); } =20 static const struct dev_pm_ops bam_dmux_pm_ops =3D { --=20 2.34.1