From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 626D937CD4E; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=FIj4wpxJG+1AxTHOiyS0FYc12zc9lRAi1FccKAy97sjo0WuScX97gGMXppA7IELUMmJsabEdRVrj1UiFm1K9/ATfPcoBHc/hFQVfD8fEzCSQgPgwj0B5L/Ff0EhdUwC25jJo1wqHYkzSF1rdDQq2IQw63KbWBK5MDmceFlBaxI0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=YwJV5O8cmdvTIyiLmbixpQIu1ZGWraSA7qGPByfusX8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mcGvTQnumQBrOH/NyKXQeiXo/HNixEYk53MCWXKOKtBMc7wskpSZJHCG0jeX14SWf2GXpwIGrRmLdHi+gXJHZx50BkhHtRpz0yhLnBA3Kz7K5sSHsLIBdTxCJ89Phrz+r144DQat4ulVvBUcxJRKgC+ZEEULjFVjOrKN5TGzOfE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=PYbgtb8i; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="PYbgtb8i" Received: by smtp.kernel.org (Postfix) with ESMTPS id 0BF48C2BCF5; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=YwJV5O8cmdvTIyiLmbixpQIu1ZGWraSA7qGPByfusX8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=PYbgtb8iVqXg7KCBzbkc+g07jZr8WU2KxvFOfMYdGswChtHMlB6+7Hs9B5LLd1uoT He0wZcJhYUjY/RZF7mF6xXyhqAf9FtKPDYmFq1ZVtWzZgNfvbqwDNdpjwu7Fl8SMlI nz94ksqUsLw/lBKjhcukrAgwpQiHefS/T/jK8FUiKNBK85GD9WSjWBhcISvu6f8ew3 bVU25/CmeBZgkUMIMsi6y/i28eiDsVZ4V9X1Q0RYEI76XkXH+8JwjZrZ16Bsemc9hE DR+gxZ8XV85kXMl2/LJ3rw8eL/6iR722qWJ3ChwRBnDsLfnIgUmXflOL/1f61JDNtD RrtL1hgwlRfyw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1567C982CC; Sun, 20 Sep 2026 10:25:06 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:03 +0800 Subject: [PATCH v2 01/12] dt-bindings: soc: amlogic: Reordering compatible of clk-measure Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-1-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=1310; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=E0ttr7BdgbtQoJSGx2q0pEoA5GFoRJFe8UYzVUUxKY4=; b=P2i287sc1mgc4lPTdd06RMlJr9FfbF4fhs8o4EjiAUr3kwToKdHP4NN3mEdjraRBDKiYqe92J zbwSMbpBTT5Cw/jjHXY3BIz5oWYurNquUHm/74pS7Jnuroe6pZD4KbZ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Sort the compatible properties defined by clk-measure in alphabetical order. Signed-off-by: Chuan Liu Acked-by: Krzysztof Kozlowski --- .../bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 10 +++++-= ---- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx= -clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,m= eson-gx-clk-measure.yaml index b1200e6940ac..ad37eca48103 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml @@ -16,15 +16,15 @@ maintainers: properties: compatible: enum: - - amlogic,meson-gx-clk-measure - - amlogic,meson8-clk-measure - - amlogic,meson8b-clk-measure + - amlogic,a1-clk-measure + - amlogic,c3-clk-measure - amlogic,meson-axg-clk-measure - amlogic,meson-g12a-clk-measure + - amlogic,meson-gx-clk-measure - amlogic,meson-sm1-clk-measure - - amlogic,c3-clk-measure + - amlogic,meson8-clk-measure + - amlogic,meson8b-clk-measure - amlogic,s4-clk-measure - - amlogic,a1-clk-measure - amlogic,t7-clk-measure =20 reg: --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 62768386C39; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=Np9xKi3TEi38okM0gqIUDjmhICjNZxh7YLcBAQNHef9wC0yUbZI5gHAuVIRS5xK6iqBWph99USS0CSMYaaadI5jxje+3HR8JCxbUisrRsBqJKe9+uJHUuSKIUPzEfGuYZsbH6rMMZgRyAmCgjpXME5eVDer29Mh9qtDKAWT9/dk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=kEIyTYVWhIo4bZSTQ3AbETvRlpmXVWyXqEQrca8eNK4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fOpPS7BuhtwToGBAspl6hd4u5hBocdURFgefPqNM3smoztx/3oukpIOncCUZZYaPbe+U7zReS9IX+hoLgTIL0f/kicAizpQMaQJpCU9dD4vcGHj/y/gk2LM7qlJb6wB1qyvtGH7OodFMYiWRg67CX1ZDX45GwDb6LULXxCJOq+Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=LmamSxpI; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="LmamSxpI" Received: by smtp.kernel.org (Postfix) with ESMTPS id 1CA1CC2BCFB; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=kEIyTYVWhIo4bZSTQ3AbETvRlpmXVWyXqEQrca8eNK4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=LmamSxpIi0ZOBeIlL+jFx6gBDIicnzEdkYF6+WmI+V4jInuF3/C48ntJAyJyeLLrT r4Te4PcbuyPaAnDM5VgH3LG+505KmDD4KfzTsWibn3mPAlGHGqkZs2QcyZTD+/PRj9 QhPMoQ42Bkglsb+gsAGzITeI2riQPB6ITgR2v8VbfZ+GLRPuQ9sEBmhh0QiU8o+Qsm 8lCU3OxrH3W7eBAUhrTszuH820Rpk9D80cYd2Z40qF9GaOJj8Ywel2Cv4k/wQzzQZe +v4xpKLeQA2VkQowWazsJgbUZek1GA7eQPLhetPwmpPhb8Vu4pA4V9s9bN9qeLcjuN CCCxsbq0XKEBg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id F10DFC982D0; Sun, 20 Sep 2026 10:25:06 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:04 +0800 Subject: [PATCH v2 02/12] dt-bindings: soc: amlogic: Add clk-measure compatible to support more SoCs Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-2-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=1482; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=iFtxCfNyNxPARsbwj859QUiks8NB1PYnjftvkWk6O4w=; b=n+6DE+7fBlM1JfnSWqS5Se1LkQPL36RhfgtOAcoBHnGLrTW7Iubv5I5sLFdtZKHw4/BYAuJkL h5L30EO/EkFDy2zhjuXgKE0FEd1sPAnCwt8S/HXIhNrILGG0/EPhoZC X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add clk-measure compatible for amlogic A5, A4, S7, S7D, S6 and A9 SoCs. Although the clk-measure IP itself has little hardware difference across SoCs, the clock inputs connected to the clk-measure block vary between SoCs. Therefore, it is difficult to fall back to the configuration used by previous SoCs. Signed-off-by: Chuan Liu Acked-by: Krzysztof Kozlowski --- .../bindings/soc/amlogic/amlogic,meson-gx-clk-measure.yaml | 6 ++= ++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx= -clk-measure.yaml b/Documentation/devicetree/bindings/soc/amlogic/amlogic,m= eson-gx-clk-measure.yaml index ad37eca48103..16893f427532 100644 --- a/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml +++ b/Documentation/devicetree/bindings/soc/amlogic/amlogic,meson-gx-clk-me= asure.yaml @@ -17,6 +17,9 @@ properties: compatible: enum: - amlogic,a1-clk-measure + - amlogic,a4-clk-measure + - amlogic,a5-clk-measure + - amlogic,a9-clk-measure - amlogic,c3-clk-measure - amlogic,meson-axg-clk-measure - amlogic,meson-g12a-clk-measure @@ -25,6 +28,9 @@ properties: - amlogic,meson8-clk-measure - amlogic,meson8b-clk-measure - amlogic,s4-clk-measure + - amlogic,s6-clk-measure + - amlogic,s7-clk-measure + - amlogic,s7d-clk-measure - amlogic,t7-clk-measure =20 reg: --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 654E93E557C; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=JI9r+Jx/YjoL+UWOHylRscm44WKyih9G1Y+6n3rgwIW15C2IIbhwBDqrFTLkeSKLBz+2kdhFZ1sFK6JvMUZwTwgoIqRg7gstTP9vdmwjmUXfgVeuCZF4gqP9pJaH4CyUIkJabUn3befT9xTfNDQNOKCkqRS4KqzV/eF7oIs7Nls= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=DiPGG6/1y2xmrETzC91peDuTfVXoxRXsfQ56MzCZN9c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=jhALXBF4ECzSLJEM5Wi98YCCWEg2AKgWVErmO5tXSpdbKJ3AH4GlIf2gU9W/7i9OGN7AwCwbn1fSr2a90x+Qkb2S63xkPsaGvMMeTxz+aoLevcrHLFSAGSXzjksz/ghttJjWbKAAVfTB1GG/fz5AGX6/cIdsAWCRRZG3khrfmcg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=JlhulgHz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="JlhulgHz" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2BE55C2BCFF; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=DiPGG6/1y2xmrETzC91peDuTfVXoxRXsfQ56MzCZN9c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=JlhulgHzo1Uq8xQaSeaE5yFJFwQW7NePZQkWKJkruilbtLTRcHXx/cp7o7VjfGipk z7rqIcr2TNtgBkprIB+Rb3laIxnm7PWZb+ZrwxycbY3h71sE2/D69ERUKnHizuuotH G+Y6SDbtkR8pjeOr3SMxeD6inzNYZNx9fCKiqvF3WdkmMMAAvPpk4ZpghQk1j/Tqrz YPVuymCUqpCvVno+UjLJ7NtQk4S7/8HVAp3QVGEGaAFUc8ntxO2UZjc8vvAgpm9R6m rWr32FbbkJCKtOP70xGRLig8U6POIyyQ+yfCPI71ZP0TYb4BaW4sZk/t3TqUKB7031 pzr9TZGMs1S9w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0DD46C982EA; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:05 +0800 Subject: [PATCH v2 03/12] soc: amlogic: clk-measure: Support more measurement channels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-3-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=1344; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=e2ydz5bLAgoXoKx1id6ARA1Qq/OeV3kWw0wR36wz9Ks=; b=0kYDHEMG2Lp7QnH8bZMG7IEpHfqcExl7IxtSh1NJ7/jFnZZd25yFr5rPr/Shj3vXkPwRQToqb ToqAllBeLgqDOBiXdUwNPvAWnYcmFcsm3DtvKuF6qferH0spzUEEvv/ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu On S4 and C3, as well as later SoCs, the clk-measure IP expands the number of supported measurement channels from 128 to 256. Accordingly, the MSR_CLK_SRC field in the register is extended from 7 bits to 8 bits. To support both the old and new implementations, the driver now uniformly defines the valid MSR_CLK_SRC field as bits[27:20]. For SoCs where MSR_CLK_SRC is only 7 bits wide, the driver never sets bit27, and on those SoCs bit27 is read-only. Therefore, using bits[27:20] as the unified field definition does not introduce any behavioral change or compatibility issue for existing SoCs. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 8a1a9fed0e74..0d4ba2555d17 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -20,7 +20,7 @@ static DEFINE_MUTEX(measure_lock); #define MSR_CONT BIT(17) /* continuous measurement */ #define MSR_INTR BIT(18) /* interrupts */ #define MSR_RUN BIT(19) -#define MSR_CLK_SRC GENMASK(26, 20) +#define MSR_CLK_SRC GENMASK(27, 20) #define MSR_BUSY BIT(31) =20 #define MSR_VAL_MASK GENMASK(15, 0) --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AF843E5A32; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=H7911N97PLdw8pUpVILj10PEBTgvlDIYEQgeJqqAQccIg1iFpY6/i0ctq9x4l2anGOzep7xZ3XhGSC0Qa+lMW6NvGEt1uU/C0eVnWPL7W2i4wlG+BvRlGFCQIGPltIPvBir+UtJzf6QnnnN2L+gLfsRUU8EVrLeUQoshtH9IaZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=eTxnJigNpnWXtmI4MZBvwR7lM1CHRz4uuZ4G5XSJRls=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IzhwJ9cpID3P0RvfiGt7a9TYbJrYJotGsA3j82XlJ0Xsw82gsFNprR0ufkqWj8SRlVlJPkR5udyJ2+Y4Fm+wYRW7L0HNjXqN5pDhzaQSIUh7hDXvQb7EAG7WCcsXne8Sd2yG1Jt1NwKSMIT3zd+036v4tDKPUSviSaat4GviXYI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lpuk5y9F; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lpuk5y9F" Received: by smtp.kernel.org (Postfix) with ESMTPS id 33A05C2BD01; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=eTxnJigNpnWXtmI4MZBvwR7lM1CHRz4uuZ4G5XSJRls=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=lpuk5y9Fz9W6Jmc2eeeHBeQys96jvJxxxHlvlUQIARzQ4yO8JDpvl3b+T4EdmY5Z2 5XjQ8KfrH8sKriABn6wKSvcYCyRxy1KmGgWOK62H07XOqpSTSw7YNMNDugMxTJahk2 jV1i2V4X/mhaIi8ZdQNl0SnjupChV4apStM48VFyqGJgXauG0cy1Ifmahjg8137IxO L3OJYTqxl79A1Vqd+Cy3TSzqF/EClznW7xuv5q9VBrGaVkmheGYkUpXG0iNIRCECSK xTWXKTL1mX4CNrda+XbqSLQQulyCA84MN/fAAJ974fiz/jBNyJQht9ZKjKwKNUmMu5 hmRFpR741gwpg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D9ECC982E6; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:06 +0800 Subject: [PATCH v2 04/12] soc: amlogic: clk-measure: Align compatible entries with DT bindings Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-4-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=3018; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=N4Mx9eqZjQKXjqKlyxwgJVxp+RMgOs2WzYEHRChMU3s=; b=FBt+mP4nvxZ0zj8/a5vbJEOhDz5lKQllZx7AGXo7yCzqBj581hQtEUz7qg0JWGGnNbFSiX2fM Gm5afsxZ3uMBNGhpG6T8CfvAThO+lMlQ5ri7SycBoCxzkeEii2Ffm8z X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Reorder the meson_msr_match_table entries to match the order of the compatible strings in the DT binding. Move the newly added clk_msr_a1_data entry accordingly, while keeping the existing SoC-specific data order unchanged. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 40 ++++++++++++++++-------------= ---- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 0d4ba2555d17..d58c8d9629ea 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -1279,6 +1279,12 @@ static const struct msr_reg_offset msr_reg_offset_v2= =3D { .duty_val =3D 0x18, }; =20 +static const struct meson_msr_data clk_msr_a1_data =3D { + .msr_table =3D (void *)clk_msr_a1, + .msr_count =3D ARRAY_SIZE(clk_msr_a1), + .reg =3D &msr_reg_offset_v2, +}; + static const struct meson_msr_data clk_msr_c3_data =3D { .msr_table =3D (void *)clk_msr_c3, .msr_count =3D ARRAY_SIZE(clk_msr_c3), @@ -1291,12 +1297,6 @@ static const struct meson_msr_data clk_msr_s4_data = =3D { .reg =3D &msr_reg_offset_v2, }; =20 -static const struct meson_msr_data clk_msr_a1_data =3D { - .msr_table =3D (void *)clk_msr_a1, - .msr_count =3D ARRAY_SIZE(clk_msr_a1), - .reg =3D &msr_reg_offset_v2, -}; - static const struct meson_msr_data clk_msr_t7_data =3D { .msr_table =3D (void *)clk_msr_t7, .msr_count =3D ARRAY_SIZE(clk_msr_t7), @@ -1305,16 +1305,12 @@ static const struct meson_msr_data clk_msr_t7_data = =3D { =20 static const struct of_device_id meson_msr_match_table[] =3D { { - .compatible =3D "amlogic,meson-gx-clk-measure", - .data =3D &clk_msr_gx_data, - }, - { - .compatible =3D "amlogic,meson8-clk-measure", - .data =3D &clk_msr_m8_data, + .compatible =3D "amlogic,a1-clk-measure", + .data =3D &clk_msr_a1_data, }, { - .compatible =3D "amlogic,meson8b-clk-measure", - .data =3D &clk_msr_m8_data, + .compatible =3D "amlogic,c3-clk-measure", + .data =3D &clk_msr_c3_data, }, { .compatible =3D "amlogic,meson-axg-clk-measure", @@ -1324,21 +1320,25 @@ static const struct of_device_id meson_msr_match_ta= ble[] =3D { .compatible =3D "amlogic,meson-g12a-clk-measure", .data =3D &clk_msr_g12a_data, }, + { + .compatible =3D "amlogic,meson-gx-clk-measure", + .data =3D &clk_msr_gx_data, + }, { .compatible =3D "amlogic,meson-sm1-clk-measure", .data =3D &clk_msr_sm1_data, }, { - .compatible =3D "amlogic,c3-clk-measure", - .data =3D &clk_msr_c3_data, + .compatible =3D "amlogic,meson8-clk-measure", + .data =3D &clk_msr_m8_data, }, { - .compatible =3D "amlogic,s4-clk-measure", - .data =3D &clk_msr_s4_data, + .compatible =3D "amlogic,meson8b-clk-measure", + .data =3D &clk_msr_m8_data, }, { - .compatible =3D "amlogic,a1-clk-measure", - .data =3D &clk_msr_a1_data, + .compatible =3D "amlogic,s4-clk-measure", + .data =3D &clk_msr_s4_data, }, { .compatible =3D "amlogic,t7-clk-measure", --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 935223F12C6; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-5-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=33682; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=RToDY3ddvXUu2DYbPtYat5Wyfxu+ZmVouzKYkYUHhs4=; b=ss69lILyth4Dq4hcxFmf+8VMwMwDSdJyHED50PHKHPAzUxC7oGB/InoZjW/ui8ZIkSDCTEaTz GFU4mtb++yOCd3MPdfOpwP6HKPlP06dexBB8aQ7Ce9oDBEwegDKz+AQ X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add clk-measure driver support for Amlogic A5, A4, S7, S7D, S6 and A9 SoCs. Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 897 ++++++++++++++++++++++++++++= ++++ 1 file changed, 897 insertions(+) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index d58c8d9629ea..50928ac14f86 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -1041,6 +1041,843 @@ static const struct meson_msr_id clk_msr_t7[] =3D { CLK_MSR_ID(222, "enc0") }; =20 +static const struct meson_msr_id clk_msr_a4[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "p22_usb2_ckout"), + CLK_MSR_ID(4, "p21_usb2_ckout"), + CLK_MSR_ID(5, "p20_usb2_ckout"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(8, "eth_mpll_test"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(16, "sys_oscin32k_i"), + CLK_MSR_ID(17, "rtc_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "gp1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(27, "rtc_sec_pulse_out"), + CLK_MSR_ID(28, "rtc_osc_clk_out"), + CLK_MSR_ID(30, "mod_eth_phy_ref_clk"), + CLK_MSR_ID(31, "mod_eth_tx_clk"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(35, "mod_eth_rx_clk_rmii"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(41, "audio_core"), + CLK_MSR_ID(51, "cts_vout_venc_clk_ph"), + CLK_MSR_ID(52, "cts_vout_venc_clk"), + CLK_MSR_ID(106, "deskew_pll_test_clk"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "ts"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "spicc1"), + CLK_MSR_ID(118, "spicc0"), + CLK_MSR_ID(119, "o_mst_sclk_vad"), + CLK_MSR_ID(120, "o_mst_mclk_vad"), + CLK_MSR_ID(121, "o_pdm_sysclk"), + CLK_MSR_ID(122, "mod_audio_pdm_dclk_o"), + CLK_MSR_ID(123, "o_vad_clk"), + CLK_MSR_ID(124, "earcrx_dmac_clk"), + CLK_MSR_ID(125, "earcrx_cmdc_clk"), + CLK_MSR_ID(126, "earctx_dmac_clk"), + CLK_MSR_ID(127, "earctx_cmdc_clk"), + CLK_MSR_ID(128, "tohdmitx_bclk"), + CLK_MSR_ID(129, "tohdmitx_mclk"), + CLK_MSR_ID(130, "tohdmitx_spdif_clk"), + CLK_MSR_ID(131, "toacodec_bclk"), + CLK_MSR_ID(132, "toacodec_mclk"), + CLK_MSR_ID(133, "spdifout_b_mst_clk"), + CLK_MSR_ID(134, "spdifout_mst_clk"), + CLK_MSR_ID(135, "spdifin_mst_clk"), + CLK_MSR_ID(136, "audio_mclk"), + CLK_MSR_ID(137, "vad_clk"), + CLK_MSR_ID(138, "tdmout_d_sclk"), + CLK_MSR_ID(139, "tdmout_c_sclk"), + CLK_MSR_ID(140, "tdmout_b_sclk"), + CLK_MSR_ID(141, "tdmout_a_sclk"), + CLK_MSR_ID(142, "tdminb_lb_sclk"), + CLK_MSR_ID(143, "tdmin_lb_sclk"), + CLK_MSR_ID(144, "tdmin_d_sclk"), + CLK_MSR_ID(145, "tdmin_c_sclk"), + CLK_MSR_ID(146, "tdmin_b_sclk"), + CLK_MSR_ID(147, "tdmin_a_sclk"), + CLK_MSR_ID(148, "resampleb_clk"), + CLK_MSR_ID(149, "resamplea_clk"), + CLK_MSR_ID(150, "pdmb_sysclk"), + CLK_MSR_ID(151, "pdmb_dclk"), + CLK_MSR_ID(152, "pdm_sysclk"), + CLK_MSR_ID(153, "pdm_dclk"), + CLK_MSR_ID(154, "alockerb_out_clk"), + CLK_MSR_ID(155, "alockerb_in_clk"), + CLK_MSR_ID(156, "alocker_out_clk"), + CLK_MSR_ID(157, "alocker_in_clk"), + CLK_MSR_ID(158, "audio_mst_clk[34]"), + CLK_MSR_ID(159, "audio_mst_clk[35]"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(170, "AU_ADC_CLK_G128X"), + CLK_MSR_ID(171, "AU_ADC_CLK_TO_GPIO"), + CLK_MSR_ID(172, "AU_DAC1_CLK_G128X"), + CLK_MSR_ID(173, "AU_DAC1_CLK_TO_GPIO"), + CLK_MSR_ID(176, "rng_ring_osc_clk[0]"), + CLK_MSR_ID(177, "rng_ring_osc_clk[1]"), + CLK_MSR_ID(178, "rng_ring_osc_clk[2]"), + CLK_MSR_ID(179, "rng_ring_osc_clk[3]"), + CLK_MSR_ID(180, "sys_cpu_osc_ring[0](ULVT16)"), + CLK_MSR_ID(181, "sys_cpu_osc_ring[1](ULVT20)"), + CLK_MSR_ID(182, "sys_cpu_osc_ring[2](ULVT16)"), + CLK_MSR_ID(183, "sys_cpu_osc_ring[3](ULVT16)"), + CLK_MSR_ID(184, "sys_cpu_osc_ring[4](ULVT16)"), + CLK_MSR_ID(185, "am_ring_osc_clk_out_top[0](SVT16)"), + CLK_MSR_ID(186, "am_ring_osc_clk_out_top[1](LVT20)"), +}; + +static const struct meson_msr_id clk_msr_a5[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "dspa"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "mpll0"), + CLK_MSR_ID(12, "mpll1"), + CLK_MSR_ID(13, "mpll2"), + CLK_MSR_ID(14, "mpll3"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(16, "sys_oscin32k_i"), + CLK_MSR_ID(17, "rtc_pll"), + CLK_MSR_ID(18, "mpll_clk_test_out"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "gp1_pll"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "nna_axi"), + CLK_MSR_ID(26, "nna_core"), + CLK_MSR_ID(27, "rtc_sec_pulse_out"), + CLK_MSR_ID(28, "rtc_osc_clk_out"), + CLK_MSR_ID(30, "mod_eth_phy_ref_clk"), + CLK_MSR_ID(31, "mod_eth_tx_clk"), + CLK_MSR_ID(35, "mod_eth_rx_clk_rmii"), + CLK_MSR_ID(79, "rama_clk"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "ts"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "spicc1"), + CLK_MSR_ID(118, "spicc0"), + CLK_MSR_ID(119, "o_mst_sclk_vad"), + CLK_MSR_ID(120, "o_mst_mclk_vad"), + CLK_MSR_ID(121, "o_pdm_sysclk"), + CLK_MSR_ID(122, "mod_audio_pdm_dclk_o"), + CLK_MSR_ID(123, "o_vad_clk"), + CLK_MSR_ID(124, "earcrx_dmac_clk"), + CLK_MSR_ID(125, "earcrx_cmdc_clk"), + CLK_MSR_ID(126, "earctx_dmac_clk"), + CLK_MSR_ID(127, "earctx_cmdc_clk"), + CLK_MSR_ID(128, "tohdmitx_bclk"), + CLK_MSR_ID(129, "tohdmitx_mclk"), + CLK_MSR_ID(130, "tohdmitx_spdif_clk"), + CLK_MSR_ID(131, "toacodec_bclk"), + CLK_MSR_ID(132, "toacodec_mclk"), + CLK_MSR_ID(133, "spdifout_b_mst_clk"), + CLK_MSR_ID(134, "spdifout_mst_clk"), + CLK_MSR_ID(135, "spdifin_mst_clk"), + CLK_MSR_ID(136, "audio_mclk"), + CLK_MSR_ID(137, "vad_clk"), + CLK_MSR_ID(138, "tdmout_d_sclk"), + CLK_MSR_ID(139, "tdmout_c_sclk"), + CLK_MSR_ID(140, "tdmout_b_sclk"), + CLK_MSR_ID(141, "tdmout_a_sclk"), + CLK_MSR_ID(142, "tdminb_lb_sclk"), + CLK_MSR_ID(143, "tdmin_lb_sclk"), + CLK_MSR_ID(144, "tdmin_d_sclk"), + CLK_MSR_ID(145, "tdmin_c_sclk"), + CLK_MSR_ID(146, "tdmin_b_sclk"), + CLK_MSR_ID(147, "tdmin_a_sclk"), + CLK_MSR_ID(148, "resampleb_clk"), + CLK_MSR_ID(149, "resamplea_clk"), + CLK_MSR_ID(150, "pdmb_sysclk"), + CLK_MSR_ID(151, "pdmb_dclk"), + CLK_MSR_ID(152, "pdm_sysclk"), + CLK_MSR_ID(153, "pdm_dclk"), + CLK_MSR_ID(154, "alockerb_out_clk"), + CLK_MSR_ID(155, "alockerb_in_clk"), + CLK_MSR_ID(156, "alocker_out_clk"), + CLK_MSR_ID(157, "alocker_in_clk"), + CLK_MSR_ID(158, "audio_mst_clk[34]"), + CLK_MSR_ID(159, "audio_mst_clk[35]"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(176, "rng_ring_osc_clk[0]"), + CLK_MSR_ID(177, "rng_ring_osc_clk[1]"), + CLK_MSR_ID(178, "rng_ring_osc_clk[2]"), + CLK_MSR_ID(179, "rng_ring_osc_clk[3]"), + CLK_MSR_ID(180, "dmc_osc_ring(LVT16)"), + CLK_MSR_ID(181, "dsp_osc_ring(SVT16)"), + CLK_MSR_ID(182, "axi_srama_osc_ring(SVT16)"), + CLK_MSR_ID(183, "nna_osc_ring[0](ULVT20)"), + CLK_MSR_ID(184, "nna_osc_ring[1](LVT16)"), + CLK_MSR_ID(185, "sys_cpu_osc_ring[0](ULVT16)"), + CLK_MSR_ID(186, "sys_cpu_osc_ring[1](ULVT20)"), + CLK_MSR_ID(187, "sys_cpu_osc_ring[2](ULVT16)"), + CLK_MSR_ID(188, "sys_cpu_osc_ring[3](LVT16)"), + CLK_MSR_ID(189, "axi_sramb_osc_ring(SVT16)"), +}; + +static const struct meson_msr_id clk_msr_a9[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "dspa"), + CLK_MSR_ID(4, "mali_stack"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(7, "a78_clk_div16"), + CLK_MSR_ID(8, "dsu_clk_div16"), + CLK_MSR_ID(9, "isp"), + CLK_MSR_ID(10, "gp2_pll"), + CLK_MSR_ID(11, "fclk_div5"), + CLK_MSR_ID(12, "u2drd_usb2_ckout"), + CLK_MSR_ID(13, "pre0_hdmirx_aud_pll_clk"), + CLK_MSR_ID(14, "hrx20_pll_clk_test"), + CLK_MSR_ID(15, "u2h_usb2_ckout"), + CLK_MSR_ID(16, "fclk_50m"), + CLK_MSR_ID(17, "u3drd_b_usb2_ckout"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "csi_phy"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(26, "ext_Tsin_B_CLK_IN"), + CLK_MSR_ID(27, "u3p2pll1_0_clk_div16"), + CLK_MSR_ID(28, "u3p2pll1_1_clk_div16"), + CLK_MSR_ID(29, "upcrx0_cdrclk"), + CLK_MSR_ID(30, "upcrx1_cdrclk"), + CLK_MSR_ID(31, "hdmirx_aud_sck"), + CLK_MSR_ID(32, "uptx0_clk_sync_b20"), + CLK_MSR_ID(33, "uptx1_clk_sync_b20"), + CLK_MSR_ID(34, "lp_pll_clk0"), + CLK_MSR_ID(35, "lp_pll_clk1"), + CLK_MSR_ID(36, "u3hsg_PCIE_PIPE_PCLK"), + CLK_MSR_ID(37, "u3hsg_upcrx_cdrclk"), + CLK_MSR_ID(38, "u3hsg_upctx_clk_sync_b20"), + CLK_MSR_ID(39, "u3hsg_upcrxpll_clk_test"), + CLK_MSR_ID(40, "hdmirx_acr_lclk"), + CLK_MSR_ID(41, "i3c"), + CLK_MSR_ID(42, "hdmirx_aud_pll"), + CLK_MSR_ID(43, "hdmirx_acr_ref"), + CLK_MSR_ID(44, "hdmirx_meter"), + CLK_MSR_ID(45, "hdmirx_hdcp2x"), + CLK_MSR_ID(46, "hdmirx_5m"), + CLK_MSR_ID(47, "hdmirx_2m"), + CLK_MSR_ID(48, "hdmirx_cfg"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "encoder0_if_clk"), + CLK_MSR_ID(52, "encoder1"), + CLK_MSR_ID(53, "encoder0"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "mali_aclkm"), + CLK_MSR_ID(56, "vid1_pll"), + CLK_MSR_ID(57, "lcd_an_ph2"), + CLK_MSR_ID(58, "lcd_an_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "u3p2_upcrxpll_fst_pll_clk"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(68, "cve"), + CLK_MSR_ID(69, "vge"), + CLK_MSR_ID(70, "dsi0_meas"), + CLK_MSR_ID(71, "dsi1_meas"), + CLK_MSR_ID(72, "mipi_csi_phy_clk_out[0]"), + CLK_MSR_ID(73, "mipi_csi_phy_clk_out[1]"), + CLK_MSR_ID(74, "mipi_csi_phy_clk_out[2]"), + CLK_MSR_ID(75, "mipi_csi_phy_clk_out[3]"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(83, "hdmitx1_pixel"), + CLK_MSR_ID(84, "hdmitx1_fe"), + CLK_MSR_ID(85, "gic"), + CLK_MSR_ID(86, "lvds0_fifo_clk"), + CLK_MSR_ID(87, "lvds1_fifo_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(89, "amfc"), + CLK_MSR_ID(90, "a_clk_sync_dig"), + CLK_MSR_ID(91, "b_clk_sync_dig"), + CLK_MSR_ID(92, "u3dp_upcrx_cdrclk"), + CLK_MSR_ID(93, "u3dp_upctx_clk_sync_b20"), + CLK_MSR_ID(94, "u3dp_upcrxpll_clk_test"), + CLK_MSR_ID(95, "u3dp_upcrpll_fst_pll_clk"), + CLK_MSR_ID(96, "u3dp_usb2_ckout"), + CLK_MSR_ID(97, "hcodec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(104, "spisg2"), + CLK_MSR_ID(105, "spisg1"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(108, "cmpr"), + CLK_MSR_ID(109, "dewarpa"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "glb"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "aux_clk_o"), + CLK_MSR_ID(118, "spisg0"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(122, "usb_48m"), + CLK_MSR_ID(123, "usb_250m"), + CLK_MSR_ID(124, "eth_125m"), + CLK_MSR_ID(125, "eth_rmii"), + CLK_MSR_ID(126, "hrx20_tmds20_clk"), + CLK_MSR_ID(127, "hrx20_cable_clk"), + CLK_MSR_ID(128, "hdmirx_vid_clk"), + CLK_MSR_ID(129, "hdmirx_aud_clk"), + CLK_MSR_ID(130, "dptx_apb2"), + CLK_MSR_ID(131, "dptx_aud"), + CLK_MSR_ID(132, "audio_todptx_bclk"), + CLK_MSR_ID(133, "audio_txhdmitx_bclk"), + CLK_MSR_ID(134, "audio_txhdmitx_mclk"), + CLK_MSR_ID(135, "audio_txhdmitx_spdif_clk"), + CLK_MSR_ID(136, "mclk_0_pre"), + CLK_MSR_ID(137, "mclk1_0_pre"), + CLK_MSR_ID(138, "pixel0_pll_clkout"), + CLK_MSR_ID(139, "pixel1_pll_clkout"), + CLK_MSR_ID(140, "tcon_clk_out0"), + CLK_MSR_ID(141, "tcon_clk_out1"), + CLK_MSR_ID(142, "audio_todptx_spdif_clk"), + CLK_MSR_ID(143, "audio_todptx_mclk"), + CLK_MSR_ID(144, "dptx_lnk_clk"), + CLK_MSR_ID(145, "edptx_lnk_clk_tx"), + CLK_MSR_ID(146, "mod_audio_pdm_dclk_o_ao"), + CLK_MSR_ID(147, "vid2_pll"), + CLK_MSR_ID(151, "can1_filter"), + CLK_MSR_ID(152, "can0_filter"), + CLK_MSR_ID(153, "can1_pe"), + CLK_MSR_ID(154, "can0_pe"), + CLK_MSR_ID(155, "o_sed_clk"), + CLK_MSR_ID(156, "pwm_n"), + CLK_MSR_ID(157, "pwm_m"), + CLK_MSR_ID(158, "pwm_l"), + CLK_MSR_ID(159, "pwm_k"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(170, "rng_ring_osc_clk[0]"), + CLK_MSR_ID(171, "rng_ring_osc_clk[1]"), + CLK_MSR_ID(172, "rng_ring_osc_clk[2]"), + CLK_MSR_ID(173, "rng_ring_osc_clk[3]"), + CLK_MSR_ID(174, "rng_ring_osc_clk[4]"), + CLK_MSR_ID(175, "sys_cpu_osc_ring_clk[0]"), + CLK_MSR_ID(176, "sys_cpu_osc_ring_clk[1]"), + CLK_MSR_ID(177, "sys_cpu_osc_ring_clk[2]"), + CLK_MSR_ID(178, "sys_cpu_osc_ring_clk[3]"), + CLK_MSR_ID(179, "sys_cpu_osc_ring_clk[4]"), + CLK_MSR_ID(180, "sys_cpu_osc_ring_clk[5]"), + CLK_MSR_ID(181, "sys_cpu_osc_ring_clk[6]"), + CLK_MSR_ID(182, "sys_cpu_osc_ring_clk[7]"), + CLK_MSR_ID(183, "sys_cpu_osc_ring_clk[8]"), + CLK_MSR_ID(184, "sys_cpu_osc_ring_clk[9]"), + CLK_MSR_ID(185, "osc_ring_clk_gpu[0]"), + CLK_MSR_ID(186, "osc_ring_clk_gpu[1]"), + CLK_MSR_ID(187, "osc_ring_clk_vpu"), + CLK_MSR_ID(188, "osc_ring_clk_dos[0]"), + CLK_MSR_ID(189, "osc_ring_clk_dos[1]"), + CLK_MSR_ID(190, "osc_ring_clk_vge"), + CLK_MSR_ID(191, "osc_ring_clk_nna[0]"), + CLK_MSR_ID(192, "osc_ring_clk_nna[1]"), + CLK_MSR_ID(193, "osc_ring_clk_top[0]"), + CLK_MSR_ID(194, "osc_ring_clk_top[1]"), + CLK_MSR_ID(195, "nna"), + CLK_MSR_ID(200, "pcie1_tl"), + CLK_MSR_ID(201, "pcie0_tl"), + CLK_MSR_ID(202, "pp"), + CLK_MSR_ID(203, "pwm_a(ao)"), + CLK_MSR_ID(204, "pwm_b(ao)"), + CLK_MSR_ID(205, "pwm_c(ao)"), + CLK_MSR_ID(206, "pwm_d(ao)"), + CLK_MSR_ID(207, "pwm_e(ao)"), + CLK_MSR_ID(208, "pwm_f(ao)"), + CLK_MSR_ID(209, "pwm_g(ao)"), + CLK_MSR_ID(210, "ao_cec"), + CLK_MSR_ID(211, "sec_pulse_out"), + CLK_MSR_ID(212, "osc_clk_out"), + CLK_MSR_ID(213, "earcrx_pll_clk_out"), + CLK_MSR_ID(215, "o_pd_sysclk"), + CLK_MSR_ID(216, "o_earcrx_dmac_clk"), + CLK_MSR_ID(217, "o_earcrx_cmdc_clk"), + CLK_MSR_ID(218, "o_earctx_dmac_clk"), + CLK_MSR_ID(219, "o_earctx_cmdc_clk"), + CLK_MSR_ID(220, "o_earctx_ana_dmac_clk_a2d"), + CLK_MSR_ID(221, "o_tohdmi_dp_tx_a_bclk"), + CLK_MSR_ID(222, "o_tohdmi_dp_tx_a_mclk"), + CLK_MSR_ID(223, "o_tohdmi_dp_tx_a_spdif_clk"), + CLK_MSR_ID(224, "o_tohdmi_dp_tx_b_bclk"), + CLK_MSR_ID(225, "o_tohdmi_dp_tx_b_mclk"), + CLK_MSR_ID(226, "o_tohdmi_dp_tx_b_spdif_clk"), + CLK_MSR_ID(227, "o_toacodec_dac_bclk"), + CLK_MSR_ID(228, "o_toacodec_dac_mclk"), + CLK_MSR_ID(229, "o_spdifout_b_mst_clk"), + CLK_MSR_ID(230, "o_spdifout_mst_clk"), + CLK_MSR_ID(231, "o_spdifin_mst_clk"), + CLK_MSR_ID(232, "o_audio_mclk"), + CLK_MSR_ID(233, "o_vad_clk"), + CLK_MSR_ID(234, "o_tdmout_d_sclk"), + CLK_MSR_ID(235, "o_tdmout_c_sclk"), + CLK_MSR_ID(236, "o_tdmout_b_sclk"), + CLK_MSR_ID(237, "o_tdmout_a_sclk"), + CLK_MSR_ID(238, "o_tdminb_lb_sclk"), + CLK_MSR_ID(239, "o_tdmin_lb_sclk"), + CLK_MSR_ID(240, "o_tdmin_d_sclk"), + CLK_MSR_ID(241, "o_tdmin_c_sclk"), + CLK_MSR_ID(242, "o_tdmin_b_sclk"), + CLK_MSR_ID(243, "o_tdmin_a_sclk"), + CLK_MSR_ID(244, "o_resampleb_clk"), + CLK_MSR_ID(245, "o_resamplea_clk"), + CLK_MSR_ID(246, "o_pdmb_sysclk"), + CLK_MSR_ID(247, "o_pdmb_dclk"), + CLK_MSR_ID(248, "o_pdm_sysclk"), + CLK_MSR_ID(249, "o_pdm_dclk"), + CLK_MSR_ID(250, "c_alockerb_out_clk"), + CLK_MSR_ID(251, "c_alockerb_in_clk"), + CLK_MSR_ID(252, "c_alocker_out_clk"), + CLK_MSR_ID(253, "c_alocker_in_clk"), + CLK_MSR_ID(254, "o_resample_c_clk") +}; + +static const struct meson_msr_id clk_msr_s6[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(3, "dspa"), + CLK_MSR_ID(4, "mali_stack"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(7, "mali_aclkm"), + CLK_MSR_ID(8, "cecb"), + CLK_MSR_ID(9, "gp2_pll"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "p21_usb2_ckout"), + CLK_MSR_ID(12, "p20_usb2_ckout"), + CLK_MSR_ID(13, "eth_mpll_test"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(26, "ext_Tsin_B_CLK_IN"), + CLK_MSR_ID(27, "mod_Tsin_C_CLK_IN"), + CLK_MSR_ID(28, "mod_Tsin_D_CLK_IN"), + CLK_MSR_ID(29, "dsi_pll_div_clk_out"), + CLK_MSR_ID(30, "dsi_pll_clk"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "enci"), + CLK_MSR_ID(52, "encp"), + CLK_MSR_ID(53, "encl"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "cdac"), + CLK_MSR_ID(57, "lcd_an_clk_ph2"), + CLK_MSR_ID(58, "lcd_an_clk_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "vpu_clkc"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(70, "mipi_dsi_meas"), + CLK_MSR_ID(71, "mipi_dsi_phy"), + CLK_MSR_ID(72, "mipi_csi_phy"), + CLK_MSR_ID(73, "csi2_adapt"), + CLK_MSR_ID(74, "cts_csi2_data"), + CLK_MSR_ID(75, "mipi_csi_phy_out"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(79, "rama_clk"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(84, "audio_tohdmitx_mclk"), + CLK_MSR_ID(85, "audio_tohdmitx_bclk"), + CLK_MSR_ID(86, "audio_tohdmitx_lrclk"), + CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(89, "amfc"), + CLK_MSR_ID(93, "vdec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(108, "cmpr"), + CLK_MSR_ID(109, "dewarpa"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "aux_clk_o"), + CLK_MSR_ID(118, "spicc"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(130, "o_vad_clk"), + CLK_MSR_ID(132, "audio_locker_in_clk"), + CLK_MSR_ID(133, "audio_locker_out_clk"), + CLK_MSR_ID(134, "audio_tdmout_c_sclk"), + CLK_MSR_ID(135, "audio_tdmout_b_sclk"), + CLK_MSR_ID(136, "audio_tdmout_a_sclk"), + CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), + CLK_MSR_ID(138, "audio_tdmin_c_sclk"), + CLK_MSR_ID(139, "audio_tdmin_b_sclk"), + CLK_MSR_ID(140, "audio_tdmin_a_sclk"), + CLK_MSR_ID(141, "audio_resamplea_clk"), + CLK_MSR_ID(142, "audio_pdm_sysclk"), + CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), + CLK_MSR_ID(144, "audio_spdifout_mst_clk"), + CLK_MSR_ID(145, "audio_spdifin_mst_clk"), + CLK_MSR_ID(147, "audio_resampleb_clk"), + CLK_MSR_ID(148, "pcie_pipe_clk"), + CLK_MSR_ID(149, "pcie_ref_clk"), + CLK_MSR_ID(150, "pcie_upcrx_cdrclk"), + CLK_MSR_ID(151, "pcie_upcrx_clk_sync_b20"), + CLK_MSR_ID(152, "pcie_u3p2pll1_clk_div16"), + CLK_MSR_ID(153, "pcie_u3p2pll0_clkout"), + CLK_MSR_ID(154, "pcie_ref_clk_p"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(175, "rng_ring_clk[0]"), + CLK_MSR_ID(176, "rng_ring_clk[1]"), + CLK_MSR_ID(177, "rng_ring_clk[2]"), + CLK_MSR_ID(178, "rng_ring_clk[3]"), + CLK_MSR_ID(179, "rng_ring_clk[4]"), + CLK_MSR_ID(180, "am_ring_osc_clk_out[0]"), + CLK_MSR_ID(181, "am_ring_osc_clk_out[1]"), + CLK_MSR_ID(182, "am_ring_osc_clk_out[2]"), + CLK_MSR_ID(183, "am_ring_osc_clk_out[3]"), + CLK_MSR_ID(184, "am_ring_osc_clk_out[4]"), + CLK_MSR_ID(185, "am_ring_osc_clk_out[5]"), + CLK_MSR_ID(186, "am_ring_osc_clk_out[6]"), + CLK_MSR_ID(187, "am_ring_osc_clk_out[7]"), + CLK_MSR_ID(188, "am_ring_osc_clk_out[8]"), + CLK_MSR_ID(189, "am_ring_osc_clk_out[9]"), + CLK_MSR_ID(190, "am_ring_osc_clk_out[10]"), + CLK_MSR_ID(191, "am_ring_osc_clk_out[11]"), + CLK_MSR_ID(192, "am_ring_osc_clk_out[12]"), + CLK_MSR_ID(193, "am_ring_osc_clk_out[13]"), + CLK_MSR_ID(194, "am_ring_osc_clk_out[14]"), + CLK_MSR_ID(195, "am_ring_osc_clk_out[15]"), + CLK_MSR_ID(196, "am_ring_osc_clk_out[16]"), + CLK_MSR_ID(197, "nna"), + CLK_MSR_ID(198, "vc9000e_axi"), + CLK_MSR_ID(199, "vc9000e_core"), + CLK_MSR_ID(201, "pcie_tl"), + CLK_MSR_ID(204, "u3p2pll1_clk_div16"), + CLK_MSR_ID(205, "u3p2pll0_clkout"), + CLK_MSR_ID(206, "upctx_clk_sync_b20"), + CLK_MSR_ID(207, "upcrx_carclk"), + CLK_MSR_ID(208, "usb_pipe_clk"), + CLK_MSR_ID(209, "earcrx_pll_out"), + CLK_MSR_ID(210, "mclk_pll_clk") +}; + +static const struct meson_msr_id clk_msr_s7[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(8, "cecb"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "p21_usb2_ckout"), + CLK_MSR_ID(12, "p20_usb2_ckout"), + CLK_MSR_ID(13, "eth_mpll_test"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "enci"), + CLK_MSR_ID(52, "encp"), + CLK_MSR_ID(53, "encl"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "cdac"), + CLK_MSR_ID(57, "lcd_an_clk_ph2"), + CLK_MSR_ID(58, "lcd_an_clk_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "vpu_clkc"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(84, "audio_tohdmitx_mclk"), + CLK_MSR_ID(85, "audio_tohdmitx_bclk"), + CLK_MSR_ID(86, "audio_tohdmitx_lrclk"), + CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(93, "vdec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(118, "spicc"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(130, "o_vad_clk"), + CLK_MSR_ID(131, "au_dac_clk_x128"), + CLK_MSR_ID(132, "audio_locker_in_clk"), + CLK_MSR_ID(133, "audio_locker_out_clk"), + CLK_MSR_ID(134, "audio_tdmout_c_sclk"), + CLK_MSR_ID(135, "audio_tdmout_b_sclk"), + CLK_MSR_ID(136, "audio_tdmout_a_sclk"), + CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), + CLK_MSR_ID(138, "audio_tdmin_c_sclk"), + CLK_MSR_ID(139, "audio_tdmin_b_sclk"), + CLK_MSR_ID(140, "audio_tdmin_a_sclk"), + CLK_MSR_ID(141, "audio_resamplea_clk"), + CLK_MSR_ID(142, "audio_pdm_sysclk"), + CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), + CLK_MSR_ID(144, "audio_spdifout_mst_clk"), + CLK_MSR_ID(145, "audio_spdifin_mst_clk"), + CLK_MSR_ID(147, "audio_resampleb_clk"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(176, "rng_ring_clk[0]"), + CLK_MSR_ID(177, "rng_ring_clk[1]"), + CLK_MSR_ID(178, "rng_ring_clk[2]"), + CLK_MSR_ID(179, "rng_ring_clk[3]"), + CLK_MSR_ID(180, "osc_ring_clk[0](a55 core0 14_slvt)"), + CLK_MSR_ID(181, "osc_ring_clk[1](a55 core1 14_slvt)"), + CLK_MSR_ID(182, "osc_ring_clk[2](a55 core2 14_slvt)"), + CLK_MSR_ID(183, "osc_ring_clk[3](a55 core3 14_slvt)"), + CLK_MSR_ID(184, "osc_ring_clk[4](a55_pwr[0] 16_slvt)"), + CLK_MSR_ID(185, "osc_ring_clk[5](a55_pwr[1] 14_lvt)"), + CLK_MSR_ID(186, "osc_ring_clk[6](a55_pwr[2] 14_rvt)"), + CLK_MSR_ID(187, "osc_ring_clk[7](mali[1] 14_lvt)"), + CLK_MSR_ID(188, "osc_ring_clk[8](mali[1] 14_rvt)"), + CLK_MSR_ID(189, "osc_ring_clk[9](dos[0] 16_lvt)"), + CLK_MSR_ID(190, "osc_ring_clk[10](dos[1] 14_rvt)"), + CLK_MSR_ID(191, "osc_ring_clk[11](ddr[0] 9t_14_lvt)"), + CLK_MSR_ID(192, "osc_ring_clk[12](top[0] 16_rvt)"), +}; + +static const struct meson_msr_id clk_msr_s7d[] =3D { + CLK_MSR_ID(0, "sys_clk"), + CLK_MSR_ID(1, "axi_clk"), + CLK_MSR_ID(2, "rtc_clk"), + CLK_MSR_ID(4, "mali_stack"), + CLK_MSR_ID(5, "mali"), + CLK_MSR_ID(6, "cpu_clk_div16"), + CLK_MSR_ID(8, "cecb"), + CLK_MSR_ID(9, "mali_aclkm"), + CLK_MSR_ID(10, "fclk_div5"), + CLK_MSR_ID(11, "p21_usb2_ckout"), + CLK_MSR_ID(12, "p20_usb2_ckout"), + CLK_MSR_ID(13, "eth_mpll_test"), + CLK_MSR_ID(15, "fclk_50m"), + CLK_MSR_ID(18, "gp1_pll"), + CLK_MSR_ID(19, "hifi_pll"), + CLK_MSR_ID(20, "gp0_pll"), + CLK_MSR_ID(21, "hifi1_pll"), + CLK_MSR_ID(22, "eth_mppll_50m_ckout"), + CLK_MSR_ID(23, "sys_pll_div16"), + CLK_MSR_ID(24, "ddr_dpll_pt_clk"), + CLK_MSR_ID(25, "mod_Tsin_A_CLK_IN"), + CLK_MSR_ID(26, "mod_Tsin_B_CLK_IN"), + CLK_MSR_ID(31, "earcrx_pll_clk_out"), + CLK_MSR_ID(32, "eth_125m"), + CLK_MSR_ID(33, "eth_rmii"), + CLK_MSR_ID(34, "co_clkin_to_mac"), + CLK_MSR_ID(36, "co_rx_clk"), + CLK_MSR_ID(37, "co_tx_clk"), + CLK_MSR_ID(38, "eth_phy_rxclk"), + CLK_MSR_ID(39, "eth_phy_plltxclk"), + CLK_MSR_ID(40, "ephy_test_clk"), + CLK_MSR_ID(49, "hdmi_vx1_pix_clk"), + CLK_MSR_ID(50, "vid_pll"), + CLK_MSR_ID(51, "enci"), + CLK_MSR_ID(52, "encp"), + CLK_MSR_ID(53, "encl"), + CLK_MSR_ID(54, "vdac"), + CLK_MSR_ID(55, "cdac"), + CLK_MSR_ID(57, "lcd_an_clk_ph2"), + CLK_MSR_ID(58, "lcd_an_clk_ph3"), + CLK_MSR_ID(59, "hdmitx_pixel"), + CLK_MSR_ID(60, "vdin_meas"), + CLK_MSR_ID(61, "vpu"), + CLK_MSR_ID(62, "vpu_clkb"), + CLK_MSR_ID(63, "vpu_clkb_tmp"), + CLK_MSR_ID(64, "vpu_clkc"), + CLK_MSR_ID(65, "vid_lock"), + CLK_MSR_ID(66, "vapb"), + CLK_MSR_ID(67, "ge2d"), + CLK_MSR_ID(76, "hdmitx_tmds"), + CLK_MSR_ID(77, "hdmitx_sys"), + CLK_MSR_ID(78, "hdmitx_fe"), + CLK_MSR_ID(80, "hdmitx_prif"), + CLK_MSR_ID(81, "hdmitx_200m"), + CLK_MSR_ID(82, "hdmitx_aud"), + CLK_MSR_ID(84, "audio_tohdmitx_mclk"), + CLK_MSR_ID(85, "audio_tohdmitx_bclk"), + CLK_MSR_ID(86, "audio_tohdmitx_lrclk"), + CLK_MSR_ID(87, "audio_tohdmitx_spdif_clk"), + CLK_MSR_ID(88, "htx_aes_clk"), + CLK_MSR_ID(89, "amfc"), + CLK_MSR_ID(93, "vdec"), + CLK_MSR_ID(97, "hcodec"), + CLK_MSR_ID(99, "hevcf"), + CLK_MSR_ID(106, "deskew_pll_clk_div32_out"), + CLK_MSR_ID(110, "sc"), + CLK_MSR_ID(111, "sar_adc"), + CLK_MSR_ID(112, "aux_adc_clk_to_gpio"), + CLK_MSR_ID(113, "sd_emmc_c"), + CLK_MSR_ID(114, "sd_emmc_b"), + CLK_MSR_ID(115, "sd_emmc_a"), + CLK_MSR_ID(116, "gpio_msr_clk"), + CLK_MSR_ID(117, "aux_clk_o"), + CLK_MSR_ID(118, "spicc"), + CLK_MSR_ID(121, "ts"), + CLK_MSR_ID(130, "o_vad_clk"), + CLK_MSR_ID(131, "au_dac_clk_x128"), + CLK_MSR_ID(132, "audio_locker_in_clk"), + CLK_MSR_ID(133, "audio_locker_out_clk"), + CLK_MSR_ID(134, "audio_tdmout_c_sclk"), + CLK_MSR_ID(135, "audio_tdmout_b_sclk"), + CLK_MSR_ID(136, "audio_tdmout_a_sclk"), + CLK_MSR_ID(137, "audio_tdmin_lb_sclk"), + CLK_MSR_ID(138, "audio_tdmin_c_sclk"), + CLK_MSR_ID(139, "audio_tdmin_b_sclk"), + CLK_MSR_ID(140, "audio_tdmin_a_sclk"), + CLK_MSR_ID(141, "audio_resamplea_clk"), + CLK_MSR_ID(142, "audio_pdm_sysclk"), + CLK_MSR_ID(143, "audio_spdifout_b_mst_clk"), + CLK_MSR_ID(144, "audio_spdifout_mst_clk"), + CLK_MSR_ID(145, "audio_spdifin_mst_clk"), + CLK_MSR_ID(146, "mod_audio_pdm_dclk_o"), + CLK_MSR_ID(147, "audio_resampleb_clk"), + CLK_MSR_ID(160, "pwm_j"), + CLK_MSR_ID(161, "pwm_i"), + CLK_MSR_ID(162, "pwm_h"), + CLK_MSR_ID(163, "pwm_g"), + CLK_MSR_ID(164, "pwm_f"), + CLK_MSR_ID(165, "pwm_e"), + CLK_MSR_ID(166, "pwm_d"), + CLK_MSR_ID(167, "pwm_c"), + CLK_MSR_ID(168, "pwm_b"), + CLK_MSR_ID(169, "pwm_a"), + CLK_MSR_ID(176, "rng_ring_clk[0]"), + CLK_MSR_ID(177, "rng_ring_clk[1]"), + CLK_MSR_ID(178, "rng_ring_clk[2]"), + CLK_MSR_ID(179, "rng_ring_clk[3]"), + CLK_MSR_ID(180, "osc_ring_clk[0](a55 core0 14_slvt)"), + CLK_MSR_ID(181, "osc_ring_clk[1](a55 core1 14_slvt)"), + CLK_MSR_ID(182, "osc_ring_clk[2](a55 core2 14_slvt)"), + CLK_MSR_ID(183, "osc_ring_clk[3](a55 core3 14_slvt)"), + CLK_MSR_ID(184, "osc_ring_clk[4](a55_pwr[0] 16_slvt)"), + CLK_MSR_ID(185, "osc_ring_clk[5](a55_pwr[1] 14_lvt)"), + CLK_MSR_ID(186, "osc_ring_clk[6](a55_pwr[2] 14_rvt)"), + CLK_MSR_ID(187, "osc_ring_clk[7](mali[1] 14_lvt)"), + CLK_MSR_ID(188, "osc_ring_clk[8](mali[1] 14_rvt)"), + CLK_MSR_ID(189, "osc_ring_clk[9](dos[0] 16_lvt)"), + CLK_MSR_ID(190, "osc_ring_clk[10](dos[1] 14_rvt)"), + CLK_MSR_ID(191, "osc_ring_clk[11](ddr[0] 9t_14_lvt)"), + CLK_MSR_ID(192, "osc_ring_clk[12](top[0] 16_rvt)"), +}; + static int meson_measure_id(struct meson_msr_id *clk_msr_id, unsigned int duration) { @@ -1285,6 +2122,24 @@ static const struct meson_msr_data clk_msr_a1_data = =3D { .reg =3D &msr_reg_offset_v2, }; =20 +static const struct meson_msr_data clk_msr_a4_data =3D { + .msr_table =3D (void *)clk_msr_a4, + .msr_count =3D ARRAY_SIZE(clk_msr_a4), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_a5_data =3D { + .msr_table =3D (void *)clk_msr_a5, + .msr_count =3D ARRAY_SIZE(clk_msr_a5), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_a9_data =3D { + .msr_table =3D (void *)clk_msr_a9, + .msr_count =3D ARRAY_SIZE(clk_msr_a9), + .reg =3D &msr_reg_offset_v2, +}; + static const struct meson_msr_data clk_msr_c3_data =3D { .msr_table =3D (void *)clk_msr_c3, .msr_count =3D ARRAY_SIZE(clk_msr_c3), @@ -1297,6 +2152,24 @@ static const struct meson_msr_data clk_msr_s4_data = =3D { .reg =3D &msr_reg_offset_v2, }; =20 +static const struct meson_msr_data clk_msr_s6_data =3D { + .msr_table =3D (void *)clk_msr_s6, + .msr_count =3D ARRAY_SIZE(clk_msr_s6), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_s7_data =3D { + .msr_table =3D (void *)clk_msr_s7, + .msr_count =3D ARRAY_SIZE(clk_msr_s7), + .reg =3D &msr_reg_offset_v2, +}; + +static const struct meson_msr_data clk_msr_s7d_data =3D { + .msr_table =3D (void *)clk_msr_s7d, + .msr_count =3D ARRAY_SIZE(clk_msr_s7d), + .reg =3D &msr_reg_offset_v2, +}; + static const struct meson_msr_data clk_msr_t7_data =3D { .msr_table =3D (void *)clk_msr_t7, .msr_count =3D ARRAY_SIZE(clk_msr_t7), @@ -1308,6 +2181,18 @@ static const struct of_device_id meson_msr_match_tab= le[] =3D { .compatible =3D "amlogic,a1-clk-measure", .data =3D &clk_msr_a1_data, }, + { + .compatible =3D "amlogic,a4-clk-measure", + .data =3D &clk_msr_a4_data, + }, + { + .compatible =3D "amlogic,a5-clk-measure", + .data =3D &clk_msr_a5_data, + }, + { + .compatible =3D "amlogic,a9-clk-measure", + .data =3D &clk_msr_a9_data, + }, { .compatible =3D "amlogic,c3-clk-measure", .data =3D &clk_msr_c3_data, @@ -1340,6 +2225,18 @@ static const struct of_device_id meson_msr_match_tab= le[] =3D { .compatible =3D "amlogic,s4-clk-measure", .data =3D &clk_msr_s4_data, }, + { + .compatible =3D "amlogic,s6-clk-measure", + .data =3D &clk_msr_s6_data, + }, + { + .compatible =3D "amlogic,s7-clk-measure", + .data =3D &clk_msr_s7_data, + }, + { + .compatible =3D "amlogic,s7d-clk-measure", + .data =3D &clk_msr_s7d_data, + }, { .compatible =3D "amlogic,t7-clk-measure", .data =3D &clk_msr_t7_data, --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 985D83F23B1; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=hcJ2QJNt3OA8U402otXIzNwq+siTPc69HMeSIWrISQ8fdKll0cpPWJnQN58Ps/3fQZ6gGUk5nupPAhARyXR90EN0abcN1X7S+npnbqIdBTq6HhNuGti8JcNkJKv/GRhUXo1RA26DpeKkpc5GP+kBX/pZtmUrAsAJqORgbrtfvVY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=98JgfFXc+HkTsNRmHI1xyAm0Rm6gE2mGRox86nLGGNU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=QSlLA+g9OMLknFEA9mWb+IpWj0Nn9r8c2GA9eA89pG1rN5AupNlvd14q94Se5Q+Oor0z6y9VfBygNMGz/jU4MYqfJ6/D2IFxDH5+1fC1j3sud/ZD3n0pmjThQSCUSb+Lqv4HVlNAkUvHf5c4buuuUYQQR8DB7qu3tXwV4ciKJIA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=N+A2fMOz; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="N+A2fMOz" Received: by smtp.kernel.org (Postfix) with ESMTPS id 540F8C4AF10; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=98JgfFXc+HkTsNRmHI1xyAm0Rm6gE2mGRox86nLGGNU=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=N+A2fMOzXXQfixAEL7x234/IPdydY/ZMcCMQHoJAOpNVcrSpjflWWDkCuAB0cek0r 2S8dRkNQxoilf5lnmS48Q/rkgBD5SptGtd6ANa8PJFbLqfSDpbM9gIYFfeilB0maAk vnCoF9fQJjaw9bJs0CWdqtka3ufirOQPZQv6uCKPtV1u+79LjRyYXVsUAKqVuWdLjB NCuPY6oXCgYFF+P086697M4q135bImyKRVRf/dQ3LP1aXgEf1X9nJ8Psn4qP+MtgRL S8Yc6VH6wkBzgoiQECjej3c0wQzHhCgx9Gu1JZYt0w7GJN5s2HGX59z3EMK1MB+Skj nHd+Xq1YUKG9Q== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4248CC982EB; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:08 +0800 Subject: [PATCH v2 06/12] soc: amlogic: clk-measure: Optimize CLK_MSR_ID to reduce memory usage Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-6-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=2725; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=B0BKe3yD0PFCTHPaReABO4rDltehZzDiFxD06D1+ar8=; b=Dfmx99M+EjWRv1Vt6KsT+PhVSrdrxSXeHUJnW5ysW1l4grqtSbh60xPNISqMosDftZ88o2kFZ IaHADiOJ29IBSQiJVSjOWNDbkD9IPMQdwljQjQ0kcAPqKwotbjfGgwG X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu The original CLK_MSR_ID macro uses __id as the designated array index. This can waste memory when defining struct meson_msr_id arrays. For example: static const struct meson_msr_id clk_msr_foo[] =3D { CLK_MSR_ID(255, NULL), }; Although the array contains only one valid entry, it occupies space for 256 elements because the designated initializer forces the array size to match the highest index. The driver does not rely on the array index when accessing measurement IDs. Instead, the measurement ID is obtained from the id field of struct meson_msr_id. Therefore, removing the designated array index from CLK_MSR_ID does not affect the current driver behavior while significantly reducing unnecessary memory usage. Compared with before and after modification, the memory size is reduced by 24.76%: $ scripts/bloat-o-meter pre_meson-clk-measure.o meson-clk-measure.o add/remove: 0/0 grow/shrink: 0/15 up/down: 0/-16224 (-16224) Function old new delta clk_msr_sm1 3072 3048 -24 clk_msr_a1 1488 1272 -216 clk_msr_g12a 2952 2712 -240 clk_msr_gx 1992 1608 -384 clk_msr_m8 1536 1104 -432 clk_msr_a9 6120 5544 -576 clk_msr_t7 5352 4632 -720 clk_msr_axg 2640 1704 -936 clk_msr_s6 5064 3672 -1392 clk_msr_c3 4896 3264 -1632 clk_msr_s7d 4632 2880 -1752 clk_msr_s4 5376 3576 -1800 clk_msr_a4 4488 2544 -1944 clk_msr_s7 4632 2664 -1968 clk_msr_a5 4560 2352 -2208 Total: Before=3D65527, After=3D49303, chg -24.76% Signed-off-by: Chuan Liu --- drivers/soc/amlogic/meson-clk-measure.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/amlogic/meson-clk-measure.c b/drivers/soc/amlogic/= meson-clk-measure.c index 50928ac14f86..33767f0bc67c 100644 --- a/drivers/soc/amlogic/meson-clk-measure.c +++ b/drivers/soc/amlogic/meson-clk-measure.c @@ -55,7 +55,7 @@ struct meson_msr { }; =20 #define CLK_MSR_ID(__id, __name) \ - [__id] =3D {.id =3D __id, .name =3D __name,} + {.id =3D __id, .name =3D __name,} =20 static const struct meson_msr_id clk_msr_m8[] =3D { CLK_MSR_ID(0, "ring_osc_out_ee0"), --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A4CC3F23C0; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=kedmnmPmbzr0hj1FgKCvg+YtxHkvI9GrpMABorP6nFB+ITrJ7sHhg9qLmSdcvGX642aF6qG10JuhYEYjuTutzH7i0O0L6jQ9JwL38FbkINApY8QYVeAcPElEZBkMCMoiAFtgV8QLohDUtycRGmiy50dMX38CZgAQXRApdommnWA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:09 +0800 Subject: [PATCH v2 07/12] arm64: dts: amlogic: a5: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-7-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=735; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=m5R5k55AN/MNKbp84EDgUAXLk3E5z1TMK4ptSdMbBlo=; b=o3JaiEL+aRnvotUYIh5NHQ4EnpH4qmkpE6JzCCATMhxdOCOaG7hehas2rqKuMAtfPA4g4UuMZ PQAEVnxwnclBeLHFj3pU7h7mPupa7IL+eH9R6QsEr5XfdqWGnrWdSp4 X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A5 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a5.dtsi index 2b12d8284594..0be176ace337 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a5.dtsi @@ -157,4 +157,9 @@ gpio_intc: interrupt-controller@4080 { amlogic,channel-interrupts =3D <10 11 12 13 14 15 16 17 18 19 20 21>; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,a5-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F9E33F326D; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=TfgVj1X5U2j1HntwbOiyi9ejWuYByTMTUev6/6OCeAlS8ab8HCeDsmZ+Wiqg0/EVb4xYpzGmoQAeqJH1a9sXDMiPy/REIG2rb3cufx7isYPxhwtPOLrMGhP5KC5casdRfBcmwlzhaFBeiwuqSCgDAYjMOPlpxSVVCdr1/NlkvgM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=mLj7YUC9Fm6rKKu4LSYfjTh/ywFy6caKOyKBr+t9m/g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OmrOQadWr4O94GX+zOEGtN4uvUy2BY/BLr9/irMNjhldJQJ7UKcXffNYz7Xm/tbv+rn1v9nx/GCrIdWU25vQu9cnN+J+68T0caTk/huqD7QsIoJwZNkf8q1lq+deHMwUntTkR+a14YvytsrpeC5P0ccxz3JUzwTWbzFNtpXjsoE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=F4SRpdN7; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="F4SRpdN7" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7643BC2BCFA; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=mLj7YUC9Fm6rKKu4LSYfjTh/ywFy6caKOyKBr+t9m/g=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=F4SRpdN7Zvpi0iY1lQDmu2AEV2ShUTMe1K9hnRqunOE6CZq/fA4tl0qzFrGAZxvga 9//zhbf4wuT38pDm7s871lci603W3v0S6ENWmKsg0mXvyH8ZGcerS3Xlv6TTceivEE VaizsvWJuj7y/DWyoa7lLKAlYW2oEJX616Y4jJWsr4PbyXn7egymeBwA2uoeQ4KowZ g3GAY4GrbaG0agKwAFU5icNiTW0TIi3bhOOcQDBSCQL5/bE5pUF0WrtPIu72phuREm oFQFjNC+IY3TC4v7Y8TzIRlXm9rgcBVJV9saC1duRfubplkSano3/A9Icvd1MPESkI 5Ex42z+otLGww== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64086C982DA; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:10 +0800 Subject: [PATCH v2 08/12] arm64: dts: amlogic: a4: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-8-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=797; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=wRifO0cIF3hQCIdhhi4prrj9RKNwhA6uX1mJAaHO3Ik=; b=34vRqi/pd6UVz90Vtvp45zfx1ThvzN4OBgfrH5k//2lnQcFQqK4v7JpBTKDLtlCsxAJdtSs9T 0lMipt4YCPJBntVi34HwlATmjeYXIi2ykCkQLS3eBOicDn/+ZG/4e98 X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A4 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a4.dtsi index fce45933fa28..762754b33f23 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a4.dtsi @@ -207,6 +207,11 @@ gpio_intc: interrupt-controller@4080 { <10 11 12 13 14 15 16 17 18 19 20 21>; }; =20 + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,a4-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; + ao_pinctrl: pinctrl@8e700 { compatible =3D "amlogic,pinctrl-a4"; #address-cells =3D <2>; --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7DFB3F412B; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=Rb4nTl1naarlrne1HdNrfwRxsWn0sHIaMhVsdpKn98+SYiMB8IdT2KEA/KkgKaj0D312E7mKTyRD4To276Ccb8ZLIIqSiJ09IGlNETfA/lTjs8SCPWjKWQ0qsWS9SaUH3jMwWybPJ+Xr8BHiiH2bUcdUb/7C5RrtroIySlHQtdQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=ASdPmlELWfdb/Y/YJ4rVHsEqniNVnoU71S6yuvMaeDA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=oPinHMfJLByYG5YF+Ub6jsJfjBnDx0v8Ka0euBCsxGMVdSojV+FjMF6lFtnosuNVsolwX2Q6PiCwWpCVbsnfj7J1DLIUSeoTF/Q9Ty619cy8yEGq4GeS0JEWY6kzWr9/uTNSFV1rHPvRIXp3V/z9qnVivwJEv3KaBqCLi8GMuLA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=RYwHfMwS; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="RYwHfMwS" Received: by smtp.kernel.org (Postfix) with ESMTPS id 878F4C2BCB3; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=ASdPmlELWfdb/Y/YJ4rVHsEqniNVnoU71S6yuvMaeDA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=RYwHfMwSAF5nDdiV+YTSP4L3xFRFa/7RQhOPKZuGeuoaq2Ci5WmX/7tPx3ZU9Kp/T ITFPoB65zRVfge6y4vdwmDMV9HTnYTA0+3VAg/dQAaq3RkL0RIwgg5wdPO3iDtqlil bsCz3EmzkmwecM9NGRd44zNBAx/gc35ILFFqbDoW3itOH+TT/oKwO5qRWrwtMoh8Yr JMekqBK7qWgsLYPJKW8Q/BPU/r7ChimVFBuiIinTIatHuk3uFeOWzLbfQ6cx6b6arj 2lrEIFu/oFdwMOmnhGVkpCLFlrznDxmvfnM01CT20Yx16U9fm2YWOi8vyp4IkYeK04 ojq1Awj0voCfQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76229C982EA; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:11 +0800 Subject: [PATCH v2 09/12] arm64: dts: amlogic: s7: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-9-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=725; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=g+jOIpaICoW8GinTHQ5X1UmJpEi/mHf2rXG4N1xQzYo=; b=WNuNl46dvYNUPSbmkvaNeDmv+5aas7rex8F4AsX7uFDvgprNI/t8BbpGAVRl/Xt8eYGago6Kq I5wgHOkMvPkBI/Vm3syFBtkEKBjLRf/YRkf74RaGD+OPTVT5at+ST6m X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S7 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s7.dtsi index a3faf4d188e1..64440df4f542 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi @@ -239,6 +239,11 @@ ao-secure@10220 { reg =3D <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,s7-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; }; }; --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B73B83F411B; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=hauN+KpW6T9uNcZbNqUsIlpvtF+sKma+IFu8Fk9bLVgZ4k8Ud0OfHhEu8T7M91kv8zS+vPd9YAodPswMKv5cwBe4lNntOn/7WOxsEmMDdmdRKqpjjB3ZZUEuuWERfVrDob4Nb+XbknbFu34XnLrhxs0FzL/9VbgjEfI/hKHT9KQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=d9gRokGuXMnRj4EGFfmt+XQXkpFvGjH7tDqGf3GPJhI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eqGfqoxW3hNQY2g7S+BOxn7rkXMpAUjrjGMPgFjilDM93DFUt+JSxpN+uVJUURxx547p9oG4do8iueOr9FZJ9t4n2SG4Hi3k2JA9oi8xo9pvaGOJPEdUYqcxiGePDeVeuLYKEJDOj6EF4oFxQJAx+81qDXtMGYM+OrEL6UWKUxc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=qJ3yoCy9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="qJ3yoCy9" Received: by smtp.kernel.org (Postfix) with ESMTPS id 9AE21C2BCF5; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=d9gRokGuXMnRj4EGFfmt+XQXkpFvGjH7tDqGf3GPJhI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=qJ3yoCy9F2Vv4a14SVSscKCA0W3kUjhMPmxd0WD7xLYsTRuE+obdFWi+CIkhLH/AB yYbEXdXelq6ynQBPaaLYFXfdayvb/ejNxuK+w18BpLa0R+4vdvGU9tv/V93MYcEl4D lmnoEthALBAPDTMjuq1u3+40i6r80IoF1UmboOoGfQrHMe7EUnrGJWrb5ZLVDVUuHo VAzIAUv8qiWFZZJuHM5SHjEA2PEIBmjbzdICYfkY6lwiJhS6y8r/nuu3sj6egWFhRI WNyYSlJcDkge+eH9n48Dz/lf/2aJICZHwo+1kTEyKqyUpq9K0ZAiAaaJK4rJdjCzQq ty0FIqQ552Y2w== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 880E0C982E6; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:12 +0800 Subject: [PATCH v2 10/12] arm64: dts: amlogic: s7d: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-10-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=732; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=pLxRAmolmQ/S413sGcYNxtsPZfazg1P2W2c2iMu9cJc=; b=TQ6NQqP5UAgcMtDONzEg6xT4hV2z3fvgX89dDV3L/AwBLiTDhEbr70Pt24QgZaQdBf0F4sOy6 m+agroZtVmxC/WyXdM98dNhN1aD4NXNodjxup09W+e3TEu/rDyd651Z X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S7D SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi b/arch/arm64/boot= /dts/amlogic/amlogic-s7d.dtsi index 0c4417bcd682..5593ff9e07eb 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s7d.dtsi @@ -212,6 +212,11 @@ ao-secure@10220 { reg =3D <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,s7d-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; }; }; --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE5733F4DCF; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; cv=none; b=V42FA7eKFkLhtvKq4IhyBUG7mL67MgXsmyJwSrQI6EjubxeWbtlCCJnA4MEdk6lK26R6g5IDi6YhWynZHCzSWjX69zerydyZqE5kRgE+NWwFgTUjGhytoZ+T5riZNyPyZ6GFkRsZFNLJTFs9TBmf/otDDYbuP5beEQgKeA07Dzk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899907; c=relaxed/simple; bh=AfQRWYlOA9oYn7pKhRYTtSAvICG/ajPN7ML72cUReh4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mI/Efac5BTZ0q3wg7XEgzyIFpDaN99NdGDyRkvFcE8kh+NsBsl8FHoGUxupLXlRBJR09I5Lg8O3cnrYxHWhnxDNby0Vc4sY1iXO6scQoLeRIAbrGq1kObak9FnqwkK9wyFilCeFEpVr8dBnn2tEjuLhXCQOufteyqFMgoonltiM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=QXZqdjcT; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="QXZqdjcT" Received: by smtp.kernel.org (Postfix) with ESMTPS id ABBD3C2BD05; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=AfQRWYlOA9oYn7pKhRYTtSAvICG/ajPN7ML72cUReh4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=QXZqdjcTUPGbG2CO60FeN1vEQq1lisHu40g5oInrQm4/l1ohb5pAnAcvEEd/dEda8 4+6R0rQA2NUw7J28JuVwNcDZSW5+ySY3i45J/ezUwEFprrzHHAcOU2lQCDaIHvx+5c VOMQvUkYmgIOWMfRfIOKnZzetOcqX7UXhvUrdUmIeLNYF0FnUL/znmNHneiGc99KLF Ba6uWZmhYttl4R+AN7tYm+IGmMHEleyMF3nWRWvEpotr0wsAv/fOotkobsWsopWfcE j0jJbFiL9pf4kKVza6R4EXx3UxTlfU6LIgb8usJhCQ2+KzZvEjoU3ytPvVs7mD0Iz+ 1nSDVTSZx11GQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98AC9C982EB; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:13 +0800 Subject: [PATCH v2 11/12] arm64: dts: amlogic: s6: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-11-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=725; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=9SDzhFYgFeR3zBxYK2Jcmr4Ssvx78QFB8BdBwjoaCo8=; b=Vsjs7WW+r5ugbL6idpVlhUEpnx0T7h+vBrL4GLl5aOWOcGE2N9h4+cD574WFhLUgaR7Pse2ns rm4BfWnNdhpBv2XXV3AdIrylReX04DutwAx7IFXw08a0WOS8fm2fQ9K X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for S6 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s6.dtsi index ab3acef2b147..b0a1a05297ce 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -217,6 +217,11 @@ ao-secure@10220 { reg =3D <0x0 0x10220 0x0 0x140>; amlogic,has-chip-id; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,s6-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; }; }; --=20 2.42.0 From nobody Thu Sep 24 20:38:40 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E8BCD3F58DC; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899908; cv=none; b=kuoNg0vceogyI7rWd6tvlRwOUYMc3vZ/7V9WZeITf7mPVR8hBlJE3CuLUi8gnLLaB6P7LMHDQ9yOutU9oxb5w3SdFyxFO9HAR6HVf5PoNxIauYfANGfFjJDlSE8xt4J/1VRxw57qjvDyEcu1pQWGcFHqcGM+VlunjQNwXYappcQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789899908; c=relaxed/simple; bh=CVrPnrs8qwQFVuAK2JblKtBbOLQAR+miyXJpO2WE03c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FDckJwT7eqKr3UxosgNhVvp/U1diWX/z+Vva1YobweKV1WUaYq7R+w6bqvZwLlMXEjmEkg8DgbQMGbR2ct6M5D/tSkJs0tGkI+zGz3nigI55ooW8ARfg0wPUzkWKWM3UK2U2RV3ED05z+micxs5JwJTHfjKeOk5VHY5L5c2yzyY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=R6WcSrnK; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="R6WcSrnK" Received: by smtp.kernel.org (Postfix) with ESMTPS id BD206C4AF09; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1789899907; bh=CVrPnrs8qwQFVuAK2JblKtBbOLQAR+miyXJpO2WE03c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=R6WcSrnK1bR1+ArQF7QdCJVEZ4KE2hGgym5ADS0fwT2XK+RUR6X1xBam8+cdflhEq ZgbCGB9LANCw1aymz5R2VObSUKVO6dsgAdsN+vrc6QNtPkNCiJsSTum+YNYDNW66i5 PSL8S+ATJ8LxDs5jtaTd19ZZDKbEmviVmz+dWGdH8lksWgGyc8D4LsHyo7FgPnhy1K 99cZxomXkXrkOdecFgzsq0XDEydWSOyEKuHf68zbB6MBBaON5gL0gPPzn1ZIuD2AIl updHd6/1aRD5jCcDUcyct/E7IGZpbPUvwvoM8/vN98RgKh8xOJMsYw6uiZxVWP4ogS lQWHnu2KN88ag== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA1DEC982DA; Sun, 20 Sep 2026 10:25:07 +0000 (UTC) From: Chuan Liu via B4 Relay Date: Sun, 20 Sep 2026 18:25:14 +0800 Subject: [PATCH v2 12/12] arm64: dts: amlogic: a9: Add clk-measure controller node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260920-more-socs-to-support-clk_measure-v2-12-224382a429e8@amlogic.com> References: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> In-Reply-To: <20260920-more-socs-to-support-clk_measure-v2-0-224382a429e8@amlogic.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Chuan Liu X-Mailer: b4 0.14.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789899904; l=796; i=chuan.liu@amlogic.com; s=20240902; h=from:subject:message-id; bh=4DgrEoOMoCExjYXex82UD7PxEvK6o2H5kIyRyw8MyZw=; b=LH5sb4t5IBJ5szFqCCnGHBi6Bi9K23ols2Lss7BhhYVthrPh4WCUqLF+KqihHHF+XFO3j5Q72 lzZKwoZzJiHB4rAs+2DPnS7Bu/PNMX34qrQWqwwmZ4qO6uaPcepLXTM X-Developer-Key: i=chuan.liu@amlogic.com; a=ed25519; pk=fnKDB+81SoWGKW2GJNFkKy/ULvsDmJZRGBE7pR5Xcpo= X-Endpoint-Received: by B4 Relay for chuan.liu@amlogic.com/20240902 with auth_id=203 X-Original-From: Chuan Liu Reply-To: chuan.liu@amlogic.com From: Chuan Liu Add the clk-measure controller node for A9 SoC family. Signed-off-by: Chuan Liu --- arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-a9.dtsi index b0e0fadeed82..91f4cf319b0d 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-a9.dtsi @@ -185,6 +185,11 @@ gpio_intc: interrupt-controller@4080 { amlogic,channel-interrupts =3D <10 11 12 13 14 15 16 17 18 19 20 21>; }; + + clk_msr: clock-measure@48000 { + compatible =3D "amlogic,a9-clk-measure"; + reg =3D <0x0 0x48000 0x0 0x1c>; + }; }; =20 gic: interrupt-controller@ff800000 { --=20 2.42.0