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(unknown [10.28.36.165]) by maili.marvell.com (Postfix) with ESMTP id 4EBE83F7098; Thu, 17 Sep 2026 22:00:34 -0700 (PDT) From: Ratheesh Kannoth To: , CC: , , , , , , "Ratheesh Kannoth" Subject: [PATCH net-next] octeontx2-af: Representor devlink id and port mapping Date: Fri, 18 Sep 2026 10:30:21 +0530 Message-ID: <20260918050021.1359606-1-rkannoth@marvell.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE4MDA2MyBTYWx0ZWRfX9+B9GKuLg1jT dXSfikBgu+91FZLP2Jqc9g3XLEalzS8/6m4+DPZ5QahjOULgviQIPESBW8x0XLstD8Ophxz1W02 QgKhYAAo4MPffxSW2kzLDHjHTMfoR6dVHoBypERndQrjq94w775YN6I6HlyTV3c/BJw6oS4Huim IKveE748yqPIl6UpwMxi+9+c7zn2OflQ7LAwXw83zFqbenIXOfHOt1E69PKIFSm8iEAmFLhoBhD SXUcbTcH8WhNW4fGYUpF+7f9TpO+vcrlWHXZ2b3bzAMebTLcqWSo1J7tw0AYOrYu1JHgc645Luw GIMDMCx97NVjatlOCLXOLWbKvkiTCQqafX4cpozOYLltv12hzGRFFobRog+QbygkH8+4X1prIZ5 f8lwAlQOoohSSx/PX87hvOCpZgJ0rtsWxLAQc2XxH94hT7iKH9P1P80wNUfAKybeso548UK3GO1 2IqKc5Zwq+XFjF3piaw== X-Authority-Analysis: v=2.4 cv=bYr+w+PB c=1 sm=1 tr=0 ts=6aacc575 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=5BIeNoMRWAjfrFRditUA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE4MDA2MyBTYWx0ZWRfX/ofjN3u4Za+P oMfIhMH6leNU+aPJCMNU7kZLBWYmDrNCmRoeBEdUgmTxQsxVeVsEQd8uZ1fheoAurYSjUzF6KLn JM0zea9yOB1z38vs9Poet6w1uMmI77U= X-Proofpoint-ORIG-GUID: L2yYt5uaq4NdbHSHNzzBWh_qwFAKqitN X-Proofpoint-GUID: L2yYt5uaq4NdbHSHNzzBWh_qwFAKqitN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-18_01,2026-09-16_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Extend ESW_CFG with a devlink-derived physical ID and copy it into the AF representor configuration. Add a representor port id helper and export rvu_rep_get_vlan_id(). Signed-off-by: Ratheesh Kannoth --- .../net/ethernet/marvell/octeontx2/af/mbox.h | 20 +++++ .../net/ethernet/marvell/octeontx2/af/rvu.h | 8 ++ .../ethernet/marvell/octeontx2/af/rvu_rep.c | 78 +++++++++++++++---- .../net/ethernet/marvell/octeontx2/nic/rep.c | 10 +++ 4 files changed, 102 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net= /ethernet/marvell/octeontx2/af/mbox.h index cece197d1074..cafb92b5d57c 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -1784,10 +1784,30 @@ struct get_rep_cnt_rsp { u64 rsvd; }; =20 +/* + * MBOX_MSG_ESW_CFG wire format. + * + * Transaction shape: the representor driver issues exactly one mailbox + * message per sync on this path. rvu_eswitch_config() in nic/rep.c + * allocates only struct esw_cfg_req, then calls otx2_sync_mbox_msg() + * without enqueueing any other message IDs. The AF handles one request + * per dispatch for this doorbell. + * + * Layout extensions are therefore confined to this message: fields cannot + * be confused with a batched successor because the representor driver + * never batches ESW_CFG with other messages. otx2_mbox_alloc_msg_rsp() + * does advance hdr.next_msgoff cumulatively when multiple messages share + * a sync, but that API usage does not occur on the ESW_CFG caller path. + * + * PF and AF implementations are updated together in-tree; both sides + * must agree on the struct size carried by MBOX_MSG_ESW_CFG. + */ struct esw_cfg_req { struct mbox_msghdr hdr; u8 ena; u64 rsvd; + unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; + u8 switch_id_len; }; =20 struct rep_evt_data { diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/= ethernet/marvell/octeontx2/af/rvu.h index fb4870cd18e9..d1a9be6e4ac1 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -570,6 +570,7 @@ struct npc_kpu_profile_adapter { }; =20 #define RVU_SWITCH_LBK_CHAN 63 +#define RVU_SW_INVALID_PORT_ID ((u32)~0U) =20 struct rvu_switch { struct mutex switch_lock; /* Serialize flow installation */ @@ -577,6 +578,11 @@ struct rvu_switch { u16 *entry2pcifunc; u16 mode; u16 start_entry; + unsigned char switch_id[MAX_PHYS_ITEM_ID_LEN]; + u8 switch_id_len; +#define RVU_SWITCH_FLAG_FW_READY BIT_ULL(0) + u64 flags; + u16 pcifunc; }; =20 struct rep_evtq_ent { @@ -1199,4 +1205,6 @@ int rvu_rep_install_mcam_rules(struct rvu *rvu); void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena); int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable); int npc_mcam_verify_entry(struct npc_mcam *mcam, u16 pcifunc, int entry); +u16 rvu_rep_get_vlan_id(struct rvu *rvu, u16 pcifunc); +u32 rvu_sw_port_id(struct rvu *rvu, u16 pcifunc); #endif /* RVU_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_rep.c index a2781e0f504e..0e2d02b38b60 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_rep.c @@ -6,6 +6,7 @@ */ =20 #include +#include #include #include #include @@ -189,16 +190,41 @@ int rvu_mbox_handler_nix_lf_stats(struct rvu *rvu, return 0; } =20 -static u16 rvu_rep_get_vlan_id(struct rvu *rvu, u16 pcifunc) +u16 rvu_rep_get_vlan_id(struct rvu *rvu, u16 pcifunc) { + u16 *map =3D READ_ONCE(rvu->rep2pfvf_map); + u16 cnt =3D READ_ONCE(rvu->rep_cnt); int id; =20 - for (id =3D 0; id < rvu->rep_cnt; id++) - if (rvu->rep2pfvf_map[id] =3D=3D pcifunc) + if (!map || !cnt) + return 0; + + for (id =3D 0; id < cnt; id++) + if (map[id] =3D=3D pcifunc) return id; return 0; } =20 +u32 rvu_sw_port_id(struct rvu *rvu, u16 pcifunc) +{ + u16 rep_id, *map, cnt; + + map =3D READ_ONCE(rvu->rep2pfvf_map); + cnt =3D READ_ONCE(rvu->rep_cnt); + if (!map || !cnt) + return RVU_SW_INVALID_PORT_ID; + + for (rep_id =3D 0; rep_id < cnt; rep_id++) { + if (map[rep_id] !=3D pcifunc) + continue; + + return FIELD_PREP(GENMASK_ULL(31, 16), rep_id) | + FIELD_PREP(GENMASK_ULL(15, 0), pcifunc); + } + + return RVU_SW_INVALID_PORT_ID; +} + static int rvu_rep_tx_vlan_cfg(struct rvu *rvu, u16 pcifunc, u16 vlan_tci, int *vidx) { @@ -429,6 +455,7 @@ int rvu_rep_pf_init(struct rvu *rvu) return 0; } =20 +/* MBOX_MSG_ESW_CFG arrives as the sole message in its sync; see esw_cfg_r= eq. */ int rvu_mbox_handler_esw_cfg(struct rvu *rvu, struct esw_cfg_req *req, struct msg_rsp *rsp) { @@ -436,6 +463,13 @@ int rvu_mbox_handler_esw_cfg(struct rvu *rvu, struct e= sw_cfg_req *req, return 0; =20 rvu->rep_mode =3D req->ena; + memset(rvu->rswitch.switch_id, 0, sizeof(rvu->rswitch.switch_id)); + rvu->rswitch.switch_id_len =3D 0; + if (req->switch_id_len && req->switch_id_len <=3D MAX_PHYS_ITEM_ID_LEN) { + memcpy(rvu->rswitch.switch_id, req->switch_id, + req->switch_id_len); + rvu->rswitch.switch_id_len =3D req->switch_id_len; + } =20 if (!rvu->rep_mode) rvu_npc_free_mcam_entries(rvu, req->hdr.pcifunc, -1); @@ -447,31 +481,47 @@ int rvu_mbox_handler_get_rep_cnt(struct rvu *rvu, str= uct msg_req *req, struct get_rep_cnt_rsp *rsp) { int pf, vf, numvfs, hwvf, rep =3D 0; - u16 pcifunc; + u16 pcifunc, rep_cnt; + u16 *map; =20 - rvu->rep_pcifunc =3D req->hdr.pcifunc; - rsp->rep_cnt =3D rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs; - rvu->rep_cnt =3D rsp->rep_cnt; + mutex_lock(&rvu->rsrc_lock); + + if (rvu->rep2pfvf_map) { + rsp->rep_cnt =3D rvu->rep_cnt; + for (rep =3D 0; rep < rvu->rep_cnt; rep++) + rsp->rep_pf_map[rep] =3D rvu->rep2pfvf_map[rep]; + mutex_unlock(&rvu->rsrc_lock); + return 0; + } =20 - rvu->rep2pfvf_map =3D devm_kzalloc(rvu->dev, rvu->rep_cnt * - sizeof(u16), GFP_KERNEL); - if (!rvu->rep2pfvf_map) + rep_cnt =3D rvu->cgx_mapped_pfs + rvu->cgx_mapped_vfs; + map =3D devm_kzalloc(rvu->dev, rep_cnt * sizeof(u16), GFP_KERNEL); + if (!map) { + mutex_unlock(&rvu->rsrc_lock); return -ENOMEM; + } =20 for (pf =3D 0; pf < rvu->hw->total_pfs; pf++) { if (!is_pf_cgxmapped(rvu, pf)) continue; pcifunc =3D rvu_make_pcifunc(rvu->pdev, pf, 0); - rvu->rep2pfvf_map[rep] =3D pcifunc; + map[rep] =3D pcifunc; rsp->rep_pf_map[rep] =3D pcifunc; rep++; rvu_get_pf_numvfs(rvu, pf, &numvfs, &hwvf); for (vf =3D 0; vf < numvfs; vf++) { - rvu->rep2pfvf_map[rep] =3D pcifunc | - ((vf + 1) & RVU_PFVF_FUNC_MASK); - rsp->rep_pf_map[rep] =3D rvu->rep2pfvf_map[rep]; + map[rep] =3D pcifunc | ((vf + 1) & RVU_PFVF_FUNC_MASK); + rsp->rep_pf_map[rep] =3D map[rep]; rep++; } } + + rvu->rep_pcifunc =3D req->hdr.pcifunc; + WRITE_ONCE(rvu->rep2pfvf_map, map); + WRITE_ONCE(rvu->rep_cnt, rep_cnt); + rsp->rep_cnt =3D rep_cnt; + + mutex_unlock(&rvu->rsrc_lock); + return 0; } diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c b/drivers/net= /ethernet/marvell/octeontx2/nic/rep.c index 0f5d5642d3f7..97581d786abd 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/rep.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/rep.c @@ -399,8 +399,12 @@ static void rvu_rep_get_stats64(struct net_device *dev, =20 static int rvu_eswitch_config(struct otx2_nic *priv, u8 ena) { + struct devlink_port_attrs attrs =3D {}; struct esw_cfg_req *req; =20 + rvu_rep_devlink_set_switch_id(priv, &attrs.switch_id); + + /* Sole message in this sync; see esw_cfg_req in af/mbox.h. */ mutex_lock(&priv->mbox.lock); req =3D otx2_mbox_alloc_msg_esw_cfg(&priv->mbox); if (!req) { @@ -408,6 +412,12 @@ static int rvu_eswitch_config(struct otx2_nic *priv, u= 8 ena) return -ENOMEM; } req->ena =3D ena; + req->switch_id_len =3D attrs.switch_id.id_len; + if (req->switch_id_len > MAX_PHYS_ITEM_ID_LEN) { + mutex_unlock(&priv->mbox.lock); + return -EINVAL; + } + memcpy(req->switch_id, attrs.switch_id.id, req->switch_id_len); otx2_sync_mbox_msg(&priv->mbox); mutex_unlock(&priv->mbox.lock); return 0; --=20 2.43.0