From nobody Fri Sep 25 00:40:14 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B8AE14B44B2; Fri, 18 Sep 2026 09:07:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722473; cv=none; b=UWq910fzFZ6Tk0enSKW6GDFTj4iE4ZbRyWU8dxYC2retgNbzH2d35LRpACytsYeStnK/tRfGc2Rc9vq4kdf+WPFTyAcBYCvE1BZH7viOFFcI4HtA9somfgqnWhlF3oYvxqjU28LdwiiemU26AVqoq7pwjT0VRyW6JwJt+GA1hmY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722473; c=relaxed/simple; bh=D13TZOBo/DBaAEpd1EHxDAh+ujhHKHZTmqUwewFTI2Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=r+JDWd+NeW8cFrFlpZ2ubZ13UtmUGtanVCMzyxtb7wwbrt6g0Hzw0aj0EReMGxgHQIhTIVFNcBhOM6Z1w8MgLZVYUS0hyrv5w0dDkqAccz5QV3kYHo0wT4LMg6PskkyqQs5kaCBLsjqNwWDN689YZjqDf5wNBLYO6wv6PurCfKA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=0+QPEqwI; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="0+QPEqwI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1789722476; x=1821258476; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=D13TZOBo/DBaAEpd1EHxDAh+ujhHKHZTmqUwewFTI2Y=; b=0+QPEqwIHOqvRidtzsQrMOkKxOSlqXVOLSa3Ws+3ZATzlcLfkZ33AJvP sxli+CYV0MboP6P21CKN2FqCncdW/yMFsl3bG0XmlDY2EkOXHxThyjj5s Y3+0cbaXkkwRuyHNpgu05HiBw7B+foLegHgNyNs8l5whRkK5MwuLAc7qn Eh0sKTSgP9ywhBMlfPH4unVI87O93GXYibEccKJK+KpfzVIYiMgJ+MtJB DNQf7dFUxPR+M7G/eovbW+pZLTPwP+sjktLKVdtbOfR/CcsX4g21QJSVM eu6Q/bTCoBZFUnnvcOHvdVC6L2qscYhbmmezmXADgtVvWC1xG0L82bEt6 A==; X-CSE-ConnectionGUID: 22ucE62hRaioW9R9KVc3HA== X-CSE-MsgGUID: 1NexWXW1RtaeAS2KsRfceQ== X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="230919713" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2026 02:07:49 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex2.mchp-main.com (10.10.87.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Fri, 18 Sep 2026 02:07:44 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:07:41 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:27 +0300 Subject: [PATCH v7 01/11] iio: dac: mcp47feb02: initialize dac_data field in channel data struct at probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-1-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=1456; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=D13TZOBo/DBaAEpd1EHxDAh+ujhHKHZTmqUwewFTI2Y=; b=F+O1vuxIjH6444hmlyQoeW23D+z9Oszs0HPN72NbJ+CRlGqdslxu9Vr2vNU0DQ7eYUuOd5Tni XDmJfu7AyNsB0iKYAajM4B1Ldth80u1Bxnwc08Y5FCfx+Y00khGuUDa X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Prevent operations which use cache from overwriting default hardware values with zeros by reading active DAC registers during probe to correctly initialize the channel struct DAC values. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel= .org/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar Reviewed-by: Andy Shevchenko --- drivers/iio/dac/mcp47feb02.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 8640b0ef4433da2b40d4b7e53fe6109737314951..6a3875e1d6a2c0cdd1464103581= 30c44b1360f56 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1019,7 +1019,12 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb= 02_data *data) gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); - unsigned int pd_tmp; + unsigned int pd_tmp, dac_val; + + ret =3D regmap_read(data->regmap, REG_ADDR(i), &dac_val); + if (ret) + return ret; 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Fri, 18 Sep 2026 02:07:47 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:07:44 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:28 +0300 Subject: [PATCH v7 02/11] iio: dac: mcp47feb02: Fix gain field initialization for active channels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-2-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=2236; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=H7ypP81i1RuzGXOXcicos0XVLScuC2MwSzhDWEVRRBU=; b=YM+CWxQLIQNtgmVIRUYXJmcA5GV+wazsedslWyjwr4QspNdtN0TKLaYMl/OCaSwdi9mAXaj7J ifQ7HcVPwI/ATQrlwwo/Jl4acNQLuGZWgxXu8gtPQjO+OgqLryVhxrR X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= As per MCP47FXBX48 Datasheet, in the format of the Gain Control and System Status Register each DAC channel has one bit to control its gain, starting at bit 8, while bits 0-7 contain status or unimplemented bits. The previous formula didn't initialize correctly all channels, being replaced by using field_get() with the already defined macro used in write operations where needed in the rest of the driver implementation. DAC_GAIN_MASK(i) extracts the gain control bit for each active channel correctly in one step. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel= .org/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar Reviewed-by: Andy Shevchenko --- drivers/iio/dac/mcp47feb02.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 6a3875e1d6a2c0cdd146410358130c44b1360f56..1b1a4972f77196399297b3912ab= e69efcbf17d75 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -36,7 +36,6 @@ #define MCP47FEB02_DAC_CTRL_MASK GENMASK(1, 0) =20 #define MCP47FEB02_GAIN_CTRL_STATUS_REG_ADDR 0x50 -#define MCP47FEB02_GAIN_BIT_MASK BIT(0) #define MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK BIT(6) #define MCP47FEB02_GAIN_BITS_MASK GENMASK(15, 8) =20 @@ -1016,7 +1015,6 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) if (ret) return ret; =20 - gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); unsigned int pd_tmp, dac_val; @@ -1027,7 +1025,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) data->chdata[i].dac_data =3D dac_val; =20 data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; - data->chdata[i].use_2x_gain =3D (gain_ch >> i) & MCP47FEB02_GAIN_BIT_MA= SK; + data->chdata[i].use_2x_gain =3D field_get(DAC_GAIN_MASK(i), gain_ch); =20 /* * Inform the user that the current voltage reference read from the vola= tile --=20 2.43.0 From nobody Fri Sep 25 00:40:14 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64A644229BA; Fri, 18 Sep 2026 09:08:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; 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d="scan'208";a="295219121" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2026 02:07:55 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.49; Fri, 18 Sep 2026 02:07:50 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:07:47 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:29 +0300 Subject: [PATCH v7 03/11] iio: dac: mcp47feb02: use field_get() instead of custom dynamic macros Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-3-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=1508; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=FaODXQpCD/pVNfBOQ2De+KS1r/oxpsS0Ncq5LaCtSC8=; b=LdnVyJmDQVFV1dcZKADzA6HRcf34WD9W7pGwcQZQU5DCMNnJKLZVjvBsriNfufao7qFTkaut3 dVxcq3q1FApDCt89+A067HryjgPgv0JmmXFhQgWe0tH0ztFwqAff/55 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Replace manual bit operations which select channel corresponding bits from a control register in mcp47feb02_init_ctrl_regs() with field_get() macro used with masks already defined for regmap operations within the driver. Suggested-by: Jonathan Cameron Link: https://lore.kernel.org/all/20260913224339.490d89ba@jic23-hlaptop/ Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 1b1a4972f77196399297b3912abe69efcbf17d75..d910a6cf9718d6c6ad68eb1bb1f= f5f3b15b33e84 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1024,7 +1024,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) return ret; data->chdata[i].dac_data =3D dac_val; =20 - data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; + data->chdata[i].ref_mode =3D field_get(DAC_CTRL_MASK(i), vref_ch); data->chdata[i].use_2x_gain =3D field_get(DAC_GAIN_MASK(i), gain_ch); =20 /* @@ -1068,7 +1068,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) break; } =20 - pd_tmp =3D (pd_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_MASK; + pd_tmp =3D field_get(DAC_CTRL_MASK(i), pd_ch); data->chdata[i].powerdown_mode =3D pd_tmp ? (pd_tmp - 1) : pd_tmp; data->chdata[i].powerdown =3D !!(data->chdata[i].powerdown_mode); } --=20 2.43.0 From nobody Fri Sep 25 00:40:14 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36CD13EFD27; Fri, 18 Sep 2026 09:08:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722484; cv=none; b=dukqcb16HTEzqRc+s895POsTcfPOq6PBI5A7w5P1waXMO+w+3tko6gDUZFzGvtwP+KvwpfKpU5L7mT/J6aH+fiuAwBY9I3nqTio3zcEiFS0Nl+pd5BU5RhBRcxYUib7iqFxRAn7jS8weEgLBVvXtVXKqhhbxfyZYiEiMVU5Ty34= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722484; c=relaxed/simple; bh=a+u0WLPF1pBjssaax87p4zK10+4fRro4TveSh8jNkAk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=YziWDJe9Jm0ADAsh89jP5ea0wZtIUtFC/YoXEFHXKK2Z+zZb7648/kHALulL6OMAabGJe7lbS2q4lApLuFtSqNmTw96muyCuyw5ulF/iIZPCpoXiCDwQe7LWzmGx6Q+1fMWLHOK0rxZANk1921vSPLI0rc3Ii5hwMbsdNrmYOtQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=LlcUTmcM; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="LlcUTmcM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1789722487; x=1821258487; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=a+u0WLPF1pBjssaax87p4zK10+4fRro4TveSh8jNkAk=; b=LlcUTmcM3iZq7xzOE3sAejD8cs7VbWeSLbkHiNQL++NoEp0ZQTKx8zGG EPhqY0JCBsZ0ImoGQ0cByfKGc4SHIh6R6wrvqzJwBA5wQvTCnISjfGOSa Uw56JQlMMrAiCk/dvWCtanhYNIpqgPZHWDCD/WwyRnXhL8TbXonj+bYJm YG25XKSh2F9cjTfJZaZ+dhASGb7FVTx10Hm0FYIkZ8DRa1JEbRGzw/xLY GTcrzgMQPl8MkXTmUoKTJpGRDBsjQ+TlPWAmi8d8dtF8hcEC5sLz3VKM4 fYNsRFIt9wOXLw6sBrtje8N6dVVW/D42YlMpQl8ZlhKQrrW5QrVicaoKj g==; X-CSE-ConnectionGUID: DfTTcDInRgeI3lAjtihk3A== X-CSE-MsgGUID: 10IzJ8zEQZ2Q3ChEWdD84g== X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="295219128" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Sep 2026 02:07:58 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex3.mchp-main.com (10.10.87.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.49; Fri, 18 Sep 2026 02:07:53 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:07:50 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:30 +0300 Subject: [PATCH v7 04/11] iio: dac: mcp47feb02: Return len when disabling EEPROM store Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-4-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=1073; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=a+u0WLPF1pBjssaax87p4zK10+4fRro4TveSh8jNkAk=; b=+QIx3hxCTSWoNnDjJfyfnG0dC1wLSDQZVo+MyJbaUbQVAZmP3XjYiYkkAlXiRngtztRll5o2E Xy20XwdifGACmD7yZsPWduEM59vojlMWHjNAZgDf4+J7GlAiTCCalmR X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= When state is false, return the number of bytes (len) the buffer has instead of 0 to properly signal that the input buffer was fully consumed, preventing unnecessary write retries. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel= .org/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar Reviewed-by: Andy Shevchenko --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index d910a6cf9718d6c6ad68eb1bb1ff5f3b15b33e84..2bd2e1bd93db01f79122aaeda2b= a4ff14320b404 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -467,7 +467,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a return ret; =20 if (!state) - return 0; + return len; =20 /* * Verify DAC Wiper and DAC Configuration are unlocked. If both are disab= led, --=20 2.43.0 From nobody Fri Sep 25 00:40:14 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8D7C3AAF73; Fri, 18 Sep 2026 09:07:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722479; cv=none; b=Fy8R8u7/3tgSrOxbDCZjaixHB7lc8KkchNA5CQF1sZr2f1cly5JAtwCPvbrd+JRem76DD0kZqL4sXNU6Wgdg3FZqXi4KowfAa18v/T+ZQQq4LsgmuK+k9h3zH6R647Y9h135+Y1Q1VOYN6Ob0jYXAeOhB4SXpm/Wwr9MADJmFRc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722479; c=relaxed/simple; bh=OwppHPjFW6q4/wKixu3bgggc1W8zAnp5gDVDPfMzhCs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=ALuEN2ve9OxyfV72uRvc+q1GjogmqEmJz29hV9dl7ugYfxuENs9wgigLIJ7l1Ix6aiht/UNqyJvyksJA33JwjCrbZ9h93+eMxA4uX/6KG85b+DIiuHGU5Hm83WDei/Li+DBfacc2VWb1cuCaAYjuJy98Y2emSEAINto6uag8buY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=kzRV8qfi; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="kzRV8qfi" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1789722478; x=1821258478; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=OwppHPjFW6q4/wKixu3bgggc1W8zAnp5gDVDPfMzhCs=; b=kzRV8qfiF/ce/nzCp1Ds1GKrMk9o4JCG6hh0YfXUnsNsGNdylTj067ev 0y8Ehb3r9KljFASLoJQRIN1GnQ4lQLzFETUc1drAHVHwXcYKRkN/20Yrr Fp2zJp0xQ1U9IOOUFcSjmmo0UnvZR4d3XqdgjrCA9/KoA6xQ80LNQFYQ5 ogKWRShFusmit66dqAG7RXc+EghPvDGBl/mpmMq1gZMzDyUONQyWXT/Yp +Jbs5lpOOWkIaVIbbJyl3yQBdZEbOhiR9KemUIXdrTeuAiFLqt9k3qusv IC0sO4cz8tI7Y3zkrPse594DIJTIsDLSvE13EptGrmoX3UXZIUT+XdAME A==; X-CSE-ConnectionGUID: GJQqhz/ARuSzKB+Aiy7X9A== X-CSE-MsgGUID: gdX/MxDhSdiGkcjucePuAw== X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="63800309" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 18 Sep 2026 02:07:56 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Fri, 18 Sep 2026 02:07:56 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:07:53 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:31 +0300 Subject: [PATCH v7 05/11] iio: dac: mcp47feb02: Increase EEPROM Programming Write Cycle Time Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-5-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=1621; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=OwppHPjFW6q4/wKixu3bgggc1W8zAnp5gDVDPfMzhCs=; b=ZDJICOI22B1TAHh1bLTA+I/rawICaxGI4eXnjDV0CeAgAXrJAvBVpds8GCexwa8k0SIjo9748 ewZO55F8KIsAkc7uH7V70qW9M7GmWZMvyZhO+KZ+OH+dJG4ZVBymnyB X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Increase the EEPROM write polling timeout to prevent -ETIMEDOUT errors and incomplete nonvolatile write cycle, according to the time specified in the datasheets (11-16 ms). Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/all/20260819125300.6B9211F000E9@smtp.kernel= .org/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar Reviewed-by: Andy Shevchenko --- drivers/iio/dac/mcp47feb02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 2bd2e1bd93db01f79122aaeda2ba4ff14320b404..9d4ba95da84ace639aaefe87262= b7125def2a48e 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -447,7 +447,7 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), - USEC_PER_MSEC, USEC_PER_MSEC * 5); + 1 * USEC_PER_MSEC, 150 * USEC_PER_MSEC); if (ret) return ret; =20 @@ -507,7 +507,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a =20 ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), - USEC_PER_MSEC, USEC_PER_MSEC * 5); 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Fri, 18 Sep 2026 02:07:56 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:32 +0300 Subject: [PATCH v7 06/11] iio: dac: mcp47feb02: Avoid unjustified probe error on missing label Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-6-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=1737; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=wWM5hqIN2zstuEyBHmaV/+dpBvmKR8Oev20eC7wtBCk=; b=IRcDYWBk46gaAxH12SzBj2vHACcDb0TVucfkKgSczTLivkX5FCTv0a1p4z+LG/x3hI8xT+cBI O//BIhUY4H7Cw8mgRFJdtZ2st4QfkDHTpy21yNfTeaNWiV00HghB6iH X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Fix unjustified probe error on missing optional 'label' property by replacing dev_err_probe() with dev_warn_probe(). Correct %pfw usage by passing the child fwnode handle directly in the error message. Besides the probe warning a read error is returned at the attempt of reading a null label. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Closes: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel= .org/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar Reviewed-by: Andy Shevchenko --- drivers/iio/dac/mcp47feb02.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 9d4ba95da84ace639aaefe87262b7125def2a48e..43cf69e43a41e3555e37d135132= 8912dffb84a3c 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -921,7 +921,10 @@ static int mcp47feb02_read_label(struct iio_dev *indio= _dev, struct iio_chan_spec { struct mcp47feb02_data *data =3D iio_priv(indio_dev); =20 - return sysfs_emit(label, "%s\n", data->labels[ch->address]); + if (data->labels[ch->address]) + return sysfs_emit(label, "%s\n", data->labels[ch->address]); + + return -ENOENT; } =20 static const struct iio_info mcp47feb02_info =3D { @@ -976,8 +979,7 @@ static int mcp47feb02_parse_fw(struct iio_dev *indio_de= v, =20 ret =3D fwnode_property_read_string(child, "label", &data->labels[reg]); if (ret) - return dev_err_probe(dev, ret, "%pfw: invalid label\n", - fwnode_get_name(child)); + dev_warn_probe(dev, ret, "%pfw: invalid label\n", child); =20 chanspec.address =3D reg; chanspec.channel =3D reg; --=20 2.43.0 From nobody Fri Sep 25 00:40:14 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 338DE4B7A2F; Fri, 18 Sep 2026 09:08:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722484; cv=none; b=cpbOQSw0ljuE+7n/7C2WDbVWUM0oSJYmdH6q0bRZGT823sF5U0H4G/WR9WgDYO8irAhuo4QIL8V0zJUJQ+cmWC6s9Op3ZxRseh6Nhz4JGJ+nucM8XW2AKlnZByB6j3ijkRQc/3fVHb/UkAO0a+WFq8XhwFuukyTnT6zpKoBDgWc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789722484; 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Fri, 18 Sep 2026 02:08:02 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:07:59 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:33 +0300 Subject: [PATCH v7 07/11] iio: dac: mcp47feb02: correct typo from a comment Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-7-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , Joshua Crofts X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=1005; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=uQpyhEiAgb5Nn6OJCO6UkZhc3AbVe3PsA1yiSkG5Uh8=; b=99WWBhmvufeXWd/QcL+U039GQxpIie3soUQCL7MdY5HRhXxBeFH/cqBPQLHg/JIM75O5YyRGD tqoNmkVDU9QCCC2mfdf717nL0xxm8/4nADKrSZrrRHns556YSmf6ss8 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Typo corrected to 'Register' in the comment regarding defined masks for the gain register. Suggested-by: Joshua Crofts Link: https://lore.kernel.org/all/20260723231859.03f92ce6@systembl0wer/ Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 43cf69e43a41e3555e37d1351328912dffb84a3c..8019d398fbbbc866303ed7e9280= f30acef4d6cc7 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -51,7 +51,7 @@ #define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) #define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) =20 -/* Gain Control and I2C Slave Address Reguster fields */ +/* Gain Control and I2C Slave Address Register fields */ #define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) #define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) =20 --=20 2.43.0 From nobody Fri Sep 25 00:40:14 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3CE54B7A3E; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-8-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=6018; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=R9c7M1KPe6wv8k9h1ibYF3FWsvL/EGbNmD/Wr0eut48=; b=gBvhyHA+cR9yzyLw4GDZ70oiA39rDF9NO4zs1V3CSgMvyVRC89eruJt0RwUQZsvZUACdXE048 l+4s7IzDAcMBDwS7P7ShSob/+gPX53n33kmPIQ/vCqUVrOCrC911WhX X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Replace manual bit operations which select channel corresponding bits from a control register for each write to regmap operation using regmap_update_bits(). This approach matches the use of field_get() in probe() and improves code readability. Suggested-by: Jonathan Cameron Link: https://lore.kernel.org/all/20260917015334.1f43bd02@jic23-hlaptop/ Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 36 ++++++++++++++++++++++-------------- 1 file changed, 22 insertions(+), 14 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 8019d398fbbbc866303ed7e9280f30acef4d6cc7..7312c2c96141e417726fc97954d= 8cb1fafefe3e9 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -48,12 +48,10 @@ #define MCP47FEB02_NV_I2C_SLAVE_ADDR_MASK GENMASK(7, 0) =20 /* Voltage reference, Power-Down control register and DAC Wiperlock status= register fields */ -#define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) -#define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) +#define MCP47FEB02_VREF_PD_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) =20 /* Gain Control and I2C Slave Address Register fields */ #define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) -#define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) =20 #define REG_ADDR(reg) ((reg) << 3) #define NV_REG_ADDR(reg) ((NV_DAC_ADDR_OFFSET + (reg)) << 3) @@ -550,11 +548,13 @@ static int mcp47feb02_suspend(struct device *dev) =20 for_each_set_bit(ch, &data->active_channels_mask, data->phys_channels) { u8 pd_mode; + u32 mask; =20 data->chdata[ch].powerdown =3D true; pd_mode =3D data->chdata[ch].powerdown_mode + 1; + mask =3D MCP47FEB02_VREF_PD_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_POWER_DOWN_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, pd_mode)); + mask, field_prep(mask, pd_mode)); if (ret) return ret; =20 @@ -576,6 +576,7 @@ static int mcp47feb02_resume(struct device *dev) =20 for_each_set_bit(ch, &data->active_channels_mask, data->phys_channels) { u8 pd_mode; + u32 mask; int ret; =20 data->chdata[ch].powerdown =3D false; @@ -585,20 +586,21 @@ static int mcp47feb02_resume(struct device *dev) if (ret) return ret; =20 + mask =3D MCP47FEB02_VREF_PD_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, pd_mode)); + mask, field_prep(mask, pd_mode)); if (ret) return ret; =20 + mask =3D DAC_GAIN_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_GAIN_CTRL_STATUS_REG= _ADDR, - DAC_GAIN_MASK(ch), - DAC_GAIN_VAL(ch, data->chdata[ch].use_2x_gain)); + mask, field_prep(mask, data->chdata[ch].use_2x_gain)); if (ret) return ret; =20 + mask =3D MCP47FEB02_VREF_PD_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_POWER_DOWN_REG_ADDR, - DAC_CTRL_MASK(ch), - DAC_CTRL_VAL(ch, MCP47FEB02_NORMAL_OPERATION)); + mask, field_prep(mask, MCP47FEB02_NORMAL_OPERATION)); if (ret) return ret; } @@ -641,6 +643,7 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p u32 reg =3D ch->address; u8 tmp_pd_mode; bool state; + u32 mask; int ret; =20 guard(mutex)(&data->lock); @@ -654,8 +657,9 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p * requires writing normal operation mode (0) to the channel-specific reg= ister bits. */ tmp_pd_mode =3D state ? (data->chdata[reg].powerdown_mode + 1) : MCP47FEB= 02_NORMAL_OPERATION; + mask =3D MCP47FEB02_VREF_PD_MASK(reg); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_POWER_DOWN_REG_ADDR, - DAC_CTRL_MASK(reg), DAC_CTRL_VAL(reg, tmp_pd_mode)); + mask, field_prep(mask, tmp_pd_mode)); if (ret) return ret; =20 @@ -799,6 +803,7 @@ static int mcp47feb02_check_scale(struct mcp47feb02_dat= a *data, int val, int val static int mcp47feb02_ch_scale(struct mcp47feb02_data *data, int ch, int s= cale) { int tmp_val, ret; + u32 mask; =20 if (scale =3D=3D MCP47FEB02_SCALE_VDD) { tmp_val =3D MCP47FEB02_VREF_VDD; @@ -820,8 +825,9 @@ static int mcp47feb02_ch_scale(struct mcp47feb02_data *= data, int ch, int scale) tmp_val =3D MCP47FEB02_INTERNAL_BAND_GAP; } =20 + mask =3D MCP47FEB02_VREF_PD_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, tmp_val)); + mask, field_prep(mask, tmp_val)); if (ret) return ret; =20 @@ -844,6 +850,7 @@ static int mcp47feb02_ch_scale(struct mcp47feb02_data *= data, int ch, int scale) static int mcp47feb02_set_scale(struct mcp47feb02_data *data, int ch, int = scale) { int tmp_val, ret; + u32 mask; =20 ret =3D mcp47feb02_ch_scale(data, ch, scale); if (ret) @@ -854,8 +861,9 @@ static int mcp47feb02_set_scale(struct mcp47feb02_data = *data, int ch, int scale) else tmp_val =3D MCP47FEB02_GAIN_BIT_X1; =20 + mask =3D DAC_GAIN_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_GAIN_CTRL_STATUS_REG_= ADDR, - DAC_GAIN_MASK(ch), DAC_GAIN_VAL(ch, tmp_val)); + mask, field_prep(mask, tmp_val)); if (ret) return ret; =20 @@ -1026,7 +1034,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) return ret; data->chdata[i].dac_data =3D dac_val; =20 - data->chdata[i].ref_mode =3D field_get(DAC_CTRL_MASK(i), vref_ch); + data->chdata[i].ref_mode =3D field_get(MCP47FEB02_VREF_PD_MASK(i), vref_= ch); data->chdata[i].use_2x_gain =3D field_get(DAC_GAIN_MASK(i), gain_ch); =20 /* @@ -1070,7 +1078,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) break; } =20 - pd_tmp =3D field_get(DAC_CTRL_MASK(i), pd_ch); + pd_tmp =3D field_get(MCP47FEB02_VREF_PD_MASK(i), pd_ch); data->chdata[i].powerdown_mode =3D pd_tmp ? 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The renamed file will contain the common DAC functionality shared by the MCP47FxBy1/2/4/8 I2C and MCP48FxBy1/2/4/8 SPI drivers. The MCP47FEB02 driver was refactored into two modules: mcp47feb02-core.c and mcp47feb02-i2c.c in order to prepare the support for SPI MCP48FxBy1/2/4/8 DAC family on top of the current implementation. Signed-off-by: Ariana Lazar --- MAINTAINERS | 2 +- drivers/iio/dac/Kconfig | 9 +- drivers/iio/dac/Makefile | 3 +- .../iio/dac/{mcp47feb02.c =3D> mcp47feb02-core.c} | 325 ++-------------= ------ drivers/iio/dac/mcp47feb02-i2c.c | 145 +++++++++ drivers/iio/dac/mcp47feb02.h | 43 +++ 6 files changed, 220 insertions(+), 307 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 3a19da74d00c9dfb48e900df71a86d4686d3ec2c..81abeab698f43bcfb755ed59ce1= 217bea1a28eb8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16297,7 +16297,7 @@ M: Ariana Lazar L: linux-iio@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml -F: drivers/iio/dac/mcp47feb02.c +F: drivers/iio/dac/mcp47feb02* =20 MCP4821 DAC DRIVER M: Anshul Dalal diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 3b3c77d8b3e1b6731df6e96723f92d4225e9783d..c99c32b229fb683d6407f30682f= 7ea6104984421 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -593,9 +593,13 @@ config MCP47A1 will be called mcp47a1. =20 config MCP47FEB02 - tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 DAC driver" + tristate + +config MCP47FEB02_I2C + tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 I2C DAC driver" depends on I2C select REGMAP_I2C + select MCP47FEB02 help Say yes here if you want to build the driver for the Microchip: - 8-bit DAC: @@ -611,7 +615,8 @@ config MCP47FEB02 (DAC) with I2C interface. =20 To compile this driver as a module, choose M here: the module - will be called mcp47feb02. + will be called mcp47feb02_i2c and you will also get + mcp47feb02_core for the core module. =20 config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 992f8930f95caed97ebad891d0f3685b4e23bf29..6377a9c42d983f615a0aa4d36a0= c3d3639c62951 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -56,7 +56,8 @@ obj-$(CONFIG_MCF54415_DAC) +=3D mcf54415_dac.o obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47A1) +=3D mcp47a1.o -obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02.o +obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o +obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02-core= .c similarity index 73% rename from drivers/iio/dac/mcp47feb02.c rename to drivers/iio/dac/mcp47feb02-core.c index 7312c2c96141e417726fc97954d8cb1fafefe3e9..91fad42df2168f32b3de2757b4d= e7c1bb4b07b3a 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02-core.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C and SPI interface * - * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries * * Author: Ariana Lazar * @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -29,6 +28,8 @@ #include #include =20 +#include "mcp47feb02.h" + /* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ #define MCP47FEB02_DAC0_REG_ADDR 0x00 #define MCP47FEB02_VREF_REG_ADDR 0x40 @@ -82,220 +83,12 @@ enum mcp47feb02_gain_bit_mode { MCP47FEB02_GAIN_BIT_X2 =3D 1, }; =20 -static const char * const mcp47feb02_powerdown_modes[] =3D { +const char * const mcp47feb02_powerdown_modes[] =3D { "1kohm_to_gnd", "100kohm_to_gnd", "open_circuit", }; =20 -/** - * struct mcp47feb02_features - chip specific data - * @name: device name - * @phys_channels: number of hardware channels - * @resolution: DAC resolution - * @have_ext_vref1: does the hardware have an the second external voltage = reference? - * @have_eeprom: does the hardware have an internal eeprom? - */ -struct mcp47feb02_features { - const char *name; - unsigned int phys_channels; - unsigned int resolution; - bool have_ext_vref1; - bool have_eeprom; -}; - -static const struct mcp47feb02_features mcp47feb01_chip_features =3D { - .name =3D "mcp47feb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb02_chip_features =3D { - .name =3D "mcp47feb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb04_chip_features =3D { - .name =3D "mcp47feb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb08_chip_features =3D { - .name =3D "mcp47feb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb11_chip_features =3D { - .name =3D "mcp47feb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb12_chip_features =3D { - .name =3D "mcp47feb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb14_chip_features =3D { - .name =3D "mcp47feb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb18_chip_features =3D { - .name =3D "mcp47feb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb21_chip_features =3D { - .name =3D "mcp47feb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb22_chip_features =3D { - .name =3D "mcp47feb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb24_chip_features =3D { - .name =3D "mcp47feb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb28_chip_features =3D { - .name =3D "mcp47feb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47fvb01_chip_features =3D { - .name =3D "mcp47fvb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb02_chip_features =3D { - .name =3D "mcp47fvb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb04_chip_features =3D { - .name =3D "mcp47fvb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb08_chip_features =3D { - .name =3D "mcp47fvb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb11_chip_features =3D { - .name =3D "mcp47fvb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb12_chip_features =3D { - .name =3D "mcp47fvb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb14_chip_features =3D { - .name =3D "mcp47fvb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb18_chip_features =3D { - .name =3D "mcp47fvb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb21_chip_features =3D { - .name =3D "mcp47fvb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb22_chip_features =3D { - .name =3D "mcp47fvb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb24_chip_features =3D { - .name =3D "mcp47fvb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb28_chip_features =3D { - .name =3D "mcp47fvb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - /** * struct mcp47feb02_channel_data - channel configuration * @ref_mode: chosen voltage for reference @@ -376,7 +169,7 @@ static const struct regmap_access_table mcp47feb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47feb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47feb02_regmap_config =3D { +const struct regmap_config mcp47feb02_regmap_config =3D { .name =3D "mcp47feb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -388,6 +181,7 @@ static const struct regmap_config mcp47feb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47feb02_regmap_config, "IIO_MCP47FEB02"); =20 /* For devices that doesn't have nonvolatile memory */ static const struct regmap_range mcp47fvb02_readable_ranges[] =3D { @@ -418,7 +212,7 @@ static const struct regmap_access_table mcp47fvb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47fvb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47fvb02_regmap_config =3D { +const struct regmap_config mcp47fvb02_regmap_config =3D { .name =3D "mcp47fvb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -430,6 +224,7 @@ static const struct regmap_config mcp47fvb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47fvb02_regmap_config, "IIO_MCP47FEB02"); =20 static int mcp47feb02_write_to_eeprom(struct mcp47feb02_data *data, unsign= ed int reg, unsigned int val) @@ -440,8 +235,6 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int * Wait until the currently occurring EEPROM Write Cycle is completed. * Only serial commands to the volatile memory are allowed. */ - guard(mutex)(&data->lock); - ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), @@ -467,6 +260,8 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a if (!state) return len; =20 + guard(mutex)(&data->lock); + /* * Verify DAC Wiper and DAC Configuration are unlocked. If both are disab= led, * writing to EEPROM is available. @@ -575,12 +370,10 @@ static int mcp47feb02_resume(struct device *dev) guard(mutex)(&data->lock); =20 for_each_set_bit(ch, &data->active_channels_mask, data->phys_channels) { - u8 pd_mode; u32 mask; int ret; =20 data->chdata[ch].powerdown =3D false; - pd_mode =3D data->chdata[ch].powerdown_mode + 1; =20 ret =3D regmap_write(data->regmap, REG_ADDR(ch), data->chdata[ch].dac_da= ta); if (ret) @@ -588,7 +381,7 @@ static int mcp47feb02_resume(struct device *dev) =20 mask =3D MCP47FEB02_VREF_PD_MASK(ch); ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - mask, field_prep(mask, pd_mode)); + mask, field_prep(mask, data->chdata[ch].ref_mode)); if (ret) return ret; =20 @@ -668,7 +461,7 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p return len; } =20 -static DEFINE_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp= 47feb02_resume); +EXPORT_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp47feb02= _resume); =20 static const struct iio_enum mcp47febxx_powerdown_mode_enum =3D { .items =3D mcp47feb02_powerdown_modes, @@ -1103,10 +896,10 @@ static int mcp47feb02_init_ch_scales(struct mcp47feb= 02_data *data, int vdd_uV, return 0; } =20 -static int mcp47feb02_probe(struct i2c_client *client) +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap) { - const struct mcp47feb02_features *chip_features; - struct device *dev =3D &client->dev; + struct device *dev =3D regmap_get_device(regmap); struct mcp47feb02_data *data; struct iio_dev *indio_dev; int vref1_uV, vref_uV, vdd_uV, ret; @@ -1115,22 +908,16 @@ static int mcp47feb02_probe(struct i2c_client *clien= t) if (!indio_dev) return -ENOMEM; =20 - data =3D iio_priv(indio_dev); - chip_features =3D i2c_get_match_data(client); - if (!chip_features) - return -EINVAL; + dev_set_drvdata(dev, indio_dev); =20 + data =3D iio_priv(indio_dev); data->chip_features =3D chip_features; + data->regmap =3D regmap; =20 - if (chip_features->have_eeprom) { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + if (chip_features->have_eeprom) indio_dev->info =3D &mcp47feb02_info; - } else { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + else indio_dev->info =3D &mcp47fvb02_info; - } - if (IS_ERR(data->regmap)) - return dev_err_probe(dev, PTR_ERR(data->regmap), "Error initializing i2c= regmap\n"); =20 indio_dev->name =3D chip_features->name; =20 @@ -1187,75 +974,7 @@ static int mcp47feb02_probe(struct i2c_client *client) =20 return devm_iio_device_register(dev, indio_dev); } - -static const struct i2c_device_id mcp47feb02_id[] =3D { - { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, - { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, - { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, - { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, - { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, - { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, - { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, - { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, - { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, - { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, - { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, - { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, - { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, - { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, - { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, - { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, - { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, - { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, - { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, - { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, - { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, - { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, - { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, - { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, - { } -}; -MODULE_DEVICE_TABLE(i2c, mcp47feb02_id); - -static const struct of_device_id mcp47feb02_of_match[] =3D { - { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, - { } -}; -MODULE_DEVICE_TABLE(of, mcp47feb02_of_match); - -static struct i2c_driver mcp47feb02_driver =3D { - .driver =3D { - .name =3D "mcp47feb02", - .of_match_table =3D mcp47feb02_of_match, - .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), - }, - .probe =3D mcp47feb02_probe, - .id_table =3D mcp47feb02_id, -}; -module_i2c_driver(mcp47feb02_driver); +EXPORT_SYMBOL_NS(mcp47feb02_common_probe, "IIO_MCP47FEB02"); =20 MODULE_AUTHOR("Ariana Lazar "); MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); diff --git a/drivers/iio/dac/mcp47feb02-i2c.c b/drivers/iio/dac/mcp47feb02-= i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..7ec0cccad79bc9e9e3f919209c3= 4d0f39656a370 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-i2c.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with I2C interface: + * [MCP47FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005375A.pdf + * [MCP47FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005405A.pdf + * [MCP47FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb28, 8, 12, true, false); + +static int mcp47feb02_i2c_probe(struct i2c_client *client) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &client->dev; + struct regmap *regmap; + + chip_features =3D i2c_get_match_data(client); + if (!chip_features) + return dev_err_probe(dev, -ENODATA, "No match data found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing I2C regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct i2c_device_id mcp47feb02_i2c_id[] =3D { + { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, + { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, + { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, + { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, + { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, + { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, + { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, + { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, + { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, + { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, + { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, + { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, + { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, + { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, + { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, + { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, + { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, + { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, + { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, + { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, + { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, + { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, + { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, + { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mcp47feb02_i2c_id); + +static const struct of_device_id mcp47feb02_of_i2c_match[] =3D { + { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_i2c_match); + +static struct i2c_driver mcp47feb02_i2c_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_i2c_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_i2c_probe, + .id_table =3D mcp47feb02_i2c_id, +}; +module_i2c_driver(mcp47feb02_i2c_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); diff --git a/drivers/iio/dac/mcp47feb02.h b/drivers/iio/dac/mcp47feb02.h new file mode 100644 index 0000000000000000000000000000000000000000..5bcce1f9ae112c4fecc930f9927= 442eb93832f20 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __DRIVERS_IIO_DAC_MCP47FEB02_H__ +#define __DRIVERS_IIO_DAC_MCP47FEB02_H__ + +#include +#include + +extern const char * const mcp47feb02_powerdown_modes[]; + +#define MCP47FEB02_CHIP_INFO(_name, _channels, _res, _vref1, _eeprom) \ +static const struct mcp47feb02_features _name##_chip_features =3D { \ + .name =3D #_name, \ + .phys_channels =3D _channels, \ + .resolution =3D _res, \ + .have_ext_vref1 =3D _vref1, \ + .have_eeprom =3D _eeprom, \ +} + +/** + * struct mcp47feb02_features - chip specific data + * @name: device name + * @phys_channels: number of hardware channels + * @resolution: DAC resolution + * @have_ext_vref1: does the hardware have an the second external voltage = reference? + * @have_eeprom: does the hardware have an internal eeprom? + */ +struct mcp47feb02_features { + const char *name; + unsigned int phys_channels; + unsigned int resolution; + bool have_ext_vref1; + bool have_eeprom; +}; + +extern const struct regmap_config mcp47feb02_regmap_config; +extern const struct regmap_config mcp47fvb02_regmap_config; + +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap); + +extern const struct dev_pm_ops mcp47feb02_pm_ops; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-10-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=15556; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=acUL/CcC7KE1IDiRXLEfBcTJXBXILIApK2E6Dz8MP1c=; b=Qk2U++aa2ISnfMVxoZDuWP1bB/pFPrNrhMqg676lQ0l5fbGdLfSPnSdVtjFXtqFzyhgVoUPXF VbCUcIog2zAA/Kjaqt0FpY81nhipHDHLmZbVu2/nGseF7Fi6LMsH5pk X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Add the SPI MCP48FxBy1/2/4/8 part numbers, the spi-max-frequency property and a devicetree example for SPI usage to the existing binding. Signed-off-by: Ariana Lazar Reviewed-by: Rob Herring (Arm) --- .../bindings/iio/dac/microchip,mcp47feb02.yaml | 221 ++++++++++++++++-= ---- 1 file changed, 173 insertions(+), 48 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02= .yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml index d131f136bd15161666932261bcacd6d124b23ede..a86d094f0d4b54f9d9cc39fd542= 22f5968714668 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml @@ -4,58 +4,92 @@ $id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies +title: Microchip MCP4(7/8)F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C/SPI Interfa= ce Families =20 maintainers: - Ariana Lazar =20 description: | - Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12, - MCP47FEB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005375A.pdf - Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12, - MCP47FVB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005405A.pdf - Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18, - MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, - MCP47FVB28 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produc= tDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf - - +------------+--------------+-------------+-------------+------------+ - | Device | Resolution | Channels | Vref number | Memory | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM | - | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM | - | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM | - | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM | - | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB01 | 8-bit | 1 | 1 | RAM | - | MCP47FVB11 | 10-bit | 1 | 1 | RAM | - | MCP47FVB21 | 12-bit | 1 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB02 | 8-bit | 2 | 1 | RAM | - | MCP47FVB12 | 10-bit | 2 | 1 | RAM | - | MCP47FVB22 | 12-bit | 2 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB04 | 8-bit | 4 | 2 | RAM | - | MCP47FVB14 | 10-bit | 4 | 2 | RAM | - | MCP47FVB24 | 12-bit | 4 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB08 | 8-bit | 8 | 2 | RAM | - | MCP47FVB18 | 10-bit | 8 | 2 | RAM | - | MCP47FVB28 | 12-bit | 8 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM | - | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM | - | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | - | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | - | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | - +------------+--------------+-------------+-------------+------------+ + Datasheets for MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies: + Datasheet for MCP47FEB01, MCP47FEB02, MCP47FEB11, MCP47FEB12, MCP47FEB2= 1, + MCP47FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005375A.pdf + Datasheet for MCP47FVB01, MCP47FVB02, MCP47FVB11, MCP47FVB12, MCP47FVB2= 1, + MCP47FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005405A.pdf + Datasheet for MCP47FEB04, MCP47FEB08, MCP47FEB14, MCP47FEB18, MCP47FEB2= 4, + MCP47FEB28, MCP47FVB04, MCP47FVB08, MCP47FVB14, MCP47FVB18, MCP47FVB24, + MCP47FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + Datasheets for MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Fami= lies: + Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB2= 1, + MCP48FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005429B.pdf + Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB2= 1, + MCP48FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005466A.pdf + Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB1= 8, + MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18, + MCP48FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf + + +------------+--------------+-------------+-------------+------------+--= ----------+ + | Device | Resolution | Channels | Vref number | Memory | I= nterface | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB01 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB02 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB04 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB01 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB02 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB04 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB08 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB11 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB12 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB14 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB11 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB12 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB14 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB18 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB21 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB22 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB24 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB21 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB22 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB24 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB28 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB01 | | 1 | 1 | RAM | = I2C | + | MCP47FVB02 | | 2 | 1 | RAM | = I2C | + | MCP47FVB04 | | 4 | 2 | RAM | = I2C | + | MCP47FVB08 | 8-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB01 | | 1 | 1 | RAM | = SPI | + | MCP48FVB02 | | 2 | 1 | RAM | = SPI | + | MCP48FVB04 | | 4 | 2 | RAM | = SPI | + | MCP48FVB08 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB11 | | 1 | 1 | RAM | = I2C | + | MCP47FVB12 | | 2 | 1 | RAM | = I2C | + | MCP47FVB14 | | 4 | 2 | RAM | = I2C | + | MCP47FVB18 | 10-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB11 | | 1 | 1 | RAM | = SPI | + | MCP48FVB12 | | 2 | 1 | RAM | = SPI | + | MCP48FVB14 | | 4 | 2 | RAM | = SPI | + | MCP48FVB18 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB21 | | 1 | 1 | RAM | = I2C | + | MCP47FVB22 | | 2 | 1 | RAM | = I2C | + | MCP47FVB24 | | 4 | 2 | RAM | = I2C | + | MCP47FVB28 | 12-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB21 | | 1 | 1 | RAM | = SPI | + | MCP48FVB22 | | 2 | 1 | RAM | = SPI | + | MCP48FVB24 | | 4 | 2 | RAM | = SPI | + | MCP48FVB28 | | 8 | 2 | RAM | = SPI | + +------------+--------------+-------------+-------------+------------+--= ----------+ =20 properties: compatible: @@ -84,10 +118,37 @@ properties: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb01 + - microchip,mcp48feb02 + - microchip,mcp48feb04 + - microchip,mcp48feb08 + - microchip,mcp48feb11 + - microchip,mcp48feb12 + - microchip,mcp48feb14 + - microchip,mcp48feb18 + - microchip,mcp48feb21 + - microchip,mcp48feb22 + - microchip,mcp48feb24 + - microchip,mcp48feb28 + - microchip,mcp48fvb01 + - microchip,mcp48fvb02 + - microchip,mcp48fvb04 + - microchip,mcp48fvb08 + - microchip,mcp48fvb11 + - microchip,mcp48fvb12 + - microchip,mcp48fvb14 + - microchip,mcp48fvb18 + - microchip,mcp48fvb21 + - microchip,mcp48fvb22 + - microchip,mcp48fvb24 + - microchip,mcp48fvb28 =20 reg: maxItems: 1 =20 + spi-max-frequency: + maximum: 10000000 + "#address-cells": const: 1 =20 @@ -178,6 +239,21 @@ required: - vdd-supply =20 allOf: + - if: + properties: + compatible: + contains: + pattern: "^microchip,mcp48f[ev]b[0-2][1248]$" + then: + $ref: /schemas/spi/spi-peripheral-props.yaml# + dependencies: + spi-cpha: [ spi-cpol ] + spi-cpol: [ spi-cpha ] + else: + properties: + spi-max-frequency: false + spi-cpha: false + spi-cpol: false - if: properties: compatible: @@ -189,6 +265,12 @@ allOf: - microchip,mcp47fvb01 - microchip,mcp47fvb11 - microchip,mcp47fvb21 + - microchip,mcp48feb01 + - microchip,mcp48feb11 + - microchip,mcp48feb21 + - microchip,mcp48fvb01 + - microchip,mcp48fvb11 + - microchip,mcp48fvb21 then: properties: lat1-gpios: false @@ -211,6 +293,12 @@ allOf: - microchip,mcp47fvb02 - microchip,mcp47fvb12 - microchip,mcp47fvb22 + - microchip,mcp48feb02 + - microchip,mcp48feb12 + - microchip,mcp48feb22 + - microchip,mcp48fvb02 + - microchip,mcp48fvb12 + - microchip,mcp48fvb22 then: properties: lat1-gpios: false @@ -233,6 +321,12 @@ allOf: - microchip,mcp47feb04 - microchip,mcp47feb14 - microchip,mcp47feb24 + - microchip,mcp48feb04 + - microchip,mcp48feb14 + - microchip,mcp48feb24 + - microchip,mcp48fvb04 + - microchip,mcp48fvb14 + - microchip,mcp48fvb24 then: patternProperties: "^channel@[0-3]$": @@ -251,6 +345,12 @@ allOf: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb08 + - microchip,mcp48feb18 + - microchip,mcp48feb28 + - microchip,mcp48fvb08 + - microchip,mcp48fvb18 + - microchip,mcp48fvb28 then: patternProperties: "^channel@[0-7]$": @@ -272,7 +372,7 @@ allOf: properties: microchip,vref1-buffered: false =20 -additionalProperties: false +unevaluatedProperties: false =20 examples: - | @@ -299,4 +399,29 @@ examples: }; }; }; + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dac@0 { + compatible =3D "microchip,mcp48feb02"; + reg =3D <0x0>; + vdd-supply =3D <&vdac_vdd>; + vref-supply =3D <&vref_reg>; + spi-max-frequency =3D <10000000>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + channel@0 { + reg =3D <0>; + label =3D "Adjustable_voltage_ch0"; + }; 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(10.10.87.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.45; Fri, 18 Sep 2026 02:08:13 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Fri, 18 Sep 2026 02:08:10 -0700 From: Ariana Lazar Date: Fri, 18 Sep 2026 12:06:37 +0300 Subject: [PATCH v7 11/11] iio: dac: add support for Microchip MCP48FEB02 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260918-mcp47feb02_refactor-v7-11-82ca794eafe2@microchip.com> References: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> In-Reply-To: <20260918-mcp47feb02_refactor-v7-0-82ca794eafe2@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789722457; l=11356; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=fnwglVRd0N7CEdYDw2KT1aqYRa7VFSfsMYiSc27yegc=; b=+u2HQYWDFNgZazl1MclRusFl42TU6eaud0WfoISOE4aPp+OB3H5CvoXfy+IHgySXtsTf3ipRO llrArNA1cFfA5p4UpTsyEZWywJlFGl80iBYRymIqcJx0uHbTLuEdGNW X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= This is the IIO driver for Microchip MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog Converters with nonvolatile or volatile memory and an SPI Interface. The families support up to 8 output channels. The devices can be 8-bit, 10-bit and 12-bit. Signed-off-by: Ariana Lazar --- drivers/iio/dac/Kconfig | 23 ++++++ drivers/iio/dac/Makefile | 1 + drivers/iio/dac/mcp47feb02-core.c | 2 +- drivers/iio/dac/mcp47feb02-spi.c | 145 ++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 170 insertions(+), 1 deletion(-) diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index c99c32b229fb683d6407f30682f7ea6104984421..3e37db1f772a2ccf9c872d7e128= 766f342e13d6f 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -618,6 +618,29 @@ config MCP47FEB02_I2C will be called mcp47feb02_i2c and you will also get mcp47feb02_core for the core module. =20 +config MCP47FEB02_SPI + tristate "MCP48F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 SPI DAC driver" + depends on SPI + select REGMAP_SPI + select MCP47FEB02 + help + Say yes here if you want to build the driver for the Microchip: + - 8-bit DAC: + MCP48FEB01, MCP48FEB02, MCP48FEB04, MCP48FEB08, + MCP48FVB01, MCP48FVB02, MCP48FVB04, MCP48FVB08 + - 10-bit DAC: + MCP48FEB11, MCP48FEB12, MCP48FEB14, MCP48FEB18, + MCP48FVB11, MCP48FVB12, MCP48FVB14, MCP48FVB18 + - 12-bit DAC: + MCP48FEB21, MCP48FEB22, MCP48FEB24, MCP48FEB28, + MCP48FVB21, MCP48FVB22, MCP48FVB24, MCP48FVB28 + having 1 to 8 channels, 8/10/12-bit digital-to-analog converter + (DAC) with SPI interface. + + To compile this driver as a module, choose M here: the module + will be called mcp47feb02_spi and you will also get + mcp47feb02_core for the core module. + config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 6377a9c42d983f615a0aa4d36a0c3d3639c62951..b665ff638cdc6e6e8ee32521c9c= 12a9e3d192eef 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -58,6 +58,7 @@ obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47A1) +=3D mcp47a1.o obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o +obj-$(CONFIG_MCP47FEB02_SPI) +=3D mcp47feb02-spi.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02-core.c b/drivers/iio/dac/mcp47feb02= -core.c index 91fad42df2168f32b3de2757b4de7c1bb4b07b3a..d2b940abbd31be2019b04c35df3= 5dc67b5949a3a 100644 --- a/drivers/iio/dac/mcp47feb02-core.c +++ b/drivers/iio/dac/mcp47feb02-core.c @@ -977,5 +977,5 @@ int mcp47feb02_common_probe(const struct mcp47feb02_fea= tures *chip_features, EXPORT_SYMBOL_NS(mcp47feb02_common_probe, "IIO_MCP47FEB02"); =20 MODULE_AUTHOR("Ariana Lazar "); -MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); +MODULE_DESCRIPTION("IIO driver for MCP47FEB02/MCP48FEB02 Multi-Channel DAC= "); MODULE_LICENSE("GPL"); diff --git a/drivers/iio/dac/mcp47feb02-spi.c b/drivers/iio/dac/mcp47feb02-= spi.c new file mode 100644 index 0000000000000000000000000000000000000000..974f8fe1b86e939e99e6b2a7d3d= 05f025a73aa67 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-spi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP48FEB02 Multi-Channel DAC with SPI interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with SPI interface: + * [MCP48FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005429B.pdf + * [MCP48FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005466A.pdf + * [MCP48FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS200063= 62A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb28, 8, 12, true, false); + +static int mcp47feb02_spi_probe(struct spi_device *spi) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &spi->dev; + struct regmap *regmap; + + chip_features =3D spi_get_device_match_data(spi); + if (!chip_features) + return dev_err_probe(dev, -ENODATA, "No match data found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_spi(spi, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_spi(spi, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing SPI regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct spi_device_id mcp47feb02_spi_id[] =3D { + { .name =3D "mcp48feb01", .driver_data =3D (kernel_ulong_t)&mcp48feb01_ch= ip_features }, + { .name =3D "mcp48feb02", .driver_data =3D (kernel_ulong_t)&mcp48feb02_ch= ip_features }, + { .name =3D "mcp48feb04", .driver_data =3D (kernel_ulong_t)&mcp48feb04_ch= ip_features }, + { .name =3D "mcp48feb08", .driver_data =3D (kernel_ulong_t)&mcp48feb08_ch= ip_features }, + { .name =3D "mcp48feb11", .driver_data =3D (kernel_ulong_t)&mcp48feb11_ch= ip_features }, + { .name =3D "mcp48feb12", .driver_data =3D (kernel_ulong_t)&mcp48feb12_ch= ip_features }, + { .name =3D "mcp48feb14", .driver_data =3D (kernel_ulong_t)&mcp48feb14_ch= ip_features }, + { .name =3D "mcp48feb18", .driver_data =3D (kernel_ulong_t)&mcp48feb18_c= hip_features }, + { .name =3D "mcp48feb21", .driver_data =3D (kernel_ulong_t)&mcp48feb21_ch= ip_features }, + { .name =3D "mcp48feb22", .driver_data =3D (kernel_ulong_t)&mcp48feb22_ch= ip_features }, + { .name =3D "mcp48feb24", .driver_data =3D (kernel_ulong_t)&mcp48feb24_ch= ip_features }, + { .name =3D "mcp48feb28", .driver_data =3D (kernel_ulong_t)&mcp48feb28_ch= ip_features }, + { .name =3D "mcp48fvb01", .driver_data =3D (kernel_ulong_t)&mcp48fvb01_ch= ip_features }, + { .name =3D "mcp48fvb02", .driver_data =3D (kernel_ulong_t)&mcp48fvb02_ch= ip_features }, + { .name =3D "mcp48fvb04", .driver_data =3D (kernel_ulong_t)&mcp48fvb04_ch= ip_features }, + { .name =3D "mcp48fvb08", .driver_data =3D (kernel_ulong_t)&mcp48fvb08_ch= ip_features }, + { .name =3D "mcp48fvb11", .driver_data =3D (kernel_ulong_t)&mcp48fvb11_ch= ip_features }, + { .name =3D "mcp48fvb12", .driver_data =3D (kernel_ulong_t)&mcp48fvb12_ch= ip_features }, + { .name =3D "mcp48fvb14", .driver_data =3D (kernel_ulong_t)&mcp48fvb14_ch= ip_features }, + { .name =3D "mcp48fvb18", .driver_data =3D (kernel_ulong_t)&mcp48fvb18_ch= ip_features }, + { .name =3D "mcp48fvb21", .driver_data =3D (kernel_ulong_t)&mcp48fvb21_ch= ip_features }, + { .name =3D "mcp48fvb22", .driver_data =3D (kernel_ulong_t)&mcp48fvb22_ch= ip_features }, + { .name =3D "mcp48fvb24", .driver_data =3D (kernel_ulong_t)&mcp48fvb24_ch= ip_features }, + { .name =3D "mcp48fvb28", .driver_data =3D (kernel_ulong_t)&mcp48fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(spi, mcp47feb02_spi_id); + +static const struct of_device_id mcp47feb02_of_spi_match[] =3D { + { .compatible =3D "microchip,mcp48feb01", .data =3D &mcp48feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb02", .data =3D &mcp48feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb04", .data =3D &mcp48feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb08", .data =3D &mcp48feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb11", .data =3D &mcp48feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb12", .data =3D &mcp48feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb14", .data =3D &mcp48feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb18", .data =3D &mcp48feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb21", .data =3D &mcp48feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb22", .data =3D &mcp48feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb24", .data =3D &mcp48feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb28", .data =3D &mcp48feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb01", .data =3D &mcp48fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb02", .data =3D &mcp48fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb04", .data =3D &mcp48fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb08", .data =3D &mcp48fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb11", .data =3D &mcp48fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb12", .data =3D &mcp48fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb14", .data =3D &mcp48fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb18", .data =3D &mcp48fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb21", .data =3D &mcp48fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb22", .data =3D &mcp48fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb24", .data =3D &mcp48fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb28", .data =3D &mcp48fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_spi_match); + +static struct spi_driver mcp47feb02_spi_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_spi_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_spi_probe, + .id_table =3D mcp47feb02_spi_id, +}; +module_spi_driver(mcp47feb02_spi_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP48FEB02 Multi-Channel DAC with SPI i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); --=20 2.43.0