From nobody Fri Sep 25 06:04:08 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D0984483AF; Wed, 16 Sep 2026 08:09:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546189; cv=none; b=Sd4uofQXky8vrdqRgrQgBt351S5VNMGn/gDuMxS3hP+SF0dqP3TJeaxIBxcHgp3XEUQ+dhwytqwQXQ7q+bauaLD16LhyjVDQNuphZHTgNyUIR4Y+f8sZqD78PGHfEs8zNRZHATRpLz76G8Anr+p2llsq+2hmIEMqClwkdIcd2JI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546189; c=relaxed/simple; bh=Vy2kFGWf40LZZu/OrRKxOp27EqZPY3iYxkaZKLnSAbQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=e+objT0xXsDxBeudq2VVoNDDgHKN9BphEG0zXVAzmyJI2T8djDTqmkEYSiS2GtBBM1/hgQDEH71x80/If8irvOgXiIce6P8nFfDaEqX2UNabVjbfyDzIwbShHl3LUbZ5P3jG3Qycisw+ZJLMTSYX1Pu3X4wvmDskWu/hZoRT0J0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=jgvbVR1C; arc=none smtp.client-ip=185.70.43.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="jgvbVR1C" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546162; x=1789805362; bh=sNcmNScEhpmF/4cOJIi/n2ntDi0iE/3WYicZo1sq86I=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=jgvbVR1C2miDAi8+mWdOxhQ2VIBjqj7+WGoaYWQva0zQV3ZhySWAvo2rRIX0dX+wa xmGT8XEgXuNCfjQumFc3LxW0gVVXd/kbgz0B85ZvFIHbPx49CGbZIN2b85ftYUlGQd 4XD2zzCBc9VAzuRREEpviR1N60fOaswHvU9ZFuEOI0qeaKStdtc8n56SklJiXQE/Uf o+plmjr3iIvfWVQgdLh7vzTx4Usr23qJ+pPMoXbMjiCDpoCLDKd6+ecDnH8Y3v73/5 XSaApKUpc3auokq3IQJBWTZklzESDFHC6foP28e6SonnPyQdGgnxlKjap95en5pj8N hCsKlEuPuBMhA== X-Pm-Submission-Id: 4hlBPD2cLfz1DDKv From: Esben Haabendal Date: Wed, 16 Sep 2026 10:07:57 +0200 Subject: [PATCH v9 01/10] dt-bindings: iio: accel: mma8452: Add drive-open-drain Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-1-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=1037; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=Vy2kFGWf40LZZu/OrRKxOp27EqZPY3iYxkaZKLnSAbQ=; b=Xylm022efn23CkDn2cmNcTM9uttisqYkTx3O6Bgd6V5Sp9P71o/xLgVH9Zgfz9Xmp2y2CLNH6 1OuA7/VRvGyCPmcQz2QKxwRr9mZ4OXfe5N8ht2mv7VFfWxP+T9Isowa X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Add new boolean to configure selected interrupt pin to open drain instead of the default push-pull mode. Acked-by: Rob Herring (Arm) Signed-off-by: Esben Haabendal --- Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml b= /Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml index b0dd2b4e116a..20701aa725d0 100644 --- a/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml +++ b/Documentation/devicetree/bindings/iio/accel/fsl,mma8452.yaml @@ -39,6 +39,12 @@ properties: minItems: 1 maxItems: 2 =20 + drive-open-drain: + $ref: /schemas/types.yaml#/definitions/flag + description: the interrupt line will be configured as open drain, whic= h is + useful if several sensors share the same interrupt line. (This bindi= ng is + taken from pinctrl.) + vdd-supply: true vddio-supply: true =20 --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-43170.protonmail.ch (mail-43170.protonmail.ch [185.70.43.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 516CA4503F1; Wed, 16 Sep 2026 08:09:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546191; cv=none; b=ERCfqESv8ENA/J9f7evhPZBpMp95z1rIEeq0Av3klu8hDNreP0qcshDS+l48XP0G0YRhY+oo56VB3KN54kMcY/sGNnEHWih4vtU/ADgPv+coYQqYT/nfUswVr3W73EOHrUM/WaIa785sUDeyxJwJMaOH9EzH77mhAl94CXdCDRA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546191; c=relaxed/simple; bh=5aHhFmRHH7hXWezUncCFq6AliuOuzN9v+On7qJIecuQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=si2ukkPkURYaUxeWIbfO6eAC2mrlVIvlzFNwaQLMP2GXiZTVrBpCjV6wwcGm26Ls4fTRZH3eBXQf1LZw7s96wZWjr17eiq+OECOwtJtXjubPRQ102W/SD7vBEx5KJWP97jjenQifBYnorTguLEDKRmnhl2UzOeM33QayrztHmZ8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=mTe40gpC; arc=none smtp.client-ip=185.70.43.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="mTe40gpC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546164; x=1789805364; bh=zOE/xhizi9/jAXNjhr878qhJ9pvevPWCdRYDdJUXczg=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=mTe40gpCsFwjDlXKk1V4xGvJ6ezlsbvtBUGg1i0rD84HkSwTks3dfv8Bm8hI7PgpG rvzuQ+/WdRWelFkTM41vb3Z7kRPx3NGAlH56lafHkpX7CI+uBrhbOtrc684IPl4Ngu j0ynWDjwfTURQgBDmroIFdRRb+X3bkua/pidO/kxe1Zw8O2R1WIuYF8SIN4CYDFAUV I6gDDEzfOAxXUdNf/MvdWPx5xGAxjY29oOWIh8YzKRTbpcab2xfjo0JwROpa1nbMK5 xTeAp7d6DZeh6gzgGstkuBBeBShxz9G+lhBA8p2Ya/WW/B5SPqRZEAt+EIbDPW+aC+ CsDqwl4RyMZFA== X-Pm-Submission-Id: 4hlBPG2rcXz2ScPL From: Esben Haabendal Date: Wed, 16 Sep 2026 10:07:58 +0200 Subject: [PATCH v9 02/10] iio: accel: mma8452: Fix use-after-free bug in error error path Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-2-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Joshua Crofts X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=1204; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=5aHhFmRHH7hXWezUncCFq6AliuOuzN9v+On7qJIecuQ=; b=AnhOLZlnnsjC9TEsu4H44Gr+JFYy10C6rPUBbLciYyup55qtYEXW6A3S3zMbQ8kWayrSoEFQ/ fVwVunhD6TUD1/1wwWblD6QQUXkmJ41eBdS6hWMccvYMgm/fGxe+i87 X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= If mma8452_probe() fails in iio_device_register() or later, we could end up with runtime suspend callback being called with a now freed device pointer. Fixes: 96c0cb2bbfe0 ("iio: mma8452: add support for runtime power managemen= t") Cc: stable@vger.kernel.org Reviewed-by: Joshua Crofts Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index fe62a903f0e2..a937cbd84f30 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1681,7 +1681,7 @@ static int mma8452_probe(struct i2c_client *client) =20 ret =3D iio_device_register(indio_dev); if (ret < 0) - goto free_irq; + goto runtime_suspend; =20 ret =3D mma8452_set_freefall_mode(data, false); if (ret < 0) @@ -1692,6 +1692,10 @@ static int mma8452_probe(struct i2c_client *client) unregister_device: iio_device_unregister(indio_dev); =20 +runtime_suspend: + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); + free_irq: if (client->irq) free_irq(client->irq, indio_dev); --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-106113.protonmail.ch (mail-106113.protonmail.ch [79.135.106.113]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3EBC44A3EE; Wed, 16 Sep 2026 08:09:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.113 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546187; cv=none; b=FnHcCMGBck0nfONooqM3+XbrJy7jMsmbvfBaIxol6Tznhry1aWcmtTHXYrq17vSVszQkUtxIwx4dIhaicnoV2Oj/fJr6/102UPIKbWmHIW1Rd0oc1Q5rzDcfFH7bqb/pLwTO/lX7SxD5Fdbykf2E6lw+758Yt/amIn2FFFo80V4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546187; c=relaxed/simple; bh=7g4Bx6VcNobxJ0NKjiVjkZ2NfOoDHgnEhpsjeZEGI9Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ieD2S4uXifLXGScpE6GedkSlP90XDl08sajbcUYI1qd5ST31ghkDqcXwm/zUi4BZHpJRXOlYjt2yI/EW4JLx8Jxwx2zw9mlMgdmRAsnBLd0zK+2q1uIaMHyKnuBcls7gdDCLE/UoSGCxUQg0LIiP6vCfYBVtQJfrxvEXbHGtbfI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=WmVvQ/vA; arc=none smtp.client-ip=79.135.106.113 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="WmVvQ/vA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546167; x=1789805367; bh=KdnGPyMt+WNrC+sXSZeon9pFIAKeJSHes4isdLhm8wg=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=WmVvQ/vAFKIGgYgFaFzLL/zeSDtybfwg6us4vVK33nYMgpdc9ARj5MMmi3yGfDH/O 4a+7n5/O9jWvutBSXpUdeUtdbCF+Vjxf1WvLPz9mm8kb+UeRQXFNknn5sDuJ4fHozN YJi32bE6pBoAy1YU7CuXZd+I8leNl+NYnfyt9YbEKZTBkvFl57qi5nc7GgQXnNCgs4 yZlogwpisshoNLnxV0EAg9ktAgVKMR6+mm2/DwZ+A/pywA4P4lrz0gwnNaljKj83SK CXXf6Embn7JM+ShyajUt/v6t0C52iqLLRmfUVSSyznEtHJo61BDq/RB4nTcZfkirG5 RjPzyY9oDR5FQ== X-Pm-Submission-Id: 4hlBPJ53csz2ScPH From: Esben Haabendal Date: Wed, 16 Sep 2026 10:07:59 +0200 Subject: [PATCH v9 03/10] iio: accel: mma8452: Fix runtime PM bugs in mma8452_read() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-3-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=2127; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=7g4Bx6VcNobxJ0NKjiVjkZ2NfOoDHgnEhpsjeZEGI9Y=; b=Ju2uL8tn7OgC+R/Nfn5weZgamzhJrK5EWQ/i4i4Y+TUcEj5WmjfoYRvbJiMrRLAFiXjUX0ECW 3JJZ9qUruXjB5httPKCE5KovQ1PtEooEjuY5h9yd73h6ct6bvefhOrU X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= When runtime PM support was added [1], the implementation in mma8452_read() was done incorrectly, as it calls mma8452_drdy() before ensuring runtime pm has set the device active, so it can cause read from STATUS register while device is suspended/off. At the same time, the return value from i2c_smbus_read_i2c_block_data() was discarded, and the function would return the value returned from pm_runtime_put_autosuspend() instead. When the latter bug described above was fixed [2], another bug was introduced, as mma8452_read() would now leak the runtime PM reference counter when i2c_smbus_read_i2c_block_data() failed. This commit corrects this mess. [1] commit 96c0cb2bbfe0 ("iio: mma8452: add support for runtime power manag= ement") [2] commit 5bdff291d20c ("iio: accel: mma8452: handle I2C read error(s) in = mma8452_read()") Fixes: 96c0cb2bbfe0 ("iio: mma8452: add support for runtime power managemen= t") Cc: stable@vger.kernel.org Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index a937cbd84f30..a77c4b88b61d 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -242,21 +242,25 @@ static int mma8452_set_runtime_pm_state(struct i2c_cl= ient *client, bool on) =20 static int mma8452_read(struct mma8452_data *data, __be16 buf[3]) { - int ret =3D mma8452_drdy(data); - - if (ret < 0) - return ret; + int ret; =20 ret =3D mma8452_set_runtime_pm_state(data->client, true); if (ret) return ret; =20 + ret =3D mma8452_drdy(data); + if (ret < 0) + goto out_runtime_put; + ret =3D i2c_smbus_read_i2c_block_data(data->client, MMA8452_OUT_X, 3 * sizeof(__be16), (u8 *)buf); if (ret < 0) - return ret; + goto out_runtime_put; + + return mma8452_set_runtime_pm_state(data->client, false); =20 - ret =3D mma8452_set_runtime_pm_state(data->client, false); +out_runtime_put: + mma8452_set_runtime_pm_state(data->client, false); =20 return ret; } --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-106113.protonmail.ch (mail-106113.protonmail.ch [79.135.106.113]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6DB0F466AF5 for ; Wed, 16 Sep 2026 08:09:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.113 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546204; cv=none; b=LWqHhzye6KJQQFRasLBHyc4XH/i8qQhi7cFgI/l9K7EaYJWzp4nPKg0b14krhkQDas330WL/EC8X5YayrP2BJU/whA6tSJbhoa0xbOP0qfhwVTZnx5gc9Xe/cmwnJhaIyJgsGFhO9QRVWRWpGdgzd5uyCEezB+ZYWyIaAbvYEss= ARC-Message-Signature: i=1; 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a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546169; x=1789805369; bh=hvvSu4jQNAlUbHyw4OnEn6UGVnkOGTmR1TTHMd7EAHk=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=iKRJVMCgLTaG7NSEf8bOMJq2FzEkeQbV+JLSM/de/jY9dn9n3iyTnOpEpdT+QOtkW l1CXEhyxARA8LSAyGZ7ka4ztDy1eu8wZZP/N0bO6NoQ4/PXQgzpaszcoLc1CMzDp38 e7UwPTOAlHEKcdMG/Ma28Zn6zaamqJ25c9G8tfbwu0TNfk0NF8zC56RNsOlP99BzUM S/AHpxXP6NXpm4pvehnWcJFBDHGjA9b8/lDkgGMte5UFQVGOqfDRqiscpRaqQbWrqS B0yH3e9PKfq+wOLRlcqprz3aXjRtfJRWMZf1nntghNvU/WsNzuHWnOn+KaPWVK18Ug VHQUQbISOEyQA== X-Pm-Submission-Id: 4hlBPM1gX7z1DDrw From: Esben Haabendal Date: Wed, 16 Sep 2026 10:08:00 +0200 Subject: [PATCH v9 04/10] iio: accel: mma8452: Optimize struct mma8452_data member orders Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-4-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts , Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=1020; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=ZsRWQ2cy4/2MshimBga9KEvo5MqZ+GDpAPXPf+c/Lk0=; b=h9A/jONCw59QohxPmYqJ1iFujwRSIKP+1OMzziKWOZ8Je3CTZmSvDC1hznNXITT+2Sw+6d0MQ 07Selm0J5TeBYwN+meBXB0RVnmFBnWpRWp9LiynQ5TePd6zFNxsj8ZT X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Reorder struct mma8452_data members to avoid holes. Reviewed-by: Joshua Crofts Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index a77c4b88b61d..8d70fe89110c 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -108,10 +108,7 @@ struct mma8452_data { struct i2c_client *client; struct mutex lock; struct iio_mount_matrix orientation; - u8 ctrl_reg1; - u8 data_cfg; const struct mma_chip_info *chip_info; - int sleep_val; struct regulator_bulk_data regs[2]; =20 /* Ensure correct alignment of time stamp when present */ @@ -119,6 +116,10 @@ struct mma8452_data { __be16 channels[3]; aligned_s64 ts; } buffer; + + int sleep_val; + u8 ctrl_reg1; + u8 data_cfg; }; =20 /** --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-244108.protonmail.ch (mail-244108.protonmail.ch [109.224.244.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4165844C64B for ; Wed, 16 Sep 2026 08:09:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=109.224.244.108 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546187; cv=none; b=NhvYYTUHJDNQ1x0Q7qsJIsmXJCcNzC4oVxLqO3mYiPfvyeXJehceVOPqBrk3ZddnbjCnKwhEkVdMF0c3j/ad/43FXtXUrDl+czRi13LXB2tsE6pG92Zo1T8M4Pmoeio8GZMbq2tDj1akL44LYpr++xKgQPGzJzAH4PF8+rR9soE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546187; c=relaxed/simple; bh=uPZchZjn6UkglmRiByWIsLTuCMTQTNFVKTPStIfIxjQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Fmi9Ktjq817rW5BTPs/cSPf30G9aZawcmfmq3O7ffYkVV1BsU8TNB3EXFygs99F2fSjcE5M3gtk4vLiTEng2jbbs4k9kAWYjuXqn04FBHZsndzuELcOjU+xVknWNw18WyVmyPL/i4RgD0Eg88vl6acRETBQ5qwK6V+V1IUnovaI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=ELoWZVkI; arc=none smtp.client-ip=109.224.244.108 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="ELoWZVkI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546171; x=1789805371; bh=CkyR3JWxdNK53MZOpOdoX4HeDh3SJwW8Fzkq3YTz0p0=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=ELoWZVkIzpuoTd2ofHXS+rfCNoK+saUH+2Cg0XN3xpCQvu2T8vUz4t4p/oTdLVfdv C8OMXWNny2enT/PX+0XjGMyb2z7p9xdrbOVYqnDaoaMd0S6+sR7PmAl7O3TublRxDL zssYDQXhCyaxRNPKaX8jsMQ5PlHIoWNgtVbxIULABObKFr4pe3K5SAtjvFn0FJl9iK 1/pAO6qaPdxX76+sxWS+xKdPJd8NyyWEatK21cOIzBq6v/iTaPC/6WBias1iu8NI5b JxYP2PqKDcBN1sIwEluDKOb9lUJoac8Md+ICavTYY1g/RBu9AiWmhHB1m+ZbZAgzLP eRVFcS4ZoAgpw== X-Pm-Submission-Id: 4hlBPP2JGkz2ScXW From: Esben Haabendal Date: Wed, 16 Sep 2026 10:08:01 +0200 Subject: [PATCH v9 05/10] iio: accel: mma8452: Only apply trigger type when not set by firmware Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-5-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=1389; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=uPZchZjn6UkglmRiByWIsLTuCMTQTNFVKTPStIfIxjQ=; b=4tlXrY8S4zzMqasjflbJgwYenTe78Qa4kR8UrFELcISGe5eS4BTxm44kq3sAfYPYFuOTXd749 coSoK/+R8XSCjsiZ1Fa47YwD+9DXchaq6M0mkPMo1xm1LpBwsmOa0t4 X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Instead of unconditionally overriding the trigger type, it is better to only apply a default when no trigger type is set by firmware. This should be reasonably backward compatible, and should only potentially cause problems if systems exist where firmware specifies an incorrect trigger type. With a bit of luck, there are no such systems. Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 8d70fe89110c..72b4ab32775a 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1669,9 +1669,16 @@ static int mma8452_probe(struct i2c_client *client) goto trigger_cleanup; =20 if (client->irq) { + unsigned long irq_flags; + + irq_flags =3D irq_get_trigger_type(client->irq); + if (irq_flags =3D=3D IRQ_TYPE_NONE) { + dev_info(dev, "invalid irq type, setting default active low\n"); + irq_flags =3D IRQF_TRIGGER_LOW; + } + irq_flags |=3D IRQF_ONESHOT; ret =3D request_threaded_irq(client->irq, NULL, mma8452_interrupt, - IRQF_TRIGGER_LOW | IRQF_ONESHOT, - client->name, indio_dev); + irq_flags, client->name, indio_dev); if (ret) goto buffer_cleanup; } --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3866449B3D; Wed, 16 Sep 2026 08:09:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546189; cv=none; b=hZNREk019Lc7YRoToMWacYeZNzOaCxSm76kkJGXKP7LT2WX/6zP5IW/cw1HGZQ4MV0xVFPbJLU4pyx6aED35IjJDi+SMwZVHFqjaEEAXtlS1rqyu58Au7gFGAOpUTqY7F0gy6KZdNttqg34wsqFQ3oVouHkSHOW7RtQax16kQok= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546189; c=relaxed/simple; bh=K1jPbnIpn2vPrtvqzcNi7Vjb6hG0x04g8LVYMsnM6gY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=cqBhN2zuKX4yky3r9T9djVR0ZMZNU1R/qVZOuAzjIqY6Jbqs0Qff+d+82Ik7FKyf8RKTpYDdCcoBypXU7YkJw86fpFJx2HJ5eECKk/8Mu/t3ypbkJlVnlUcNkbPMfGhOssH6zJK9DheDHkeZpXH1Q7smZghwKVDRu8aNiTunQEA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=ZZQ53PU3; arc=none smtp.client-ip=185.70.43.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="ZZQ53PU3" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546172; x=1789805372; bh=QCIfMsx6KjKXpnoxBI1XGkxGk4Y7Sik+nYV7bSHmLbY=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=ZZQ53PU3kiySaayOLmyA8tfwYe5hQjIggQD1A8wYKzkd3PpD6YrA1kBaLeVRvFbui lgaAXTC3LhAC+OYuRumC1xUjArgOSAhOL3UYR9d7DRCfSv2o+SAHpfl8tRsWf5TbZl kRP0mvdT2pca1dl3YQcNVFCs3qRJa4FBsKwtEO2qFaDxkQkzDQljrD/6vD1yMh/zM/ 3Av3gBQDFFIzYDxa9c+2SCk5z7zn9mt+khKRG5S3yBIhzuMgLMQ58zoK43VkOMcXsa TGctV/6x0K2Mb+HXPc9yvqKUN60lz+pm0yfOpwkwrMQMsM369w1HCYCojRPeT/iSGK Fnnb3DBAObH2w== X-Pm-Submission-Id: 4hlBPQ5mGsz2ScPS From: Esben Haabendal Date: Wed, 16 Sep 2026 10:08:02 +0200 Subject: [PATCH v9 06/10] iio: accel: mma8452: Fix unintended comment indent Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-6-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=2166; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=K1jPbnIpn2vPrtvqzcNi7Vjb6hG0x04g8LVYMsnM6gY=; b=bmWELgMFJN5IP12tltf9Vblc4o5YDdxcqFoCmHGAV2ms0pCK9zHvrcW+vQOqLv5FmhWxhc0IY ZT92Utb2lw1AAa8uJ2TEWrelv8+p9UvxZuEgWYT+gEQ3u8tWoeHC0p7 X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= The extra space this block was indented with looks quite untraditional, and does not align with the common style used in the kernel. Reviewed-by: Joshua Crofts Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 72b4ab32775a..b70bc8638128 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -122,21 +122,21 @@ struct mma8452_data { u8 data_cfg; }; =20 - /** - * struct mma8452_event_regs - chip specific data related to events - * @ev_cfg: event config register address - * @ev_cfg_ele: latch bit in event config register - * @ev_cfg_chan_shift: number of the bit to enable events in X - * direction; in event config register - * @ev_src: event source register address - * @ev_ths: event threshold register address - * @ev_ths_mask: mask for the threshold value - * @ev_count: event count (period) register address - * - * Since not all chips supported by the driver support comparing high pass - * filtered data for events (interrupts), different interrupt sources are - * used for different chips and the relevant registers are included here. - */ +/** + * struct mma8452_event_regs - chip specific data related to events + * @ev_cfg: event config register address + * @ev_cfg_ele: latch bit in event config register + * @ev_cfg_chan_shift: number of the bit to enable events in X + * direction; in event config register + * @ev_src: event source register address + * @ev_ths: event threshold register address + * @ev_ths_mask: mask for the threshold value + * @ev_count: event count (period) register address + * + * Since not all chips supported by the driver support comparing high pass + * filtered data for events (interrupts), different interrupt sources are + * used for different chips and the relevant registers are included here. + */ struct mma8452_event_regs { u8 ev_cfg; u8 ev_cfg_ele; --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A0833A3830 for ; Wed, 16 Sep 2026 08:09:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-7-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=1365; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=afe1n+Wf/XPJVThN6jURieB4LpbuLHGELAAR7V1RVb0=; b=ZCTkhNTdnAvjzqMdj+xvLEQyb5025RxvLGkWY5KHni7E4RxvW2dNhrMQMluxO3DGHCI6R2szt c5Uk3XYnGz0CFWdY7rodBM8Uf3FKpdb5YJ1B1wl4K6IFWWNgRpKf/1v X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= The struct mma8452_data is central for this driver, and it makes sense to have a description of the fields in it to make it easier to work with the driver. Reviewed-by: Joshua Crofts Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index b70bc8638128..223bef4f7baf 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -104,6 +104,21 @@ =20 #define MMA8452_AUTO_SUSPEND_DELAY_MS 2000 =20 +/** + * struct mma8452_data - IIO device private data structure + * @client: the I2C client object + * @lock: mutex for synchronziation of register + * read-modify-write sequences and holding chip in + * STANDBY mode while writing to registers + * @orientation: mounting matrix, flipped axis etc. + * @chip_info: chip specific data + * @regs: reference to voltage regulators + * @buffer: triggered buffer + * @sleep_val: time in ms to sleep while waiting for drdy + * @ctrl_reg1: CTRL_REG1 register shadow value + * @data_cfg: DATA_CFG register shadow value + * @open_drain: true for irq pin in open-drain mode + */ struct mma8452_data { struct i2c_client *client; struct mutex lock; --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-43170.protonmail.ch (mail-43170.protonmail.ch [185.70.43.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 942C2445ACD; Wed, 16 Sep 2026 08:09:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.70.43.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546210; cv=none; b=akMXJOakMgbDFMaMIg04BRu4kc1Iq7sBV+NTaHVjhx5fKlFowXxB+q34sq6AvhUDnJPKK30sjxu728QK43PJzZ5Qe6BAlCY39MjdDb0lq47Lh0Nt2AjfbLoJJj8eFjoXHzi7HEBbg+sVEtuRyQEDcPyUchME3y5uZsom/MGyE4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546210; c=relaxed/simple; bh=sQZ2tGpTauHPI+0PLoJCQ+hcRZAFe66nXYgu/3AYc4A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CYlCevkFB1OIUTlL4fxBwfOE2Z+OUhintZVSNgg2evWuFw31Oog+KS918wEmmKlMGnSL1cWWsIdARR+GNbMIN2k/dCKbC3zikUjiQVRv5uMXXMjGTti0qVnINVS6gBiKSuckGie/HQOWirP1VxNIoJSpboYURLrv29rL1NXoxmI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=M5JiKLIw; arc=none smtp.client-ip=185.70.43.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="M5JiKLIw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546176; x=1789805376; bh=j6FuajukEYwiuxHrwNHtWrAIldVALc6XiykYytHuv+Q=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=M5JiKLIwtOgDpYND8rP7FpgPq/OoRe2DFfoW2LhW4Xtes1G4K8SAQyNwmGogTfpLO tzeqartJt6LEdSH+dQIPmbyhmny66MS4RexmylWxgZRwp/BroVOyD6s/TYkM1IePVL aHVF1Ugobl+0RXv/68zTWDMHNWc2JHjg6REx+o/PNLCQJjtNe6iClR1fwjnFF/wM+4 dSsW/bwKgv+TpcVTtyiJts+63dV5t0xH37sJ2CplUiumOEK3xWaPo0pd8xyuCBLtO8 S7A2rbPfp/+6XJsFkhyX/PDixHbCRROgYsN+LKTgesa5Sd9KomM/3KTZbuHGAiDP/3 7rwPvMP+cdmFQ== X-Pm-Submission-Id: 4hlBPV6nhXz1DDX8 From: Esben Haabendal Date: Wed, 16 Sep 2026 10:08:04 +0200 Subject: [PATCH v9 08/10] iio: accel: mma8452: Allow open drain interrupt pin configuration Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-8-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=2386; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=sQZ2tGpTauHPI+0PLoJCQ+hcRZAFe66nXYgu/3AYc4A=; b=jRbTUd9M2+qtV61Y3AnomOn1NGcys2d6lCyppW7SkuoGIfWnUlUZw8M8aoOLOK1l/6n2UCPwW 3kUGsDHq5U7Caot0LeVN8+aRt3f7E3QQVRmKduNVKMMEHF4K3hsAFmk X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= When designing systems sharing the interrupt for mma8452 chips, it is helpful to be able to configure the irq pin in open-drain mode (default is push-pull). Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 223bef4f7baf..5d44f0066b1e 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -83,6 +83,8 @@ #define MMA8452_CTRL_REG2_RST BIT(6) #define MMA8452_CTRL_REG2_MODS_SHIFT 3 #define MMA8452_CTRL_REG2_MODS_MASK 0x1b +#define MMA8452_CTRL_REG3 0x2c +#define MMA8452_CTRL_REG3_PP_OD BIT(0) #define MMA8452_CTRL_REG4 0x2d #define MMA8452_CTRL_REG5 0x2e #define MMA8452_OFF_X 0x2f @@ -135,6 +137,7 @@ struct mma8452_data { int sleep_val; u8 ctrl_reg1; u8 data_cfg; + bool open_drain; }; =20 /** @@ -662,6 +665,22 @@ static int mma8452_set_power_mode(struct mma8452_data = *data, u8 mode) return mma8452_change_config(data, MMA8452_CTRL_REG2, reg); } =20 +static int mma8452_set_interrupt_pin_mode(struct mma8452_data *data) +{ + int reg; + + reg =3D i2c_smbus_read_byte_data(data->client, MMA8452_CTRL_REG3); + if (reg < 0) + return reg; + + if (data->open_drain) + reg |=3D MMA8452_CTRL_REG3_PP_OD; + else + reg &=3D ~MMA8452_CTRL_REG3_PP_OD; + + return i2c_smbus_write_byte_data(data->client, MMA8452_CTRL_REG3, reg); +} + /* returns >0 if in freefall mode, 0 if not or <0 if an error occurred */ static int mma8452_freefall_mode_enabled(struct mma8452_data *data) { @@ -1668,6 +1687,11 @@ static int mma8452_probe(struct i2c_client *client) goto disable_regulators; } =20 + data->open_drain =3D device_property_read_bool(dev, "drive-open-drain"); + ret =3D mma8452_set_interrupt_pin_mode(data); + if (ret) + goto trigger_cleanup; + data->ctrl_reg1 =3D MMA8452_CTRL_ACTIVE | (MMA8452_CTRL_DR_DEFAULT << MMA8452_CTRL_DR_SHIFT); =20 @@ -1795,6 +1819,10 @@ static int mma8452_runtime_resume(struct device *dev) return ret; } =20 + ret =3D mma8452_set_interrupt_pin_mode(data); + if (ret) + goto runtime_resume_failed; + ret =3D mma8452_active(data); if (ret < 0) goto runtime_resume_failed; --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-43172.protonmail.ch (mail-43172.protonmail.ch [185.70.43.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D4FA45FFA5; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-9-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Joshua Crofts , Andy Shevchenko X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=915; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=UUIyipSh2UKdcm74j22sAz/1TGUuH6UZ/bs/me2KcbE=; b=9Riz1gDWwFndqbCpuFtrXtnfxYq7x/6bSbwOenD1GUcecvMMnYfPuCSyLEyB8swogmi2eBbIF TbRro8cySjNDwMQdjIN87OrHEbkl8r6qjuUEIpHUZ8Uth7wHKC3t4KR X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Switch -ENODEV error on i2c_get_match_data() failure to -ENODATA to satisfy the IIO coding style. Reviewed-by: Joshua Crofts Reviewed-by: Andy Shevchenko Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 5d44f0066b1e..5aea6bf3312a 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1594,7 +1594,7 @@ static int mma8452_probe(struct i2c_client *client) =20 data->chip_info =3D i2c_get_match_data(client); if (!data->chip_info) - return dev_err_probe(dev, -ENODEV, "unknown device model\n"); + return dev_err_probe(dev, -ENODATA, "unknown device model\n"); =20 ret =3D iio_read_mount_matrix(dev, &data->orientation); if (ret) --=20 2.55.0 From nobody Fri Sep 25 06:04:08 2026 Received: from mail-106113.protonmail.ch (mail-106113.protonmail.ch [79.135.106.113]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D7A845FFC8 for ; Wed, 16 Sep 2026 08:09:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=79.135.106.113 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546200; cv=none; b=BnxEYTlQ2g8f2tWxuCGTw9pAwqbZM4HG5HXgzYXKeRSS9cBS/updky7tH5L2k489kKq9ypQXeBR1NG2iBiNClSNR0/auo3/Hlcrhd7XNFzsZK18B/rv0+LAo9l2ABrM7Qh4V5NNTSiqwvLZhqYBvVQwezgRXKSHhlP6jVEvxXyM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789546200; c=relaxed/simple; bh=ZcCdFWbXCbKw6AZzkVLcVloq2ZkXVfXAm4HV8iYLbLc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=H44QRJEscX3CzUHJr42rWLvWvDzhQ7Eq1Q/+Dr4MbnAwM2jTBrqwxc6sMDwJL0qzR3sM6UQ4pF/fTzueFYGbjjRfECfMgrsn8c40NxuEgrQyk3WsoFRo2IkWFJtTClvwxqA5KIu+j7byQ1oEf23hbeSnESen9pvCWWLkueAxPIc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com; spf=pass smtp.mailfrom=geanix.com; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b=T+AwX3hb; arc=none smtp.client-ip=79.135.106.113 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=geanix.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=geanix.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=geanix.com header.i=@geanix.com header.b="T+AwX3hb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=geanix.com; s=protonmail; t=1789546180; x=1789805380; bh=7TJ+lgh8yPqjjUsPbUWBcJTEXOUZviYqc0R0KmfRtvk=; h=From:Date:Subject:Message-Id:References:In-Reply-To:To:Cc:From:To: Cc:Date:Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=T+AwX3hbkDx3cJDN5rb7UiBYSqmx2sFq5wVQWjIWxpvhmEInLWLI6+X/O93yfsb8U fDLa2m2rHEXIzNJRL+UgPgM1Fu94ILBQZdGnPAZ9iPkxk7UoXhYO65Plda0jxp/pOP JyUKt1Ub9arRNtlEwqjzbQeQoIk4HF0TeeP02JEsIW76CnxfF+YWqXMrnjT39rCO9n ZQ3RsFXJsT5gLyDSGqj5bFwTaRrSQA49a6pPZQ4seqfrT2NgBkC7iNVNVbbeZUT+Qs Chl5lLdn8aVxhY59+02oYYKy5PlBrmguZ+SheDchzsd/t5jFPFo6U89QuwyK8AcJDu wmCJI4rHJMnJA== X-Pm-Submission-Id: 4hlBPZ5FvVz1DFG0 From: Esben Haabendal Date: Wed, 16 Sep 2026 10:08:06 +0200 Subject: [PATCH v9 10/10] iio: accel: mma8452: Support interrupt sharing Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260916-mma8452-open-drain-v9-10-0dd24fa2f3d7@geanix.com> References: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> In-Reply-To: <20260916-mma8452-open-drain-v9-0-0dd24fa2f3d7@geanix.com> To: Jonathan Cameron , Lars-Peter Clausen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin Kepplinger , Sean Nyekjaer , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Martin Kepplinger , Christoph Muellner Cc: Esben Haabendal , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789546157; l=6538; i=esben@geanix.com; s=20240523; h=from:subject:message-id; bh=ZcCdFWbXCbKw6AZzkVLcVloq2ZkXVfXAm4HV8iYLbLc=; b=w+r9MLQODxMmddzYGUSuopJ1PU/C1DL+j0u332m6srH0PoFwPWz2IpIDeUoeq2se8zBPPWBPi 3F4SeWBlAXAAbpTxhoJN5nP+eeLaRQhdM8yo2a15pITXrSoRYPhMf0H X-Developer-Key: i=esben@geanix.com; a=ed25519; pk=PbXoezm+CERhtgVeF/QAgXtEzSkDIahcWfC7RIXNdEk= Adding support for sharing interrupt line with other device requires the interrupt handler to handle runtime PM suspension properly, ignoring the irq if the device is suspended (maybe even off). And while at it, we use the PM reference to ensure we do not get suspended while processing an irq. In order to prevent the chip from raising irq while suspended (that is when using fixed regulator, where suspend just means setting the device in STANDBY mode), we disable all interrupt sources by clearing CTRL_REG4, and then restores the value again when resuming. The scoped_guard in mma8452_runtime_suspend() is changed to a plain mutex_lock() instead, both to prevent mixing guards and goto, but also to ensure that we stay in STANDBY mode while writing to CTRL_REG4 and all the way up to disabling the device as much as possible. With that in place, it is safe to add the IRQF_SHARED flag. Keep in mind that the device by default is using push-pull for the irq pin, which might require additional hardware design to allow interrupt sharing. Signed-off-by: Esben Haabendal --- drivers/iio/accel/mma8452.c | 88 ++++++++++++++++++++++++++++++++++++++---= ---- 1 file changed, 75 insertions(+), 13 deletions(-) diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index 5aea6bf3312a..2a980c0c2e03 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -119,6 +119,7 @@ * @sleep_val: time in ms to sleep while waiting for drdy * @ctrl_reg1: CTRL_REG1 register shadow value * @data_cfg: DATA_CFG register shadow value + * @ctrl_reg4: CTRL_REG4 register value to restore on resume * @open_drain: true for irq pin in open-drain mode */ struct mma8452_data { @@ -137,6 +138,7 @@ struct mma8452_data { int sleep_val; u8 ctrl_reg1; u8 data_cfg; + u8 ctrl_reg4; bool open_drain; }; =20 @@ -1086,15 +1088,28 @@ static irqreturn_t mma8452_interrupt(int irq, void = *p) { struct iio_dev *indio_dev =3D p; struct mma8452_data *data =3D iio_priv(indio_dev); + struct device *dev =3D &data->client->dev; irqreturn_t ret =3D IRQ_NONE; + int pm_status; int src; =20 + pm_status =3D pm_runtime_get_if_active(dev); + if (pm_status =3D=3D 0) + return IRQ_NONE; /* device is powered down */ + + /* + * pm_status is now 1 or -EINVAL. If pm_status=3D=3D1, runtime PM is enab= led + * and device is RPM_ACTIVE. If pm_status=3D=3D-EINVAL, runtime PM is + * disabled (e.g. CONFIG_PM not enabled), and we can/must assume device + * is active. + */ + src =3D i2c_smbus_read_byte_data(data->client, MMA8452_INT_SRC); if (src < 0) - return IRQ_NONE; + goto out_runtime_put; =20 if (!(src & (data->chip_info->enabled_events | MMA8452_INT_DRDY))) - return IRQ_NONE; + goto out_runtime_put; =20 if (src & MMA8452_INT_DRDY) { iio_trigger_poll_nested(indio_dev->trig); @@ -1120,6 +1135,10 @@ static irqreturn_t mma8452_interrupt(int irq, void *= p) ret =3D IRQ_HANDLED; } =20 +out_runtime_put: + if (pm_status > 0) + pm_runtime_put_autosuspend(dev); + return ret; } =20 @@ -1715,7 +1734,7 @@ static int mma8452_probe(struct i2c_client *client) dev_info(dev, "invalid irq type, setting default active low\n"); irq_flags =3D IRQF_TRIGGER_LOW; } - irq_flags |=3D IRQF_ONESHOT; + irq_flags |=3D IRQF_ONESHOT | IRQF_SHARED; ret =3D request_threaded_irq(client->irq, NULL, mma8452_interrupt, irq_flags, client->name, indio_dev); if (ret) @@ -1771,11 +1790,12 @@ static void mma8452_remove(struct i2c_client *clien= t) =20 iio_device_unregister(indio_dev); =20 - pm_runtime_disable(dev); - pm_runtime_set_suspended(dev); - if (client->irq) free_irq(client->irq, indio_dev); + /* No irq will fire beyond this point */ + + pm_runtime_disable(dev); + pm_runtime_set_suspended(dev); =20 iio_triggered_buffer_cleanup(indio_dev); mma8452_trigger_cleanup(indio_dev); @@ -1787,29 +1807,67 @@ static void mma8452_remove(struct i2c_client *clien= t) #ifdef CONFIG_PM static int mma8452_runtime_suspend(struct device *dev) { - struct iio_dev *indio_dev =3D i2c_get_clientdata(to_i2c_client(dev)); + struct i2c_client *client =3D to_i2c_client(dev); + struct iio_dev *indio_dev =3D i2c_get_clientdata(client); struct mma8452_data *data =3D iio_priv(indio_dev); int ret; =20 - scoped_guard(mutex, &data->lock) - ret =3D mma8452_standby(data); + mutex_lock(&data->lock); + + ret =3D mma8452_standby(data); if (ret < 0) { - dev_err(dev, "powering off device failed\n"); - return -EAGAIN; + dev_err(dev, "transition to STANDBY mode failed\n"); + ret =3D -EAGAIN; + goto out_unlock; } =20 + ret =3D i2c_smbus_read_byte_data(client, MMA8452_CTRL_REG4); + if (ret < 0) { + dev_warn(dev, "backing up CTRL_REG4 failed\n"); + ret =3D -EAGAIN; + goto out_active; + } else + data->ctrl_reg4 =3D ret; + + ret =3D i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG4, 0); + if (ret) { + dev_warn(dev, "disabling interrupt sources (CTRL_REG4) failed\n"); + ret =3D -EAGAIN; + goto out_active; + } + + /* + * Interrupt line should be deasserted now, so we just need ensure any + * mid-flight irq is completed (will return IRQ_NONE due to + * pm_status=3D=3D0). + */ + if (client->irq) + synchronize_irq(client->irq); + ret =3D regulator_bulk_disable(ARRAY_SIZE(data->regs), data->regs); if (ret) { dev_err(dev, "failed to disable regulators\n"); - return ret; + goto out_restore_ctrl_reg4; } =20 + mutex_unlock(&data->lock); return 0; + +out_restore_ctrl_reg4: + if (i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG4, data->ctrl_reg4)) + dev_warn(dev, "restoring CTRL_REG4 failed\n"); +out_active: + if (mma8452_active(data)) + dev_warn(dev, "failed to switch back to ACTIVE mode\n"); +out_unlock: + mutex_unlock(&data->lock); + return ret; } =20 static int mma8452_runtime_resume(struct device *dev) { - struct iio_dev *indio_dev =3D i2c_get_clientdata(to_i2c_client(dev)); + struct i2c_client *client =3D to_i2c_client(dev); + struct iio_dev *indio_dev =3D i2c_get_clientdata(client); struct mma8452_data *data =3D iio_priv(indio_dev); int ret, sleep_val; =20 @@ -1823,6 +1881,10 @@ static int mma8452_runtime_resume(struct device *dev) if (ret) goto runtime_resume_failed; =20 + ret =3D i2c_smbus_write_byte_data(client, MMA8452_CTRL_REG4, data->ctrl_r= eg4); + if (ret) + goto runtime_resume_failed; + ret =3D mma8452_active(data); if (ret < 0) goto runtime_resume_failed; --=20 2.55.0