From nobody Fri Sep 25 05:30:00 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7BFB50EBF0; Wed, 16 Sep 2026 14:19:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789568379; cv=none; b=VqMWupF7y4cwSDP4LvZBhy4RLJ1J44y9JTOZGKoOWChR9RBtEckp7N8gUNsUXbwC4d5lrNhJuZTbFR1ri2XrdpQx/wLTOR0/Hh7B1+6mP/h6NaxlMHHHYbstnAe+QGQkDZYe6sLjgk7ha6m5upGBFTTpVUS7d1S4SLrUisbiT1M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789568379; c=relaxed/simple; bh=RPWR+utL1wFVxZQuhh5GixCRURCkFv4ScEemilc8jQ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=EB58PEKSw7TnKbo3x/p1Z1k8cTs9CjneWL3b/wZ9FVTQol2t7yMoFSNzgqsiABHETXfSw1NUMn0rPI4eDseLxHSCZnU03qwiXMm+JksrpnJydmF11Ua3KMS2e3VEBqFhRTy7AZBAve5cNOiPu17s99g5y2/XggzVtSV4hd2TlgM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=jvmvMmxa; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="jvmvMmxa" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1789568378; x=1821104378; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=RPWR+utL1wFVxZQuhh5GixCRURCkFv4ScEemilc8jQ8=; b=jvmvMmxaOfVIxfilJBaK/RlNVaCcTJ5whg0d09pEr6ucZsjMVMHNKL1u CAvMGXukM87hc4C44TvgVNTZYDZuX+bZH+j21sTPJ/SgjidSikKI0R1rW GvxXT+lBQcj4u8/xJsegMGGBlxqar30RtX1YTiAEPUl7f8kZZ8nd3ccZh HZNdT/QwY7Du8Fu0/peR0PjFct3XVXkx3FQLVmMocdW0+egZ/ZrwYDyx2 FnlMTRzu9XxV9P+OvIoCPQU2OQZ6gPR6X2M5UhXH1uuleN0qubUwuRYiw Ty8tK9uS0ey4rV/W8gMaQ/tP4lU3e8t2e4/rqD/A9yticOb1I8Bm2LlQg g==; X-CSE-ConnectionGUID: CGbd2ULzTIqzfFz4HxHHzg== X-CSE-MsgGUID: 9exf0U3KTw2GNJ2Uczr8xw== X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="64005049" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 16 Sep 2026 07:19:19 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 16 Sep 2026 07:19:01 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 16 Sep 2026 07:18:58 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:27 +0300 Subject: [PATCH v6 01/11] iio: dac: mcp47feb02: initialize dac_data field in channel data struct at probe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-1-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=1454; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=RPWR+utL1wFVxZQuhh5GixCRURCkFv4ScEemilc8jQ8=; b=Exlwv595arh3SX4kDlI5m2qfHMOo1eVwKK0mw+KX492bVaBXkRkUwjlzL8LPxFO3vqnq42mlC T9qWZzlZJQhD7jdKRzA5tzfbnNs+MCM9Iucd13Lmp6ZrLXs/ilWI3CR X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Prevent operations which use cache from overwriting default hardware values with zeros by reading active DAC registers during probe to correctly initialize the channel struct DAC values. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Link: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel.o= rg/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 8640b0ef4433da2b40d4b7e53fe6109737314951..6a3875e1d6a2c0cdd1464103581= 30c44b1360f56 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1019,7 +1019,12 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb= 02_data *data) gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); - unsigned int pd_tmp; + unsigned int pd_tmp, dac_val; + + ret =3D regmap_read(data->regmap, REG_ADDR(i), &dac_val); + if (ret) + return ret; + data->chdata[i].dac_data =3D dac_val; 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Wed, 16 Sep 2026 07:19:04 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 16 Sep 2026 07:19:01 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:28 +0300 Subject: [PATCH v6 02/11] iio: dac: mcp47feb02: Fix gain field initialization for active channels Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-2-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=1952; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=VOZY+QFz4ZsjIpUzis+4ZEZT0aWP9ydqzPyw7njG/3U=; b=ENkUIWDHksVxKd4JSg6T2JwHOjkX8GVDpOpQLnPd1hmLf+OqlEU80IDP+Ox9jPX0F9KTdRMhi e96wkDg29emCVEwjLOlMTy4mESq4vmrL7ikqQSgBdkDF7FV+ZaGq26T X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= As per MCP47FXBX48 Datasheet, in the format of the Gain Control and System Status Register each DAC channel has one bit to control its gain, starting at bit 8, while bits 0-7 contain status or unimplemented bits. The previous formula didn't initialize correctly all channels, being replaced by using field_get() with the already defined macro used in write operations where needed in the rest of the driver implementation. DAC_GAIN_MASK(i) extracts the gain control bit for each active channel correctly in one step. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Link: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel.o= rg/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 6a3875e1d6a2c0cdd146410358130c44b1360f56..fa4bd1df954844da35a84967584= 89189aeceb60d 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1016,7 +1016,6 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) if (ret) return ret; =20 - gain_ch =3D gain_ch & MCP47FEB02_GAIN_BITS_MASK; for_each_set_bit(i, &data->active_channels_mask, data->phys_channels) { struct device *dev =3D regmap_get_device(data->regmap); unsigned int pd_tmp, dac_val; @@ -1027,7 +1026,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) data->chdata[i].dac_data =3D dac_val; =20 data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; - data->chdata[i].use_2x_gain =3D (gain_ch >> i) & MCP47FEB02_GAIN_BIT_MA= SK; + data->chdata[i].use_2x_gain =3D field_get(DAC_GAIN_MASK(i), gain_ch); =20 /* * Inform the user that the current voltage reference read from the vola= tile --=20 2.43.0 From nobody Fri Sep 25 05:30:00 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3190750C28D; Wed, 16 Sep 2026 14:19:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789568362; cv=none; b=U0Gij0adSjQqhgYauc6EYi9avk7GFCHs5edEQiKXPLVWwkhCUeJSOaDgKxISmO2oNEN1gXvWeD+DbWXDket7ywWtQ8HC+SztK9Da6ZFEjPGFcn7Bm5VxZkWE4ve/usLUMeGDcRt4lnVEgcLVVJxaHKQhtbwauwZu9WDrp1E8SI8= ARC-Message-Signature: i=1; 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Wed, 16 Sep 2026 07:19:07 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 16 Sep 2026 07:19:05 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:29 +0300 Subject: [PATCH v6 03/11] iio: dac: mcp47feb02: use field_get() instead of custom dynamic macros Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-3-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=1507; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=3SnBX6s92qYDiwvlb6kNwIVXgkXJjcnAWpZqIHcGjJE=; b=sq3uFtgNICL6jdb8nFM4eE6py3dCcQ50SNbTFz6Okp2/RTOoBQiu3GexLQzE02fgWf66aMHU4 YC80WRd+lzVBqdOhQs/I8DXcw0h7fi3gYEd3pBkaf9F8JfhgR0V0YhC X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Replace manual bit operations which select channel corresponding bits from a control register in mcp47feb02_init_ctrl_regs() with field_get() macro used with masks already defined for regmap operations within the driver. Reported-by: Jonathan Cameron Link: https://lore.kernel.org/all/20260913224339.490d89ba@jic23-hlaptop/ Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index fa4bd1df954844da35a8496758489189aeceb60d..81aa9063fcf730342d4af114da7= 3ac2fc550243f 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -1025,7 +1025,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) return ret; data->chdata[i].dac_data =3D dac_val; =20 - data->chdata[i].ref_mode =3D (vref_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_= MASK; + data->chdata[i].ref_mode =3D field_get(DAC_CTRL_MASK(i), vref_ch); data->chdata[i].use_2x_gain =3D field_get(DAC_GAIN_MASK(i), gain_ch); =20 /* @@ -1069,7 +1069,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) break; } =20 - pd_tmp =3D (pd_ch >> (2 * i)) & MCP47FEB02_DAC_CTRL_MASK; + pd_tmp =3D field_get(DAC_CTRL_MASK(i), pd_ch); data->chdata[i].powerdown_mode =3D pd_tmp ? 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Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Link: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel.o= rg/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 81aa9063fcf730342d4af114da73ac2fc550243f..117fd41257d5cd430c00847ff64= c22c6700dbb6a 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -468,7 +468,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a return ret; =20 if (!state) - return 0; + return len; =20 /* * Verify DAC Wiper and DAC Configuration are unlocked. If both are disab= led, --=20 2.43.0 From nobody Fri Sep 25 05:30:00 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7648450EC19; Wed, 16 Sep 2026 14:19:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.153.233 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789568375; cv=none; b=t8KqmF7eRqiBL6vPwz3NEaWfq8HmC7MHTBgnchE/DUQOTONPGKjElO8yx/Xd5DjkTazilGz8ZxNA8EslL+O1Jq83mqIIuuUHADyQB2ch9G7qvZ45kyLUK91ZDpDA8jsNK6RjiRj0WUQtAqgYokteGGF5mboZTviTEoMuRNpFWxM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789568375; c=relaxed/simple; bh=+kWJEeu8ElxCpnX6JU4X0XLh4hbXb/rAngt2K6QiMbA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=h3o6llE/uRhcl+UQojZSa3j9zLvHrYZlvKDQTWMsJU4PgJi0K+riPAkHQynKaWdB3ETcZLWGLg4d9jr4v4N33ZyDA1ywKjyhOidzOeAzzFUGYhJ80+OxYB34E7rwxdQLZTQLkC+DLfi6gCe6ff7oksTIAr2GpRtHxYNCSZFF4iA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=pH1nu+eS; arc=none smtp.client-ip=68.232.153.233 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="pH1nu+eS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1789568373; x=1821104373; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=+kWJEeu8ElxCpnX6JU4X0XLh4hbXb/rAngt2K6QiMbA=; b=pH1nu+eS98/7fZ+L858kNRcHL0ZDhLGRI6XKRbdPtyzIAu5UQKO/JKmE luzE2WsrRVZUTRktNQyHrWQnbjV+7AiNhOKBJz4JvzNOJuQP3OvMFYTyK 42SMZCdQseHI4fX9VZqSfC4fhxz0JA5ETP5IbIYdtVEWT+EVrbkWRVarE uzpTJJ6pJbp2YxdlQpmCmzRPuWOFG3HYvrDbmTyPMYNy3zbWR0n18U/jX sAkTT2L6RT0zWehCGp5AgZ4dsuipgT8m21aKePh/iSSkm2mQ2NeFAZ3RC NMgbl38CN4VPicl7xB88+U2pAoJWOmBhROndXP7mOjKoVwavpreUw/KTh Q==; X-CSE-ConnectionGUID: iP8P1HvzS8KO9TYqKEpMVw== X-CSE-MsgGUID: wGUSn0uXT4COerlA6Inc8A== X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="295112902" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 16 Sep 2026 07:19:32 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 16 Sep 2026 07:19:13 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 16 Sep 2026 07:19:10 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:31 +0300 Subject: [PATCH v6 05/11] iio: dac: mcp47feb02: Increase EEPROM Programming Write Cycle Time Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-5-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=1619; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=+kWJEeu8ElxCpnX6JU4X0XLh4hbXb/rAngt2K6QiMbA=; b=9kUc3+qb9QNQYz3yKGTwzW7P+uirbY9Alb0DLx6f2iZk4VwYt4CdETsAVE/M4370gY4X1rGOM +bJgMOeUGr7CgpbqOwymy3T1jJla+dMwMd/bpng96KYMa7KWgsavI31 X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Increase the EEPROM write polling timeout to prevent -ETIMEDOUT errors and incomplete nonvolatile write cycle, according to the time specified in the datasheets (11-16 ms). Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Link: https://lore.kernel.org/all/20260819125300.6B9211F000E9@smtp.kernel.o= rg/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 117fd41257d5cd430c00847ff64c22c6700dbb6a..a93e05cda5f36baf8f7573a1bd9= 2bf6167227362 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -448,7 +448,7 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), - USEC_PER_MSEC, USEC_PER_MSEC * 5); + 1 * USEC_PER_MSEC, 150 * USEC_PER_MSEC); if (ret) return ret; =20 @@ -508,7 +508,7 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a =20 ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), - USEC_PER_MSEC, USEC_PER_MSEC * 5); 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Wed, 16 Sep 2026 07:19:13 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:32 +0300 Subject: [PATCH v6 06/11] iio: dac: mcp47feb02: Avoid unjustified probe error on missing label Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-6-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron , , X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=1735; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=7ixAN1P45rRGyJOWyzUIt+JTzNcUYOwqNI/WyCYDSD8=; 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Correct %pfw usage by passing the child fwnode handle directly in the error message. Besides the probe warning a read error is returned at the attempt of reading a null label. Fixes: bf394cc80369 ("iio: dac: adding support for Microchip MCP47FEB02") Reported-by: sashiko-bot@kernel.org Link: https://lore.kernel.org/all/20260804134616.1D8A21F00A3E@smtp.kernel.o= rg/ Cc: stable@vger.kernel.org Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index a93e05cda5f36baf8f7573a1bd92bf6167227362..67bf8d9d9835095263b2ca6b710= acca60612354a 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -922,7 +922,10 @@ static int mcp47feb02_read_label(struct iio_dev *indio= _dev, struct iio_chan_spec { struct mcp47feb02_data *data =3D iio_priv(indio_dev); =20 - return sysfs_emit(label, "%s\n", data->labels[ch->address]); + if (data->labels[ch->address]) + return sysfs_emit(label, "%s\n", data->labels[ch->address]); + + return -ENOENT; } =20 static const struct iio_info mcp47feb02_info =3D { @@ -977,8 +980,7 @@ static int mcp47feb02_parse_fw(struct iio_dev *indio_de= v, =20 ret =3D fwnode_property_read_string(child, "label", &data->labels[reg]); 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Reported-by: Joshua Crofts Link: https://lore.kernel.org/all/20260723231859.03f92ce6@systembl0wer/ Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 67bf8d9d9835095263b2ca6b710acca60612354a..8dac4e2fb74fe4563324343ce21= 5af3389129130 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -52,7 +52,7 @@ #define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) #define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) =20 -/* Gain Control and I2C Slave Address Reguster fields */ +/* Gain Control and I2C Slave Address Register fields */ #define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) #define DAC_GAIN_VAL(ch, val) ((val) << (8 + (ch))) =20 --=20 2.43.0 From nobody Fri Sep 25 05:30:00 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E7D8150C2BF; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-8-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=3928; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=ox3TW9dR7HuYXesFtQTlhj0f6iwz5LSaxwwsKpTLehg=; b=3ZlN8SjILKhqc81fLtCWvw/nlLLT28IIEWQ/GZhfpesZyW16RuG75NRrkT1td4An9i4klYIic SX+A9KJtIQACfeQBJuUHx1mYWD9d6Q3k6bjI8MCksCGKB8YVS1TCUIo X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Rename generic DAC_CTRL_MASK/VAL macros to MCP47FEB02_VREF_PD_MASK/VAL in order to clearly indicate for which control registers these channel masks are suitable. Reported-by: Jonathan Cameron Link: https://lore.kernel.org/all/20260528125140.16a8f173@jic23-huawei/ Signed-off-by: Ariana Lazar --- drivers/iio/dac/mcp47feb02.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02.c index 8dac4e2fb74fe4563324343ce215af3389129130..5c09ca25a75e0ecb2bfc5a2d5e6= 2e5f7d3156810 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02.c @@ -49,8 +49,8 @@ #define MCP47FEB02_NV_I2C_SLAVE_ADDR_MASK GENMASK(7, 0) =20 /* Voltage reference, Power-Down control register and DAC Wiperlock status= register fields */ -#define DAC_CTRL_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) -#define DAC_CTRL_VAL(ch, val) ((val) << (2 * (ch))) +#define MCP47FEB02_VREF_PD_MASK(ch) (GENMASK(1, 0) << (2 * (ch))) +#define MCP47FEB02_VREF_PD_VAL(ch, val) ((val) << (2 * (ch))) =20 /* Gain Control and I2C Slave Address Register fields */ #define DAC_GAIN_MASK(ch) (BIT(0) << (8 + (ch))) @@ -555,7 +555,8 @@ static int mcp47feb02_suspend(struct device *dev) data->chdata[ch].powerdown =3D true; pd_mode =3D data->chdata[ch].powerdown_mode + 1; ret =3D regmap_update_bits(data->regmap, MCP47FEB02_POWER_DOWN_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, pd_mode)); + MCP47FEB02_VREF_PD_MASK(ch), + MCP47FEB02_VREF_PD_VAL(ch, pd_mode)); if (ret) return ret; =20 @@ -587,7 +588,8 @@ static int mcp47feb02_resume(struct device *dev) return ret; =20 ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, pd_mode)); + MCP47FEB02_VREF_PD_MASK(ch), + MCP47FEB02_VREF_PD_VAL(ch, pd_mode)); if (ret) return ret; =20 @@ -598,8 +600,8 @@ static int mcp47feb02_resume(struct device *dev) return ret; =20 ret =3D regmap_update_bits(data->regmap, MCP47FEB02_POWER_DOWN_REG_ADDR, - DAC_CTRL_MASK(ch), - DAC_CTRL_VAL(ch, MCP47FEB02_NORMAL_OPERATION)); + MCP47FEB02_VREF_PD_MASK(ch), + MCP47FEB02_VREF_PD_VAL(ch, MCP47FEB02_NORMAL_OPERATION)); if (ret) return ret; } @@ -656,7 +658,8 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p */ tmp_pd_mode =3D state ? (data->chdata[reg].powerdown_mode + 1) : MCP47FEB= 02_NORMAL_OPERATION; ret =3D regmap_update_bits(data->regmap, MCP47FEB02_POWER_DOWN_REG_ADDR, - DAC_CTRL_MASK(reg), DAC_CTRL_VAL(reg, tmp_pd_mode)); + MCP47FEB02_VREF_PD_MASK(reg), + MCP47FEB02_VREF_PD_VAL(reg, tmp_pd_mode)); if (ret) return ret; =20 @@ -822,7 +825,7 @@ static int mcp47feb02_ch_scale(struct mcp47feb02_data *= data, int ch, int scale) } =20 ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, - DAC_CTRL_MASK(ch), DAC_CTRL_VAL(ch, tmp_val)); + MCP47FEB02_VREF_PD_MASK(ch), MCP47FEB02_VREF_PD_VAL(ch, tmp_val)); if (ret) return ret; =20 @@ -1027,7 +1030,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) return ret; data->chdata[i].dac_data =3D dac_val; =20 - data->chdata[i].ref_mode =3D field_get(DAC_CTRL_MASK(i), vref_ch); + data->chdata[i].ref_mode =3D field_get(MCP47FEB02_VREF_PD_MASK(i), vref_= ch); data->chdata[i].use_2x_gain =3D field_get(DAC_GAIN_MASK(i), gain_ch); =20 /* @@ -1071,7 +1074,7 @@ static int mcp47feb02_init_ctrl_regs(struct mcp47feb0= 2_data *data) break; } =20 - pd_tmp =3D field_get(DAC_CTRL_MASK(i), pd_ch); + pd_tmp =3D field_get(MCP47FEB02_VREF_PD_MASK(i), pd_ch); data->chdata[i].powerdown_mode =3D pd_tmp ? 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The renamed file will contain the common DAC functionality shared by the MCP47FxBy1/2/4/8 I2C and MCP48FxBy1/2/4/8 SPI drivers. The MCP47FEB02 driver was refactored into two modules: mcp47feb02-core.c and mcp47feb02-i2c.c in order to prepare the support for SPI MCP48FxBy1/2/4/8 DAC family on top of the current implementation. Signed-off-by: Ariana Lazar --- MAINTAINERS | 2 +- drivers/iio/dac/Kconfig | 9 +- drivers/iio/dac/Makefile | 3 +- .../iio/dac/{mcp47feb02.c =3D> mcp47feb02-core.c} | 326 ++-------------= ------ drivers/iio/dac/mcp47feb02-i2c.c | 145 +++++++++ drivers/iio/dac/mcp47feb02.h | 43 +++ 6 files changed, 221 insertions(+), 307 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 3a19da74d00c9dfb48e900df71a86d4686d3ec2c..81abeab698f43bcfb755ed59ce1= 217bea1a28eb8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16297,7 +16297,7 @@ M: Ariana Lazar L: linux-iio@vger.kernel.org S: Supported F: Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml -F: drivers/iio/dac/mcp47feb02.c +F: drivers/iio/dac/mcp47feb02* =20 MCP4821 DAC DRIVER M: Anshul Dalal diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 3b3c77d8b3e1b6731df6e96723f92d4225e9783d..c99c32b229fb683d6407f30682f= 7ea6104984421 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -593,9 +593,13 @@ config MCP47A1 will be called mcp47a1. =20 config MCP47FEB02 - tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 DAC driver" + tristate + +config MCP47FEB02_I2C + tristate "MCP47F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 I2C DAC driver" depends on I2C select REGMAP_I2C + select MCP47FEB02 help Say yes here if you want to build the driver for the Microchip: - 8-bit DAC: @@ -611,7 +615,8 @@ config MCP47FEB02 (DAC) with I2C interface. =20 To compile this driver as a module, choose M here: the module - will be called mcp47feb02. + will be called mcp47feb02_i2c and you will also get + mcp47feb02_core for the core module. =20 config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 992f8930f95caed97ebad891d0f3685b4e23bf29..6377a9c42d983f615a0aa4d36a0= c3d3639c62951 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -56,7 +56,8 @@ obj-$(CONFIG_MCF54415_DAC) +=3D mcf54415_dac.o obj-$(CONFIG_MCP4725) +=3D mcp4725.o obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47A1) +=3D mcp47a1.o -obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02.o +obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o +obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02.c b/drivers/iio/dac/mcp47feb02-core= .c similarity index 73% rename from drivers/iio/dac/mcp47feb02.c rename to drivers/iio/dac/mcp47feb02-core.c index 5c09ca25a75e0ecb2bfc5a2d5e62e5f7d3156810..4a0abe8ad4c1629ece89d89cbcb= f5cd460aaa177 100644 --- a/drivers/iio/dac/mcp47feb02.c +++ b/drivers/iio/dac/mcp47feb02-core.c @@ -1,8 +1,8 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C and SPI interface * - * Copyright (C) 2025 Microchip Technology Inc. and its subsidiaries + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries * * Author: Ariana Lazar * @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -29,6 +28,8 @@ #include #include =20 +#include "mcp47feb02.h" + /* Register addresses must be left shifted with 3 positions in order to ap= pend command mask */ #define MCP47FEB02_DAC0_REG_ADDR 0x00 #define MCP47FEB02_VREF_REG_ADDR 0x40 @@ -85,220 +86,12 @@ enum mcp47feb02_gain_bit_mode { MCP47FEB02_GAIN_BIT_X2 =3D 1, }; =20 -static const char * const mcp47feb02_powerdown_modes[] =3D { +const char * const mcp47feb02_powerdown_modes[] =3D { "1kohm_to_gnd", "100kohm_to_gnd", "open_circuit", }; =20 -/** - * struct mcp47feb02_features - chip specific data - * @name: device name - * @phys_channels: number of hardware channels - * @resolution: DAC resolution - * @have_ext_vref1: does the hardware have an the second external voltage = reference? - * @have_eeprom: does the hardware have an internal eeprom? - */ -struct mcp47feb02_features { - const char *name; - unsigned int phys_channels; - unsigned int resolution; - bool have_ext_vref1; - bool have_eeprom; -}; - -static const struct mcp47feb02_features mcp47feb01_chip_features =3D { - .name =3D "mcp47feb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb02_chip_features =3D { - .name =3D "mcp47feb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb04_chip_features =3D { - .name =3D "mcp47feb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb08_chip_features =3D { - .name =3D "mcp47feb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb11_chip_features =3D { - .name =3D "mcp47feb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb12_chip_features =3D { - .name =3D "mcp47feb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb14_chip_features =3D { - .name =3D "mcp47feb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb18_chip_features =3D { - .name =3D "mcp47feb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb21_chip_features =3D { - .name =3D "mcp47feb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb22_chip_features =3D { - .name =3D "mcp47feb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb24_chip_features =3D { - .name =3D "mcp47feb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47feb28_chip_features =3D { - .name =3D "mcp47feb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D true, -}; - -static const struct mcp47feb02_features mcp47fvb01_chip_features =3D { - .name =3D "mcp47fvb01", - .phys_channels =3D 1, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb02_chip_features =3D { - .name =3D "mcp47fvb02", - .phys_channels =3D 2, - .resolution =3D 8, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb04_chip_features =3D { - .name =3D "mcp47fvb04", - .phys_channels =3D 4, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb08_chip_features =3D { - .name =3D "mcp47fvb08", - .phys_channels =3D 8, - .resolution =3D 8, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb11_chip_features =3D { - .name =3D "mcp47fvb11", - .phys_channels =3D 1, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb12_chip_features =3D { - .name =3D "mcp47fvb12", - .phys_channels =3D 2, - .resolution =3D 10, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb14_chip_features =3D { - .name =3D "mcp47fvb14", - .phys_channels =3D 4, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb18_chip_features =3D { - .name =3D "mcp47fvb18", - .phys_channels =3D 8, - .resolution =3D 10, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb21_chip_features =3D { - .name =3D "mcp47fvb21", - .phys_channels =3D 1, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb22_chip_features =3D { - .name =3D "mcp47fvb22", - .phys_channels =3D 2, - .resolution =3D 12, - .have_ext_vref1 =3D false, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb24_chip_features =3D { - .name =3D "mcp47fvb24", - .phys_channels =3D 4, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - -static const struct mcp47feb02_features mcp47fvb28_chip_features =3D { - .name =3D "mcp47fvb28", - .phys_channels =3D 8, - .resolution =3D 12, - .have_ext_vref1 =3D true, - .have_eeprom =3D false, -}; - /** * struct mcp47feb02_channel_data - channel configuration * @ref_mode: chosen voltage for reference @@ -379,7 +172,7 @@ static const struct regmap_access_table mcp47feb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47feb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47feb02_regmap_config =3D { +const struct regmap_config mcp47feb02_regmap_config =3D { .name =3D "mcp47feb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -391,6 +184,7 @@ static const struct regmap_config mcp47feb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47feb02_regmap_config, "IIO_MCP47FEB02"); =20 /* For devices that doesn't have nonvolatile memory */ static const struct regmap_range mcp47fvb02_readable_ranges[] =3D { @@ -421,7 +215,7 @@ static const struct regmap_access_table mcp47fvb02_vola= tile_table =3D { .n_yes_ranges =3D ARRAY_SIZE(mcp47fvb02_volatile_ranges), }; =20 -static const struct regmap_config mcp47fvb02_regmap_config =3D { +const struct regmap_config mcp47fvb02_regmap_config =3D { .name =3D "mcp47fvb02_regmap", .reg_bits =3D 8, .val_bits =3D 16, @@ -433,6 +227,7 @@ static const struct regmap_config mcp47fvb02_regmap_con= fig =3D { .cache_type =3D REGCACHE_MAPLE, .val_format_endian =3D REGMAP_ENDIAN_BIG, }; +EXPORT_SYMBOL_NS_GPL(mcp47fvb02_regmap_config, "IIO_MCP47FEB02"); =20 static int mcp47feb02_write_to_eeprom(struct mcp47feb02_data *data, unsign= ed int reg, unsigned int val) @@ -443,8 +238,6 @@ static int mcp47feb02_write_to_eeprom(struct mcp47feb02= _data *data, unsigned int * Wait until the currently occurring EEPROM Write Cycle is completed. * Only serial commands to the volatile memory are allowed. */ - guard(mutex)(&data->lock); - ret =3D regmap_read_poll_timeout(data->regmap, MCP47FEB02_GAIN_CTRL_STATU= S_REG_ADDR, eewa_val, !(eewa_val & MCP47FEB02_GAIN_BIT_STATUS_EEWA_MASK), @@ -470,6 +263,8 @@ static ssize_t store_eeprom_store(struct device *dev, s= truct device_attribute *a if (!state) return len; =20 + guard(mutex)(&data->lock); + /* * Verify DAC Wiper and DAC Configuration are unlocked. If both are disab= led, * writing to EEPROM is available. @@ -577,11 +372,9 @@ static int mcp47feb02_resume(struct device *dev) guard(mutex)(&data->lock); =20 for_each_set_bit(ch, &data->active_channels_mask, data->phys_channels) { - u8 pd_mode; int ret; =20 data->chdata[ch].powerdown =3D false; - pd_mode =3D data->chdata[ch].powerdown_mode + 1; =20 ret =3D regmap_write(data->regmap, REG_ADDR(ch), data->chdata[ch].dac_da= ta); if (ret) @@ -589,7 +382,8 @@ static int mcp47feb02_resume(struct device *dev) =20 ret =3D regmap_update_bits(data->regmap, MCP47FEB02_VREF_REG_ADDR, MCP47FEB02_VREF_PD_MASK(ch), - MCP47FEB02_VREF_PD_VAL(ch, pd_mode)); + MCP47FEB02_VREF_PD_VAL(ch, data->chdata[ch].ref_mode)); + if (ret) return ret; =20 @@ -668,7 +462,7 @@ static ssize_t mcp47feb02_write_powerdown(struct iio_de= v *indio_dev, uintptr_t p return len; } =20 -static DEFINE_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp= 47feb02_resume); +EXPORT_SIMPLE_DEV_PM_OPS(mcp47feb02_pm_ops, mcp47feb02_suspend, mcp47feb02= _resume); =20 static const struct iio_enum mcp47febxx_powerdown_mode_enum =3D { .items =3D mcp47feb02_powerdown_modes, @@ -1099,10 +893,10 @@ static int mcp47feb02_init_ch_scales(struct mcp47feb= 02_data *data, int vdd_uV, return 0; } =20 -static int mcp47feb02_probe(struct i2c_client *client) +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap) { - const struct mcp47feb02_features *chip_features; - struct device *dev =3D &client->dev; + struct device *dev =3D regmap_get_device(regmap); struct mcp47feb02_data *data; struct iio_dev *indio_dev; int vref1_uV, vref_uV, vdd_uV, ret; @@ -1111,22 +905,16 @@ static int mcp47feb02_probe(struct i2c_client *clien= t) if (!indio_dev) return -ENOMEM; =20 - data =3D iio_priv(indio_dev); - chip_features =3D i2c_get_match_data(client); - if (!chip_features) - return -EINVAL; + dev_set_drvdata(dev, indio_dev); =20 + data =3D iio_priv(indio_dev); data->chip_features =3D chip_features; + data->regmap =3D regmap; =20 - if (chip_features->have_eeprom) { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + if (chip_features->have_eeprom) indio_dev->info =3D &mcp47feb02_info; - } else { - data->regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + else indio_dev->info =3D &mcp47fvb02_info; - } - if (IS_ERR(data->regmap)) - return dev_err_probe(dev, PTR_ERR(data->regmap), "Error initializing i2c= regmap\n"); =20 indio_dev->name =3D chip_features->name; =20 @@ -1183,75 +971,7 @@ static int mcp47feb02_probe(struct i2c_client *client) =20 return devm_iio_device_register(dev, indio_dev); } - -static const struct i2c_device_id mcp47feb02_id[] =3D { - { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, - { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, - { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, - { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, - { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, - { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, - { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, - { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, - { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, - { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, - { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, - { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, - { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, - { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, - { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, - { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, - { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, - { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, - { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, - { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, - { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, - { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, - { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, - { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, - { } -}; -MODULE_DEVICE_TABLE(i2c, mcp47feb02_id); - -static const struct of_device_id mcp47feb02_of_match[] =3D { - { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, - { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, - { } -}; -MODULE_DEVICE_TABLE(of, mcp47feb02_of_match); - -static struct i2c_driver mcp47feb02_driver =3D { - .driver =3D { - .name =3D "mcp47feb02", - .of_match_table =3D mcp47feb02_of_match, - .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), - }, - .probe =3D mcp47feb02_probe, - .id_table =3D mcp47feb02_id, -}; -module_i2c_driver(mcp47feb02_driver); +EXPORT_SYMBOL_NS(mcp47feb02_common_probe, "IIO_MCP47FEB02"); =20 MODULE_AUTHOR("Ariana Lazar "); MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); diff --git a/drivers/iio/dac/mcp47feb02-i2c.c b/drivers/iio/dac/mcp47feb02-= i2c.c new file mode 100644 index 0000000000000000000000000000000000000000..7ec0cccad79bc9e9e3f919209c3= 4d0f39656a370 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-i2c.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP47FEB02 Multi-Channel DAC with I2C interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with I2C interface: + * [MCP47FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005375A.pdf + * [MCP47FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005405A.pdf + * [MCP47FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp47feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp47feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp47fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp47fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp47fvb28, 8, 12, true, false); + +static int mcp47feb02_i2c_probe(struct i2c_client *client) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &client->dev; + struct regmap *regmap; + + chip_features =3D i2c_get_match_data(client); + if (!chip_features) + return dev_err_probe(dev, -ENODATA, "No match data found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_i2c(client, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_i2c(client, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing I2C regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct i2c_device_id mcp47feb02_i2c_id[] =3D { + { .name =3D "mcp47feb01", .driver_data =3D (kernel_ulong_t)&mcp47feb01_ch= ip_features }, + { .name =3D "mcp47feb02", .driver_data =3D (kernel_ulong_t)&mcp47feb02_ch= ip_features }, + { .name =3D "mcp47feb04", .driver_data =3D (kernel_ulong_t)&mcp47feb04_ch= ip_features }, + { .name =3D "mcp47feb08", .driver_data =3D (kernel_ulong_t)&mcp47feb08_ch= ip_features }, + { .name =3D "mcp47feb11", .driver_data =3D (kernel_ulong_t)&mcp47feb11_ch= ip_features }, + { .name =3D "mcp47feb12", .driver_data =3D (kernel_ulong_t)&mcp47feb12_ch= ip_features }, + { .name =3D "mcp47feb14", .driver_data =3D (kernel_ulong_t)&mcp47feb14_ch= ip_features }, + { .name =3D "mcp47feb18", .driver_data =3D (kernel_ulong_t)&mcp47feb18_ch= ip_features }, + { .name =3D "mcp47feb21", .driver_data =3D (kernel_ulong_t)&mcp47feb21_ch= ip_features }, + { .name =3D "mcp47feb22", .driver_data =3D (kernel_ulong_t)&mcp47feb22_ch= ip_features }, + { .name =3D "mcp47feb24", .driver_data =3D (kernel_ulong_t)&mcp47feb24_ch= ip_features }, + { .name =3D "mcp47feb28", .driver_data =3D (kernel_ulong_t)&mcp47feb28_ch= ip_features }, + { .name =3D "mcp47fvb01", .driver_data =3D (kernel_ulong_t)&mcp47fvb01_ch= ip_features }, + { .name =3D "mcp47fvb02", .driver_data =3D (kernel_ulong_t)&mcp47fvb02_ch= ip_features }, + { .name =3D "mcp47fvb04", .driver_data =3D (kernel_ulong_t)&mcp47fvb04_ch= ip_features }, + { .name =3D "mcp47fvb08", .driver_data =3D (kernel_ulong_t)&mcp47fvb08_ch= ip_features }, + { .name =3D "mcp47fvb11", .driver_data =3D (kernel_ulong_t)&mcp47fvb11_ch= ip_features }, + { .name =3D "mcp47fvb12", .driver_data =3D (kernel_ulong_t)&mcp47fvb12_ch= ip_features }, + { .name =3D "mcp47fvb14", .driver_data =3D (kernel_ulong_t)&mcp47fvb14_ch= ip_features }, + { .name =3D "mcp47fvb18", .driver_data =3D (kernel_ulong_t)&mcp47fvb18_ch= ip_features }, + { .name =3D "mcp47fvb21", .driver_data =3D (kernel_ulong_t)&mcp47fvb21_ch= ip_features }, + { .name =3D "mcp47fvb22", .driver_data =3D (kernel_ulong_t)&mcp47fvb22_ch= ip_features }, + { .name =3D "mcp47fvb24", .driver_data =3D (kernel_ulong_t)&mcp47fvb24_ch= ip_features }, + { .name =3D "mcp47fvb28", .driver_data =3D (kernel_ulong_t)&mcp47fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mcp47feb02_i2c_id); + +static const struct of_device_id mcp47feb02_of_i2c_match[] =3D { + { .compatible =3D "microchip,mcp47feb01", .data =3D &mcp47feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb02", .data =3D &mcp47feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb04", .data =3D &mcp47feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb08", .data =3D &mcp47feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb11", .data =3D &mcp47feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb12", .data =3D &mcp47feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb14", .data =3D &mcp47feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb18", .data =3D &mcp47feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb21", .data =3D &mcp47feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb22", .data =3D &mcp47feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb24", .data =3D &mcp47feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47feb28", .data =3D &mcp47feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb01", .data =3D &mcp47fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb02", .data =3D &mcp47fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb04", .data =3D &mcp47fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb08", .data =3D &mcp47fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb11", .data =3D &mcp47fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb12", .data =3D &mcp47fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb14", .data =3D &mcp47fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb18", .data =3D &mcp47fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb21", .data =3D &mcp47fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb22", .data =3D &mcp47fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb24", .data =3D &mcp47fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp47fvb28", .data =3D &mcp47fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_i2c_match); + +static struct i2c_driver mcp47feb02_i2c_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_i2c_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_i2c_probe, + .id_table =3D mcp47feb02_i2c_id, +}; +module_i2c_driver(mcp47feb02_i2c_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP47FEB02 Multi-Channel DAC with I2C i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); diff --git a/drivers/iio/dac/mcp47feb02.h b/drivers/iio/dac/mcp47feb02.h new file mode 100644 index 0000000000000000000000000000000000000000..5bcce1f9ae112c4fecc930f9927= 442eb93832f20 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02.h @@ -0,0 +1,43 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +#ifndef __DRIVERS_IIO_DAC_MCP47FEB02_H__ +#define __DRIVERS_IIO_DAC_MCP47FEB02_H__ + +#include +#include + +extern const char * const mcp47feb02_powerdown_modes[]; + +#define MCP47FEB02_CHIP_INFO(_name, _channels, _res, _vref1, _eeprom) \ +static const struct mcp47feb02_features _name##_chip_features =3D { \ + .name =3D #_name, \ + .phys_channels =3D _channels, \ + .resolution =3D _res, \ + .have_ext_vref1 =3D _vref1, \ + .have_eeprom =3D _eeprom, \ +} + +/** + * struct mcp47feb02_features - chip specific data + * @name: device name + * @phys_channels: number of hardware channels + * @resolution: DAC resolution + * @have_ext_vref1: does the hardware have an the second external voltage = reference? + * @have_eeprom: does the hardware have an internal eeprom? + */ +struct mcp47feb02_features { + const char *name; + unsigned int phys_channels; + unsigned int resolution; + bool have_ext_vref1; + bool have_eeprom; +}; + +extern const struct regmap_config mcp47feb02_regmap_config; +extern const struct regmap_config mcp47fvb02_regmap_config; + +int mcp47feb02_common_probe(const struct mcp47feb02_features *chip_feature= s, + struct regmap *regmap); + +extern const struct dev_pm_ops mcp47feb02_pm_ops; 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X-CSE-ConnectionGUID: iP8P1HvzS8KO9TYqKEpMVw== X-CSE-MsgGUID: ihOAQqk5R0+p9Ukj9YoKQw== X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="295112906" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 16 Sep 2026 07:19:34 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 16 Sep 2026 07:19:28 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 16 Sep 2026 07:19:25 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:36 +0300 Subject: [PATCH v6 10/11] dt-bindings: iio: dac: add support for MCP48FEB02 SPI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-10-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=15556; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=acUL/CcC7KE1IDiRXLEfBcTJXBXILIApK2E6Dz8MP1c=; b=za+WPIAKAEqtAow7LmRMIoO0uRIuo7XVq64u5Xs40/aOpYek+fgejgWj2c60hJUuyadPmHnvi qXECvcPb1/sCl6nWNLmoPXXqVnlq2ISpHlOQrzIAfK/v9j9H4Jaxn1Z X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= Add the SPI MCP48FxBy1/2/4/8 part numbers, the spi-max-frequency property and a devicetree example for SPI usage to the existing binding. Signed-off-by: Ariana Lazar Reviewed-by: Rob Herring (Arm) --- .../bindings/iio/dac/microchip,mcp47feb02.yaml | 221 ++++++++++++++++-= ---- 1 file changed, 173 insertions(+), 48 deletions(-) diff --git a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02= .yaml b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml index d131f136bd15161666932261bcacd6d124b23ede..a86d094f0d4b54f9d9cc39fd542= 22f5968714668 100644 --- a/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml +++ b/Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml @@ -4,58 +4,92 @@ $id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies +title: Microchip MCP4(7/8)F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C/SPI Interfa= ce Families =20 maintainers: - Ariana Lazar =20 description: | - Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12, - MCP47FEB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005375A.pdf - Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12, - MCP47FVB22 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Product= Documents/DataSheets/20005405A.pdf - Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18, - MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18, - MCP47FVB28 can be found here: - https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produc= tDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf - - +------------+--------------+-------------+-------------+------------+ - | Device | Resolution | Channels | Vref number | Memory | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM | - | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM | - | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM | - | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM | - | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB01 | 8-bit | 1 | 1 | RAM | - | MCP47FVB11 | 10-bit | 1 | 1 | RAM | - | MCP47FVB21 | 12-bit | 1 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB02 | 8-bit | 2 | 1 | RAM | - | MCP47FVB12 | 10-bit | 2 | 1 | RAM | - | MCP47FVB22 | 12-bit | 2 | 1 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB04 | 8-bit | 4 | 2 | RAM | - | MCP47FVB14 | 10-bit | 4 | 2 | RAM | - | MCP47FVB24 | 12-bit | 4 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FVB08 | 8-bit | 8 | 2 | RAM | - | MCP47FVB18 | 10-bit | 8 | 2 | RAM | - | MCP47FVB28 | 12-bit | 8 | 2 | RAM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM | - | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM | - | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM | - |------------|--------------|-------------|-------------|------------| - | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | - | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | - | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | - +------------+--------------+-------------+-------------+------------+ + Datasheets for MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Famil= ies: + Datasheet for MCP47FEB01, MCP47FEB02, MCP47FEB11, MCP47FEB12, MCP47FEB2= 1, + MCP47FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005375A.pdf + Datasheet for MCP47FVB01, MCP47FVB02, MCP47FVB11, MCP47FVB12, MCP47FVB2= 1, + MCP47FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005405A.pdf + Datasheet for MCP47FEB04, MCP47FEB08, MCP47FEB14, MCP47FEB18, MCP47FEB2= 4, + MCP47FEB28, MCP47FVB04, MCP47FVB08, MCP47FVB14, MCP47FVB18, MCP47FVB24, + MCP47FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf + Datasheets for MCP48F(E/V)B(0/1/2)(1/2/4/8) DAC with SPI Interface Fami= lies: + Datasheet for MCP48FEB01, MCP48FEB02, MCP48FEB11, MCP48FEB12, MCP48FEB2= 1, + MCP48FEB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005429B.pdf + Datasheet for MCP48FVB01, MCP48FVB02, MCP48FVB11, MCP48FVB12, MCP48FVB2= 1, + MCP48FVB22 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/Produc= tDocuments/DataSheets/20005466A.pdf + Datasheet for MCP48FEB04, MCP48FEB14, MCP48FEB24, MCP48FEB08, MCP48FEB1= 8, + MCP48FEB28, MCP48FVB04, MCP48FVB14, MCP48FVB24, MCP48FVB08, MCP48FVB18, + MCP48FVB28 can be found here: + https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/Produ= ctDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS20006362A.pdf + + +------------+--------------+-------------+-------------+------------+--= ----------+ + | Device | Resolution | Channels | Vref number | Memory | I= nterface | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB01 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB02 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB04 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB01 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB02 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB04 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB08 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB11 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB12 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB14 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB11 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB12 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB14 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB18 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FEB21 | | 1 | 1 | EEPROM | = I2C | + | MCP47FEB22 | | 2 | 1 | EEPROM | = I2C | + | MCP47FEB24 | | 4 | 2 | EEPROM | = I2C | + | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM | = I2C | + | MCP48FEB21 | | 1 | 1 | EEPROM | = SPI | + | MCP48FEB22 | | 2 | 1 | EEPROM | = SPI | + | MCP48FEB24 | | 4 | 2 | EEPROM | = SPI | + | MCP48FEB28 | | 8 | 2 | EEPROM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB01 | | 1 | 1 | RAM | = I2C | + | MCP47FVB02 | | 2 | 1 | RAM | = I2C | + | MCP47FVB04 | | 4 | 2 | RAM | = I2C | + | MCP47FVB08 | 8-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB01 | | 1 | 1 | RAM | = SPI | + | MCP48FVB02 | | 2 | 1 | RAM | = SPI | + | MCP48FVB04 | | 4 | 2 | RAM | = SPI | + | MCP48FVB08 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB11 | | 1 | 1 | RAM | = I2C | + | MCP47FVB12 | | 2 | 1 | RAM | = I2C | + | MCP47FVB14 | | 4 | 2 | RAM | = I2C | + | MCP47FVB18 | 10-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB11 | | 1 | 1 | RAM | = SPI | + | MCP48FVB12 | | 2 | 1 | RAM | = SPI | + | MCP48FVB14 | | 4 | 2 | RAM | = SPI | + | MCP48FVB18 | | 8 | 2 | RAM | = SPI | + |------------|--------------|-------------|-------------|------------|--= ----------| + | MCP47FVB21 | | 1 | 1 | RAM | = I2C | + | MCP47FVB22 | | 2 | 1 | RAM | = I2C | + | MCP47FVB24 | | 4 | 2 | RAM | = I2C | + | MCP47FVB28 | 12-bit | 8 | 2 | RAM | = I2C | + | MCP48FVB21 | | 1 | 1 | RAM | = SPI | + | MCP48FVB22 | | 2 | 1 | RAM | = SPI | + | MCP48FVB24 | | 4 | 2 | RAM | = SPI | + | MCP48FVB28 | | 8 | 2 | RAM | = SPI | + +------------+--------------+-------------+-------------+------------+--= ----------+ =20 properties: compatible: @@ -84,10 +118,37 @@ properties: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb01 + - microchip,mcp48feb02 + - microchip,mcp48feb04 + - microchip,mcp48feb08 + - microchip,mcp48feb11 + - microchip,mcp48feb12 + - microchip,mcp48feb14 + - microchip,mcp48feb18 + - microchip,mcp48feb21 + - microchip,mcp48feb22 + - microchip,mcp48feb24 + - microchip,mcp48feb28 + - microchip,mcp48fvb01 + - microchip,mcp48fvb02 + - microchip,mcp48fvb04 + - microchip,mcp48fvb08 + - microchip,mcp48fvb11 + - microchip,mcp48fvb12 + - microchip,mcp48fvb14 + - microchip,mcp48fvb18 + - microchip,mcp48fvb21 + - microchip,mcp48fvb22 + - microchip,mcp48fvb24 + - microchip,mcp48fvb28 =20 reg: maxItems: 1 =20 + spi-max-frequency: + maximum: 10000000 + "#address-cells": const: 1 =20 @@ -178,6 +239,21 @@ required: - vdd-supply =20 allOf: + - if: + properties: + compatible: + contains: + pattern: "^microchip,mcp48f[ev]b[0-2][1248]$" + then: + $ref: /schemas/spi/spi-peripheral-props.yaml# + dependencies: + spi-cpha: [ spi-cpol ] + spi-cpol: [ spi-cpha ] + else: + properties: + spi-max-frequency: false + spi-cpha: false + spi-cpol: false - if: properties: compatible: @@ -189,6 +265,12 @@ allOf: - microchip,mcp47fvb01 - microchip,mcp47fvb11 - microchip,mcp47fvb21 + - microchip,mcp48feb01 + - microchip,mcp48feb11 + - microchip,mcp48feb21 + - microchip,mcp48fvb01 + - microchip,mcp48fvb11 + - microchip,mcp48fvb21 then: properties: lat1-gpios: false @@ -211,6 +293,12 @@ allOf: - microchip,mcp47fvb02 - microchip,mcp47fvb12 - microchip,mcp47fvb22 + - microchip,mcp48feb02 + - microchip,mcp48feb12 + - microchip,mcp48feb22 + - microchip,mcp48fvb02 + - microchip,mcp48fvb12 + - microchip,mcp48fvb22 then: properties: lat1-gpios: false @@ -233,6 +321,12 @@ allOf: - microchip,mcp47feb04 - microchip,mcp47feb14 - microchip,mcp47feb24 + - microchip,mcp48feb04 + - microchip,mcp48feb14 + - microchip,mcp48feb24 + - microchip,mcp48fvb04 + - microchip,mcp48fvb14 + - microchip,mcp48fvb24 then: patternProperties: "^channel@[0-3]$": @@ -251,6 +345,12 @@ allOf: - microchip,mcp47feb08 - microchip,mcp47feb18 - microchip,mcp47feb28 + - microchip,mcp48feb08 + - microchip,mcp48feb18 + - microchip,mcp48feb28 + - microchip,mcp48fvb08 + - microchip,mcp48fvb18 + - microchip,mcp48fvb28 then: patternProperties: "^channel@[0-7]$": @@ -272,7 +372,7 @@ allOf: properties: microchip,vref1-buffered: false =20 -additionalProperties: false +unevaluatedProperties: false =20 examples: - | @@ -299,4 +399,29 @@ examples: }; }; }; + - | + spi { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dac@0 { + compatible =3D "microchip,mcp48feb02"; + reg =3D <0x0>; + vdd-supply =3D <&vdac_vdd>; + vref-supply =3D <&vref_reg>; + spi-max-frequency =3D <10000000>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + channel@0 { + reg =3D <0>; + label =3D "Adjustable_voltage_ch0"; + }; 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(10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Wed, 16 Sep 2026 07:19:30 -0700 Received: from [127.0.1.1] (10.10.85.11) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Wed, 16 Sep 2026 07:19:28 -0700 From: Ariana Lazar Date: Wed, 16 Sep 2026 17:16:37 +0300 Subject: [PATCH v6 11/11] iio: dac: add support for Microchip MCP48FEB02 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260916-mcp47feb02_refactor-v6-11-285464651f89@microchip.com> References: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> In-Reply-To: <20260916-mcp47feb02_refactor-v6-0-285464651f89@microchip.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , "Andy Shevchenko" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , , Ariana Lazar , Jonathan Cameron X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789568335; l=10613; i=ariana.lazar@microchip.com; s=20250825; h=from:subject:message-id; bh=jtTe6xcWXWHv6CN3Fo47qR88PLKf+5Yr7GJSvJGIJtE=; b=lHkkH2nqzHrnNTlTPidJbY4hkoWoF70P4XyXmeBe/2kw5NLboVeG+tDvdZpqYaa9fx0f3XZ0g FqMKdGTt3VqA18v6rxQe+2SP29UswqlJO4e1LsIwK6TfEUoAC9RdU1h X-Developer-Key: i=ariana.lazar@microchip.com; a=ed25519; pk=jmvf1fSxcnzZmXfITM3L94IwutM+wqA1POQHiYyD6Dk= This is the IIO driver for Microchip MCP48FxBy1/2/4/8 series of buffered voltage output Digital-to-Analog Converters with nonvolatile or volatile memory and an SPI Interface. The families support up to 8 output channels. The devices can be 8-bit, 10-bit and 12-bit. Signed-off-by: Ariana Lazar --- drivers/iio/dac/Kconfig | 23 +++++++ drivers/iio/dac/Makefile | 1 + drivers/iio/dac/mcp47feb02-spi.c | 145 +++++++++++++++++++++++++++++++++++= ++++ 3 files changed, 169 insertions(+) diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index c99c32b229fb683d6407f30682f7ea6104984421..3e37db1f772a2ccf9c872d7e128= 766f342e13d6f 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -618,6 +618,29 @@ config MCP47FEB02_I2C will be called mcp47feb02_i2c and you will also get mcp47feb02_core for the core module. =20 +config MCP47FEB02_SPI + tristate "MCP48F(E/V)B01/02/04/08/11/12/14/18/21/22/24/28 SPI DAC driver" + depends on SPI + select REGMAP_SPI + select MCP47FEB02 + help + Say yes here if you want to build the driver for the Microchip: + - 8-bit DAC: + MCP48FEB01, MCP48FEB02, MCP48FEB04, MCP48FEB08, + MCP48FVB01, MCP48FVB02, MCP48FVB04, MCP48FVB08 + - 10-bit DAC: + MCP48FEB11, MCP48FEB12, MCP48FEB14, MCP48FEB18, + MCP48FVB11, MCP48FVB12, MCP48FVB14, MCP48FVB18 + - 12-bit DAC: + MCP48FEB21, MCP48FEB22, MCP48FEB24, MCP48FEB28, + MCP48FVB21, MCP48FVB22, MCP48FVB24, MCP48FVB28 + having 1 to 8 channels, 8/10/12-bit digital-to-analog converter + (DAC) with SPI interface. + + To compile this driver as a module, choose M here: the module + will be called mcp47feb02_spi and you will also get + mcp47feb02_core for the core module. + config MCP4821 tristate "MCP4801/02/11/12/21/22 DAC driver" depends on SPI diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 6377a9c42d983f615a0aa4d36a0c3d3639c62951..b665ff638cdc6e6e8ee32521c9c= 12a9e3d192eef 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -58,6 +58,7 @@ obj-$(CONFIG_MCP4728) +=3D mcp4728.o obj-$(CONFIG_MCP47A1) +=3D mcp47a1.o obj-$(CONFIG_MCP47FEB02) +=3D mcp47feb02-core.o obj-$(CONFIG_MCP47FEB02_I2C) +=3D mcp47feb02-i2c.o +obj-$(CONFIG_MCP47FEB02_SPI) +=3D mcp47feb02-spi.o obj-$(CONFIG_MCP4821) +=3D mcp4821.o obj-$(CONFIG_MCP4922) +=3D mcp4922.o obj-$(CONFIG_STM32_DAC_CORE) +=3D stm32-dac-core.o diff --git a/drivers/iio/dac/mcp47feb02-spi.c b/drivers/iio/dac/mcp47feb02-= spi.c new file mode 100644 index 0000000000000000000000000000000000000000..974f8fe1b86e939e99e6b2a7d3d= 05f025a73aa67 --- /dev/null +++ b/drivers/iio/dac/mcp47feb02-spi.c @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * IIO driver for MCP48FEB02 Multi-Channel DAC with SPI interface + * + * Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries + * + * Author: Ariana Lazar + * + * Datasheet links for devices with SPI interface: + * [MCP48FEBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005429B.pdf + * [MCP48FVBxx] https://ww1.microchip.com/downloads/aemDocuments/documents= /OTH/ProductDocuments/DataSheets/20005466A.pdf + * [MCP48FxBx4/8] https://ww1.microchip.com/downloads/aemDocuments/documen= ts/MSLD/ProductDocuments/DataSheets/MCP48FXBX4-8-Family-Data-Sheet-DS200063= 62A.pdf + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mcp47feb02.h" + +/* Parts with EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48feb01, 1, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb02, 2, 8, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb04, 4, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb08, 8, 8, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb11, 1, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb12, 2, 10, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb14, 4, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb18, 8, 10, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb21, 1, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb22, 2, 12, false, true); +MCP47FEB02_CHIP_INFO(mcp48feb24, 4, 12, true, true); +MCP47FEB02_CHIP_INFO(mcp48feb28, 8, 12, true, true); + +/* Parts without EEPROM memory */ +MCP47FEB02_CHIP_INFO(mcp48fvb01, 1, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb02, 2, 8, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb04, 4, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb08, 8, 8, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb11, 1, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb12, 2, 10, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb14, 4, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb18, 8, 10, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb21, 1, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb22, 2, 12, false, false); +MCP47FEB02_CHIP_INFO(mcp48fvb24, 4, 12, true, false); +MCP47FEB02_CHIP_INFO(mcp48fvb28, 8, 12, true, false); + +static int mcp47feb02_spi_probe(struct spi_device *spi) +{ + const struct mcp47feb02_features *chip_features; + struct device *dev =3D &spi->dev; + struct regmap *regmap; + + chip_features =3D spi_get_device_match_data(spi); + if (!chip_features) + return dev_err_probe(dev, -ENODATA, "No match data found\n"); + + if (chip_features->have_eeprom) + regmap =3D devm_regmap_init_spi(spi, &mcp47feb02_regmap_config); + else + regmap =3D devm_regmap_init_spi(spi, &mcp47fvb02_regmap_config); + + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "Error initializing SPI regma= p\n"); + + return mcp47feb02_common_probe(chip_features, regmap); +} + +static const struct spi_device_id mcp47feb02_spi_id[] =3D { + { .name =3D "mcp48feb01", .driver_data =3D (kernel_ulong_t)&mcp48feb01_ch= ip_features }, + { .name =3D "mcp48feb02", .driver_data =3D (kernel_ulong_t)&mcp48feb02_ch= ip_features }, + { .name =3D "mcp48feb04", .driver_data =3D (kernel_ulong_t)&mcp48feb04_ch= ip_features }, + { .name =3D "mcp48feb08", .driver_data =3D (kernel_ulong_t)&mcp48feb08_ch= ip_features }, + { .name =3D "mcp48feb11", .driver_data =3D (kernel_ulong_t)&mcp48feb11_ch= ip_features }, + { .name =3D "mcp48feb12", .driver_data =3D (kernel_ulong_t)&mcp48feb12_ch= ip_features }, + { .name =3D "mcp48feb14", .driver_data =3D (kernel_ulong_t)&mcp48feb14_ch= ip_features }, + { .name =3D "mcp48feb18", .driver_data =3D (kernel_ulong_t)&mcp48feb18_c= hip_features }, + { .name =3D "mcp48feb21", .driver_data =3D (kernel_ulong_t)&mcp48feb21_ch= ip_features }, + { .name =3D "mcp48feb22", .driver_data =3D (kernel_ulong_t)&mcp48feb22_ch= ip_features }, + { .name =3D "mcp48feb24", .driver_data =3D (kernel_ulong_t)&mcp48feb24_ch= ip_features }, + { .name =3D "mcp48feb28", .driver_data =3D (kernel_ulong_t)&mcp48feb28_ch= ip_features }, + { .name =3D "mcp48fvb01", .driver_data =3D (kernel_ulong_t)&mcp48fvb01_ch= ip_features }, + { .name =3D "mcp48fvb02", .driver_data =3D (kernel_ulong_t)&mcp48fvb02_ch= ip_features }, + { .name =3D "mcp48fvb04", .driver_data =3D (kernel_ulong_t)&mcp48fvb04_ch= ip_features }, + { .name =3D "mcp48fvb08", .driver_data =3D (kernel_ulong_t)&mcp48fvb08_ch= ip_features }, + { .name =3D "mcp48fvb11", .driver_data =3D (kernel_ulong_t)&mcp48fvb11_ch= ip_features }, + { .name =3D "mcp48fvb12", .driver_data =3D (kernel_ulong_t)&mcp48fvb12_ch= ip_features }, + { .name =3D "mcp48fvb14", .driver_data =3D (kernel_ulong_t)&mcp48fvb14_ch= ip_features }, + { .name =3D "mcp48fvb18", .driver_data =3D (kernel_ulong_t)&mcp48fvb18_ch= ip_features }, + { .name =3D "mcp48fvb21", .driver_data =3D (kernel_ulong_t)&mcp48fvb21_ch= ip_features }, + { .name =3D "mcp48fvb22", .driver_data =3D (kernel_ulong_t)&mcp48fvb22_ch= ip_features }, + { .name =3D "mcp48fvb24", .driver_data =3D (kernel_ulong_t)&mcp48fvb24_ch= ip_features }, + { .name =3D "mcp48fvb28", .driver_data =3D (kernel_ulong_t)&mcp48fvb28_ch= ip_features }, + { } +}; +MODULE_DEVICE_TABLE(spi, mcp47feb02_spi_id); + +static const struct of_device_id mcp47feb02_of_spi_match[] =3D { + { .compatible =3D "microchip,mcp48feb01", .data =3D &mcp48feb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb02", .data =3D &mcp48feb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb04", .data =3D &mcp48feb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb08", .data =3D &mcp48feb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb11", .data =3D &mcp48feb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb12", .data =3D &mcp48feb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb14", .data =3D &mcp48feb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb18", .data =3D &mcp48feb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb21", .data =3D &mcp48feb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb22", .data =3D &mcp48feb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb24", .data =3D &mcp48feb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48feb28", .data =3D &mcp48feb28_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb01", .data =3D &mcp48fvb01_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb02", .data =3D &mcp48fvb02_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb04", .data =3D &mcp48fvb04_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb08", .data =3D &mcp48fvb08_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb11", .data =3D &mcp48fvb11_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb12", .data =3D &mcp48fvb12_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb14", .data =3D &mcp48fvb14_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb18", .data =3D &mcp48fvb18_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb21", .data =3D &mcp48fvb21_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb22", .data =3D &mcp48fvb22_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb24", .data =3D &mcp48fvb24_chip_feat= ures }, + { .compatible =3D "microchip,mcp48fvb28", .data =3D &mcp48fvb28_chip_feat= ures }, + { } +}; +MODULE_DEVICE_TABLE(of, mcp47feb02_of_spi_match); + +static struct spi_driver mcp47feb02_spi_driver =3D { + .driver =3D { + .name =3D "mcp47feb02", + .of_match_table =3D mcp47feb02_of_spi_match, + .pm =3D pm_sleep_ptr(&mcp47feb02_pm_ops), + }, + .probe =3D mcp47feb02_spi_probe, + .id_table =3D mcp47feb02_spi_id, +}; +module_spi_driver(mcp47feb02_spi_driver); + +MODULE_AUTHOR("Ariana Lazar "); +MODULE_DESCRIPTION("IIO driver for MCP48FEB02 Multi-Channel DAC with SPI i= nterface"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("IIO_MCP47FEB02"); --=20 2.43.0