From nobody Fri Sep 25 07:56:00 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC09E47F3B2; Tue, 15 Sep 2026 10:27:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468029; cv=none; b=pYy7qO3d41mjo0FqFjwzc+ewgHfEgz2Uaz6jKwSj7/UMUwBY/10uJTOmIX/W0M6MpbidtHzYmeEf1XUXRFJYBOYra5lAeltI61UxLZ57LuBu5ebcMZVxhgXR1i/DpK8cX/7BjYAupX5tlioe+c4dalGwucnS8Ti14PDb+09awrY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468029; c=relaxed/simple; bh=RVBh2IvuMYYeMSffuMEUJG/Elo1pXdYmWihhIAlmmnM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TsZaTB0LExCvdZMhbUPFlw00CkNqFaIY2HJTmrgdhMuJt3a0NoiW5qYIjR4ROV7rVtLQuuX07b7egwUZFw3LFBlhdvNwgP+4n+lxaSt5JDCJas2c6sGAnrYVtinLKUHRPsaFydWegOCd0VBrXbIgf2W69aMzgIHhellgrEVo/Us= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=buI2Q1zA; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="buI2Q1zA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789468028; x=1821004028; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RVBh2IvuMYYeMSffuMEUJG/Elo1pXdYmWihhIAlmmnM=; b=buI2Q1zANrFdP9EPEJRf/hOOCBSyS2f/zq8xwAptpR4evO8DTu3EIrEP Rh5ByPFMAAfpuS6i0LNBejBOlsHj2aP1tJbRaqjHJqV4Pto3FAN7DXmye TNbAUaCVziZglZShUp0yBjg46X+wePh2bo+IWvnyJ/0PC//Lx1tJIoO/C 0ZQ0NxYktfzCE6r6dLodd5EyHWD1CPMkc/IR8FFRf2/Ufl8ak532vsMAh w8zaFkyYfkyLrFGhz5DasUmF3B4LTDo9ZSxiyDYPT3hNUudzzxcR+udyO P/wijFx/Vcik1HeMndSc0lAvVnTYpgRdj4+Sy/4CU/SMmIfadNjAMYxbc A==; X-CSE-ConnectionGUID: kVBAg31JSmqxN4c6T6Twgg== X-CSE-MsgGUID: rntDAirHRreP3njNXZwVrw== X-IronPort-AV: E=McAfee;i="6800,10657,11905"; a="115362194" X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="115362194" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2026 03:27:08 -0700 X-CSE-ConnectionGUID: 1XYfA3p6TIC1VsFfIUG7mA== X-CSE-MsgGUID: BDG/SmmTRvap5Qad5mNAfA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="277083976" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.47.46]) by orviesa005.jf.intel.com with ESMTP; 15 Sep 2026 03:27:03 -0700 From: Xu Yilun To: x86@kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Cc: kas@kernel.org, rick.p.edgecombe@intel.com, yilun.xu@intel.com, yilun.xu@linux.intel.com, xiaoyao.li@intel.com, sohil.mehta@intel.com, adrian.hunter@intel.com, kishen.maloor@intel.com, tony.lindgren@linux.intel.com, peter.fang@intel.com, baolu.lu@linux.intel.com, zhenzhong.duan@intel.com, chao.gao@intel.com, artem.bityutskiy@linux.intel.com, kvm@vger.kernel.org, nik.borisov@suse.com Subject: [PATCH v2 1/5] x86/virt/tdx: Move TDH.SYS.CONFIG operations into a wrapper Date: Tue, 15 Sep 2026 18:26:54 +0800 Message-Id: <20260915102658.713079-2-yilun.xu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260915102658.713079-1-yilun.xu@linux.intel.com> References: <20260915102658.713079-1-yilun.xu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In Linux, SEAMCALL wrappers are introduced to avoid broad SEAMCALL access by exposing only a selection of SEAMCALL leafs, but also to abstract the SEAMCALL register ABIs. The latter improves readability and reuse for SEAMCALL leafs that are called multiple times. Some SEAMCALL leafs are not explicitly wrapped because the level of TDX ABI details needed to perform the call is low enough to flow well with the calling code. For some of the currently unwrapped SEAMCALL leafs, TDX architecture adjusts the ABI and adds SEAMCALL version selection for backward compatibility. Future kernel will need to support the changes. This will leak more ABI details into the surrounding caller code and decrease readability of the other logic. To keep the ABI details contained, move the SEAMCALL leafs that will need version selection into wrappers. The cleanest separation would be to have kernel data types for the SEAMCALL wrapper arguments, and have them marshaled into SEAMCALL leaf ABI types (often u64s) inside the wrapper. This works for many SEAMCALL leafs but becomes cumbersome when the register ABI type is a physical address which points to a buffer for an in-memory ABI. If the SEAMCALL wrapper only accepts kernel data types, it may need duplicate buffer allocation and copies to match the in-memory ABI. Another solution is to define a named helper structure that mirrors the in-memory ABI, populate it in a separate flow, then pass it to the SEAMCALL wrapper. struct seamldr_params is an existing example of this pattern. TDH.SYS.CONFIG requires a list of TDMR information in the form of a PA array. The PA array is the in-memory ABI. Create a structure for the PA array, use it as the argument when creating the wrapper for TDH.SYS.CONFIG. Signed-off-by: Xu Yilun Reviewed-by: Nikolay Borisov Reviewed-by: Tony Lindgren --- v2: - Remove TDH.SYS.UPDATE wrapper (Dave & Rick) - Talk about the handling of in-memory ABIs for SEAMCALL wrappers (Rick) - Refactor the entire changelog according to Rick's suggestion (Rick) - Add code comment for struct tdmr_info_pa_array (AI nitpicker) - Use kernel data type for nr_tdmr_pa parameter (AI nitpicker) v1: - This patch is split out from the last series (Rick) --- arch/x86/virt/vmx/tdx/tdx.c | 34 +++++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index 1668f8615607..e06932f80395 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -998,11 +998,33 @@ static __init int construct_tdmrs(struct list_head *t= mb_list, return ret; } =20 +/* + * This is an array of HPAs, each points to a TDMR_INFO data structure (see + * struct tdmr_info). + * + * It is the in-memory ABI that the kernel passes to the TDX module to spe= cify + * the ranges of TD Memory Regions (TDMRs) and their associated PAMT memor= y. + */ +struct tdmr_info_pa_array { + DECLARE_FLEX_ARRAY(u64, phys); +}; + +static __init int tdx_sys_config(struct tdmr_info_pa_array *tdmr_pa_array, + unsigned int nr_tdmr_pa, u64 global_keyid) +{ + struct tdx_module_args args =3D { + .rcx =3D __pa(tdmr_pa_array), + .rdx =3D nr_tdmr_pa, + .r8 =3D global_keyid, + }; + + return seamcall_prerr(TDH_SYS_CONFIG, &args); +} + static __init int config_tdx_module(struct tdmr_info_list *tdmr_list, u64 global_keyid) { - struct tdx_module_args args =3D {}; - u64 *tdmr_pa_array; + struct tdmr_info_pa_array *tdmr_pa_array; size_t array_sz; int i, ret; =20 @@ -1021,12 +1043,10 @@ static __init int config_tdx_module(struct tdmr_inf= o_list *tdmr_list, return -ENOMEM; =20 for (i =3D 0; i < tdmr_list->nr_consumed_tdmrs; i++) - tdmr_pa_array[i] =3D __pa(tdmr_entry(tdmr_list, i)); + tdmr_pa_array->phys[i] =3D __pa(tdmr_entry(tdmr_list, i)); =20 - args.rcx =3D __pa(tdmr_pa_array); - args.rdx =3D tdmr_list->nr_consumed_tdmrs; - args.r8 =3D global_keyid; - ret =3D seamcall_prerr(TDH_SYS_CONFIG, &args); + ret =3D tdx_sys_config(tdmr_pa_array, tdmr_list->nr_consumed_tdmrs, + global_keyid); =20 /* Free the array as it is not required anymore. */ kfree(tdmr_pa_array); --=20 2.25.1 From nobody Fri Sep 25 07:56:00 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A6E1480357; Tue, 15 Sep 2026 10:27:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468033; cv=none; b=Y7sgrRPMLQzc8a8Phlp1oqYDHaOFT/C9/5jjyWSvicCKAU9zjP6wNDc1iYKQJXqXozMLjNzXqlHTI29IXGCzlnvAB7m4P+iQhAHu6X0sXlhLPZf4dWYnSOkLmbHd7osmjCnbt4+a+uJHpxqob5ZS50au0de0ilEyae7bT6/L1sY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468033; c=relaxed/simple; bh=bp+z2jdgbjJpVOGjoCjP1FdJENz9rAxFgp9vAKK+8eM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=pxEyERjtnh7M5P9OrGu2hVzM42VxICdaPtg3PaIc6FdtJGHao//AKHhZZUO8l0ObPaJC+G3Gk3T1uImRNyggmBFWy9t2pQKeEdhZY6fdzsbZpcW+ldxy5ImKQk/8QlunWY5pkEXe99jQ0HpKXGbXUoWGZRuAkzjFDCPDHhJvPzs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ByiMAkRb; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ByiMAkRb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789468032; x=1821004032; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bp+z2jdgbjJpVOGjoCjP1FdJENz9rAxFgp9vAKK+8eM=; b=ByiMAkRbijI3JYoaDcNSxgNY1uwrPlHQOuJ7TyHVpt4wBp/o+upLj7vw JHTUvhxWyCh0fTcYjS4yu9pY4LBf67r/nEK9iEgX+R7daF6MM7RiHrK2J pjew8qR1THSdXorxC817pXCpV29GmGbMPdcyLIw/JQ/fXc0uus7+rZGE+ R6+1rcmztsq/s2+WrhanhqQub4QDIWR9V7PwRXffLg/OMZSCJBV/MfQzK AMjzXWdrEMo/AhDJSuLQiGxpz7XIA5Ii4FJopEmq5Oj2ov2ke7vcURvmE B6BQq0ou9Qc2cfp21j1Oi36l48ngkIweVQ7Jo5rGnA6YT8+Ji9EGdMYLE g==; X-CSE-ConnectionGUID: dxG0hX8SQx6yF/zzPzeYRA== X-CSE-MsgGUID: hJXPRnneTdWEO47bTwRtCw== X-IronPort-AV: E=McAfee;i="6800,10657,11905"; a="115362202" X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="115362202" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2026 03:27:12 -0700 X-CSE-ConnectionGUID: X/px7hbeTIinkAJf5rUFZg== X-CSE-MsgGUID: 5S+KW7TSSRSA/zMaeAqPyg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="277084267" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.47.46]) by orviesa005.jf.intel.com with ESMTP; 15 Sep 2026 03:27:08 -0700 From: Xu Yilun To: x86@kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Cc: kas@kernel.org, rick.p.edgecombe@intel.com, yilun.xu@intel.com, yilun.xu@linux.intel.com, xiaoyao.li@intel.com, sohil.mehta@intel.com, adrian.hunter@intel.com, kishen.maloor@intel.com, tony.lindgren@linux.intel.com, peter.fang@intel.com, baolu.lu@linux.intel.com, zhenzhong.duan@intel.com, chao.gao@intel.com, artem.bityutskiy@linux.intel.com, kvm@vger.kernel.org, nik.borisov@suse.com Subject: [PATCH v2 2/5] x86/virt/tdx: Configure add-on features on TDX module init Date: Tue, 15 Sep 2026 18:26:55 +0800 Message-Id: <20260915102658.713079-3-yilun.xu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260915102658.713079-1-yilun.xu@linux.intel.com> References: <20260915102658.713079-1-yilun.xu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TDX architecture identifies some features that are off by default but can be enabled by the host during TDX module initialization. They are classified as add-on features because enabling them affects existing TDX systems: they may change existing feature behavior, or reserve more memory. The TDX module extends TDH.SYS.CONFIG with a new register argument to specify which add-on features to enable. This new argument is a bitmap that uses the same feature bits as TDX_FEATURES0. Note that Dynamic PAMT is an exception: although it is an add-on feature, it is controlled via a legacy, dedicated register argument [1]. The kernel needs to enable these add-on features when it supports them. Add a get_tdx_addon_features0() helper to return the bitmap of the add-on features that the module & kernel both support. Initially, this helper returns 0. It will be updated to return specific feature bits as full kernel support lands. Pass this extra bitmap to TDH.SYS.CONFIG wrapper. The TDX module requires SEAMCALL leaf version 1 for TDH.SYS.CONFIG when passing the new bitmap argument. A previous change [2] supports the versioned SEAMCALL leafs by adding a "version" field in struct tdx_module_args. Set the version field to 1 if the new bitmap argument is used to enable any add-on feature, otherwise keep the version as 0. This retains backward compatibility with older modules that don't recognize version 1. Signed-off-by: Xu Yilun Link: https://lore.kernel.org/all/20260904215841.303070-10-rick.p.edgecombe= @intel.com/ # [1] Link: https://lore.kernel.org/all/20260722084634.131020-1-yilun.xu@linux.in= tel.com/ # [2] Reviewed-by: Tony Lindgren --- v2: - Don't pass addon_features0 parameter around, get it in the wrappers (Dave) - Remove TDH.SYS.UPDATE wrapper (Dave & Rick) - Drop the changelog section explaining why add-on feature enabling is needed in this series, as it is a generally understood pattern (Rick) - Add a note in the changelog that Dynamic PAMT is not enabled via the new bitmap argument (Rick) - Add __init tag for get_tdx_addon_features0() (AI nitpicker) v1: - Use tdx_module_args.version to assign SEAMCALL leaf versions (Dave) - Remove DICE specific descriptions (Rick) - Remove the global var tdx_addon_features0 (Chao) - Add a Macro to collect kernel supported add-on feature bits (Rick) - Changelog & code comments change --- arch/x86/virt/vmx/tdx/tdx.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index e06932f80395..763c2d1b25d0 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -998,6 +998,15 @@ static __init int construct_tdmrs(struct list_head *tm= b_list, return ret; } =20 +/* List all kernel supported add-on features0 bits here */ +#define TDX_KERNEL_SUPPORTED_ADDON_FEATURES0 (0) + +static __init u64 get_tdx_addon_features0(void) +{ + return tdx_sysinfo.features.tdx_features0 & + TDX_KERNEL_SUPPORTED_ADDON_FEATURES0; +} + /* * This is an array of HPAs, each points to a TDMR_INFO data structure (see * struct tdmr_info). @@ -1012,12 +1021,22 @@ struct tdmr_info_pa_array { static __init int tdx_sys_config(struct tdmr_info_pa_array *tdmr_pa_array, unsigned int nr_tdmr_pa, u64 global_keyid) { + u64 addon_features0 =3D get_tdx_addon_features0(); struct tdx_module_args args =3D { .rcx =3D __pa(tdmr_pa_array), .rdx =3D nr_tdmr_pa, .r8 =3D global_keyid, }; =20 + /* + * Use SEAMCALL version 1 that supports add-on features if any are + * requested. Otherwise use version 0 for backward compatibility. + */ + if (addon_features0) { + args.r9 =3D addon_features0; + args.version =3D 1; + } + return seamcall_prerr(TDH_SYS_CONFIG, &args); } =20 --=20 2.25.1 From nobody Fri Sep 25 07:56:00 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0692447F2EC; Tue, 15 Sep 2026 10:27:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468038; cv=none; b=nQGtwi42UkbYmPmubU1PP0LeVn2HqaIEcI/aywOLEISTZw9bWSX46eaCShjvt91dXfeHkktjJpPXHKHHuq0QFydlRMjAlsSc6E+jKSPo0083qu8IuwLO0n9K4cXgoz3K6Y5/Zp99c8AZMtY7an4fmSlnV2upLd60sKIzRK3zSkQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468038; c=relaxed/simple; bh=nP8BZ9AatjsrdEHIZquzeLObCgAhMe7SGqN8po4FtVk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=UX3jLmXKcgFlhQrCq9qTm7iuRxH16/3mVVNxxn6PAJVoR3uMtWNgrdKi784aSiWG3+RjuyqTPmVILOA6FTWTYNHRl6/TeljBsAzGNE8nUzDYKHh+VaaAeYgyRGKS0mHcb+hSCKwbKdHjcUuV026dWK3Ym+8hGnOg0EDkpKhCsMQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ANKt3W25; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ANKt3W25" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789468037; x=1821004037; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nP8BZ9AatjsrdEHIZquzeLObCgAhMe7SGqN8po4FtVk=; b=ANKt3W25vhIWVGRt89Up1S55fgGhZWwCVsDamJinqS5EOf1MoJ+ElErb 3z6UaD/UbXa2l7WOLbgb1sD2smHVX4V7EhZwvZ2NbKzkrd8lA7pgjHpqL Rjj1a8BftLSCTpG3pKxqIvRBBuMQn/gSXQMR4w3hNuMLQRBZTqlIMWiow H2oNSrBMhL7vUrcQasGvrRS7hm+MogX1/X/ZLtUdmN1GKwHjtX4YhVlau gWLQ4xJuFIrf+EniimFOYdXj+Hsdkf5o6SvoHGZ08bx3iCjwj5fIRU9v3 N+N3wNtzOe+DgVxcw4gVyWThbyz1Ssyx1unyTxmtsE4ZFdMYCbSmAf2Oe w==; X-CSE-ConnectionGUID: +dRr+b9rT8C+Y/P/c3bhQw== X-CSE-MsgGUID: z85sJshuTxeR29yYqbTOxw== X-IronPort-AV: E=McAfee;i="6800,10657,11905"; a="115362208" X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="115362208" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2026 03:27:17 -0700 X-CSE-ConnectionGUID: 4aNstXjRTHaHYaUpGyb5ng== X-CSE-MsgGUID: DC7Th9CkRUSGZnZj2Q6Qaw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="277084649" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.47.46]) by orviesa005.jf.intel.com with ESMTP; 15 Sep 2026 03:27:12 -0700 From: Xu Yilun To: x86@kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Cc: kas@kernel.org, rick.p.edgecombe@intel.com, yilun.xu@intel.com, yilun.xu@linux.intel.com, xiaoyao.li@intel.com, sohil.mehta@intel.com, adrian.hunter@intel.com, kishen.maloor@intel.com, tony.lindgren@linux.intel.com, peter.fang@intel.com, baolu.lu@linux.intel.com, zhenzhong.duan@intel.com, chao.gao@intel.com, artem.bityutskiy@linux.intel.com, kvm@vger.kernel.org, nik.borisov@suse.com Subject: [PATCH v2 3/5] x86/virt/tdx: Detect if the extensions initialization is required Date: Tue, 15 Sep 2026 18:26:56 +0800 Message-Id: <20260915102658.713079-4-yilun.xu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260915102658.713079-1-yilun.xu@linux.intel.com> References: <20260915102658.713079-1-yilun.xu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some add-on features require TDX module extensions. The TDX module provides a metadata field "ext_required" to indicate this requirement. Add the first step of TDX module extensions initialization by detecting if the extensions are required: 1. Check if the extensions are supported via TDX_FEATURES0_EXT. If not, ext_required is not readable. 2. Check if any TDX feature needs the extensions via ext_required. Skip the extensions initialization when it is not required. Currently all metadata fields are read at the very beginning of TDX module initialization. However, ext_required is only valid after the add-on feature configuration, so it cannot use the existing metadata reading method. Add a dedicated metadata reading interface for the extensions, call it after add-on feature configuration. Signed-off-by: Xu Yilun Reviewed-by: Tony Lindgren --- v1: - Include struct tdx_sys_info_ext in struct tdx_sys_info. --- arch/x86/include/asm/tdx.h | 1 + arch/x86/include/asm/tdx_global_metadata.h | 5 ++++ arch/x86/virt/vmx/tdx/tdx.c | 28 +++++++++++++++++++++ arch/x86/virt/vmx/tdx/tdx_global_metadata.c | 14 +++++++++++ 4 files changed, 48 insertions(+) diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h index 89e97d5761d8..6657f2db0330 100644 --- a/arch/x86/include/asm/tdx.h +++ b/arch/x86/include/asm/tdx.h @@ -36,6 +36,7 @@ /* Bit definitions of TDX_FEATURES0 metadata field */ #define TDX_FEATURES0_TD_PRESERVING BIT_ULL(1) #define TDX_FEATURES0_NO_RBP_MOD BIT_ULL(18) +#define TDX_FEATURES0_EXT BIT_ULL(39) =20 #ifndef __ASSEMBLER__ =20 diff --git a/arch/x86/include/asm/tdx_global_metadata.h b/arch/x86/include/= asm/tdx_global_metadata.h index 41150d546589..fe3fe91de71f 100644 --- a/arch/x86/include/asm/tdx_global_metadata.h +++ b/arch/x86/include/asm/tdx_global_metadata.h @@ -44,12 +44,17 @@ struct tdx_sys_info_handoff { u16 module_hv; }; =20 +struct tdx_sys_info_ext { + bool ext_required; +}; + struct tdx_sys_info { struct tdx_sys_info_version version; struct tdx_sys_info_features features; struct tdx_sys_info_tdmr tdmr; struct tdx_sys_info_td_ctrl td_ctrl; struct tdx_sys_info_td_conf td_conf; + struct tdx_sys_info_ext ext; }; =20 #endif diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index 763c2d1b25d0..916a8906da10 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -1181,6 +1181,30 @@ static __init int init_tdmrs(struct tdmr_info_list *= tdmr_list) return 0; } =20 +static __init int init_tdx_module_extensions(void) +{ + int ret; + + if (!(tdx_sysinfo.features.tdx_features0 & TDX_FEATURES0_EXT)) + return 0; + + ret =3D get_tdx_sys_info_ext(&tdx_sysinfo.ext); + if (ret) + return ret; + + /* + * ext_required indicates if any add-on features requiring TDX module + * extensions are configured via TDH.SYS.CONFIG. If none, skip the + * initialization. + */ + if (!tdx_sysinfo.ext.ext_required) + return 0; + + /* TODO: add the extensions enabling steps here */ + + return 0; +} + static __init int init_tdx_module(void) { int ret; @@ -1235,6 +1259,10 @@ static __init int init_tdx_module(void) if (ret) goto err_reset_pamts; =20 + ret =3D init_tdx_module_extensions(); + if (ret) + goto err_reset_pamts; + pr_info("%lu KB allocated for PAMT\n", tdmrs_count_pamt_kb(&tdx_tdmr_list= )); =20 out_put_tdxmem: diff --git a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c b/arch/x86/virt/vm= x/tdx/tdx_global_metadata.c index e49c300f23d4..b9e1c011a990 100644 --- a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c +++ b/arch/x86/virt/vmx/tdx/tdx_global_metadata.c @@ -131,3 +131,17 @@ static __init int get_tdx_sys_info(struct tdx_sys_info= *sysinfo) =20 return ret; } + +static __init int get_tdx_sys_info_ext(struct tdx_sys_info_ext *sysinfo_ex= t) +{ + int ret; + u64 val; + + ret =3D read_sys_metadata_field(0x3100000000000001, &val); + if (ret) + return ret; + + sysinfo_ext->ext_required =3D val; + + return 0; +} --=20 2.25.1 From nobody Fri Sep 25 07:56:00 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B85C54825BB; Tue, 15 Sep 2026 10:27:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468043; cv=none; b=Q9vxxx81EDayLcuojaGGrmkiop4Tkx7OERxCpy38HHscdxoOZdUju3aNwPZxnrRIx6RlOCVjI3QMF3mLWlQBMXzKhKGsXRwZkOU0mQQQJd/Ckh/G3WSnh9qNFyeF7dCMOzRkukoNwWyscQw1aCWJuqP+26wUU0oVSF1C7Jn3new= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468043; c=relaxed/simple; bh=P2H8tUzECI0ckjNinn5jyVtMeJ4bCmFkHUpj99LrkdM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=OLyA+/BIGvzaYJMouvCMx7tSFC9XDHD5s0tbcQ+e8dT6N9FQHFWdtVV9UZwq6kD2Gsz/F47h5fgaiV6ODNlHEjvRHY1hFnWW+U0raPJaJEM3rEN5fHRJGKkCzeurmLoxJ/iGjTSYYePpp3HNBPNDaTCbVM4YtFXwK8L16iHP8jU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JgW5Y3QA; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JgW5Y3QA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789468042; x=1821004042; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=P2H8tUzECI0ckjNinn5jyVtMeJ4bCmFkHUpj99LrkdM=; b=JgW5Y3QAR0scuqoSRNHaGJMZInvSIkL3osxzmKe35wHPBxTsN3Dxyz9H yTtHDh+FhcXPS5M9whpOxnl5Rhq5KmXXMnS6wsIKz2pVhD080JenSoLRR d73I5IDZlojUAAyJ6WqmrxU2fX6O2PO9fQXfNzK5qcsFglxQpqaPjuyJ+ MjLL5oYU3gSdW+EGtTH5N/cdb0K5sznn5sQguYQlhz8oItAMm0gWrWB3J hg0LfTb8wjF45qgD0+B/zAszAtonWL5dsGSZpTpca1RYZkBM0sIQTsnKg u662Wwf6q67Mw0B+X+14tXmn+EdT4UDUPV5Xghgq0z2svkdZVRUkVilO1 A==; X-CSE-ConnectionGUID: S61bBnHTQsSlld4SZ6HEMA== X-CSE-MsgGUID: qCHgn7pQQ1+e4IeeNLp4QA== X-IronPort-AV: E=McAfee;i="6800,10657,11905"; a="115362214" X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="115362214" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2026 03:27:21 -0700 X-CSE-ConnectionGUID: fTrfqiLoRh2GsiNoAkwYQg== X-CSE-MsgGUID: HKVDmVAwTIyaoa4t/BW9Og== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="277085006" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.47.46]) by orviesa005.jf.intel.com with ESMTP; 15 Sep 2026 03:27:17 -0700 From: Xu Yilun To: x86@kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Cc: kas@kernel.org, rick.p.edgecombe@intel.com, yilun.xu@intel.com, yilun.xu@linux.intel.com, xiaoyao.li@intel.com, sohil.mehta@intel.com, adrian.hunter@intel.com, kishen.maloor@intel.com, tony.lindgren@linux.intel.com, peter.fang@intel.com, baolu.lu@linux.intel.com, zhenzhong.duan@intel.com, chao.gao@intel.com, artem.bityutskiy@linux.intel.com, kvm@vger.kernel.org, nik.borisov@suse.com Subject: [PATCH v2 4/5] x86/virt/tdx: Add extra memory to TDX module for the extensions Date: Tue, 15 Sep 2026 18:26:57 +0800 Message-Id: <20260915102658.713079-5-yilun.xu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260915102658.713079-1-yilun.xu@linux.intel.com> References: <20260915102658.713079-1-yilun.xu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" TDX module extensions need memory for their execution environment to serve SEAMCALL leafs. The TDX architecture implements the extensions in such a way that they use the memory outside of SEAM range, so the kernel should add the memory upfront at initialization time. Introduce a new memory adding process backed by a new SEAMCALL leaf TDH.EXT.MEM.ADD. The kernel queries TDX module how much memory needed, allocates it, add it to the module, and never gets it back. The TDX module accepts the memory in the form of an HPA array. This array is passed via a single 64-bit SEAMCALL leaf parameter, which encodes two values: the PFN of the container page holding the array, and the number of entries in the array. Create a helper to encode this format and name it after the TDX module term: HPA_LIST_INFO. TDX module extensions consume tens of megabytes memory that will never be returned to the host. Use contiguous page allocation to isolate these large blocks entirely. This is a simple way to avoid permanent memory fragmentation: requiring the full size to be contiguous is more expensive than needed but should be good during the boot time. Print the allocation amount on TDX module extensions initialization for visibility. Signed-off-by: Xu Yilun Reviewed-by: Tony Lindgren --- An alternative solution is to use a loop that gives memory on a memory error code - TDX_EXT_MEMORY_POOL_REQUIRED, add one page per iteration until TDH.EXT.INIT succeeds. Something like: do { ret =3D tdh_sys_init(); if (ret =3D=3D TDX_EXT_MEMORY_POOL_REQUIRED) tdh_ext_mem_add(); //single page } while (ret =3D=3D TDX_EXT_MEMORY_POOL_REQUIRED); This approach is slightly simpler as we don't have to query the module for the total memory, no memory pre-allocation or segmentation math. But allocating a single 4K page per iteration may cause permanent memory fragmentation. v2: - Add code comments for container page allocation (Kiryl) - Adjust comments/changelog for contiguous allocation of extensions memory (Kiryl) - s/PFN array/HPA array in commit log (Kiryl) - State the alternative solution (Rick) - Add code comment for struct tdx_hpa_list v1: - Fix return value for SEAMCALL wrappers (Chao) - Print SEAMCALL error code for SEAMCALL wrappers (Xiaoyao) - Rename local vars to make the ext memory adding loop clear (Rick) - Remove input parameters for tdx_ext_mem_setup() (Kevin) - Add a Macro for tdh_hpa_list size. - Change the SEAMALL wrapper parameter type, struct page *hpa_list =3D> struct tdx_hpa_list *hpa_list - changelog & code comments --- arch/x86/include/asm/tdx_global_metadata.h | 1 + arch/x86/virt/vmx/tdx/tdx.h | 1 + arch/x86/virt/vmx/tdx/tdx.c | 134 +++++++++++++++++++- arch/x86/virt/vmx/tdx/tdx_global_metadata.c | 6 + 4 files changed, 139 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/tdx_global_metadata.h b/arch/x86/include/= asm/tdx_global_metadata.h index fe3fe91de71f..43b8761c0854 100644 --- a/arch/x86/include/asm/tdx_global_metadata.h +++ b/arch/x86/include/asm/tdx_global_metadata.h @@ -45,6 +45,7 @@ struct tdx_sys_info_handoff { }; =20 struct tdx_sys_info_ext { + u32 memory_pool_required_pages; bool ext_required; }; =20 diff --git a/arch/x86/virt/vmx/tdx/tdx.h b/arch/x86/virt/vmx/tdx/tdx.h index 63e3acfb5d0c..52888424fe7d 100644 --- a/arch/x86/virt/vmx/tdx/tdx.h +++ b/arch/x86/virt/vmx/tdx/tdx.h @@ -48,6 +48,7 @@ #define TDH_SYS_CONFIG 45 #define TDH_SYS_SHUTDOWN 52 #define TDH_SYS_UPDATE 53 +#define TDH_EXT_MEM_ADD 61 #define TDH_SYS_DISABLE 69 =20 /* TDX page types */ diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index 916a8906da10..3cdc5ba8e2ad 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -1181,6 +1181,136 @@ static __init int init_tdmrs(struct tdmr_info_list = *tdmr_list) return 0; } =20 +#define TDX_HPA_LIST_MAX_NR_PAGES (PAGE_SIZE / sizeof(u64)) + +/* + * This is the "HPA_LIST" data structure defined in the "Intel TDX Module = ABI + * Specification". + * + * It is the in-memory ABI that the kernel uses to add memory to the TDX + * module. + */ +struct tdx_hpa_list { + u64 phys[TDX_HPA_LIST_MAX_NR_PAGES]; +}; + +static_assert(sizeof(struct tdx_hpa_list) =3D=3D PAGE_SIZE); + +#define HPA_LIST_INFO_FIRST_ENTRY GENMASK_U64(11, 3) +#define HPA_LIST_INFO_PFN GENMASK_U64(51, 12) +#define HPA_LIST_INFO_LAST_ENTRY GENMASK_U64(63, 55) + +static __init u64 to_hpa_list_info(struct tdx_hpa_list *hpa_list, + unsigned int nr_pages) +{ + return FIELD_PREP(HPA_LIST_INFO_FIRST_ENTRY, 0) | + FIELD_PREP(HPA_LIST_INFO_PFN, PFN_DOWN(__pa(hpa_list))) | + FIELD_PREP(HPA_LIST_INFO_LAST_ENTRY, nr_pages - 1); +} + +static __init int tdx_ext_mem_add(struct tdx_hpa_list *hpa_list, + unsigned int nr_pages) +{ + struct tdx_module_args args =3D { + .rcx =3D to_hpa_list_info(hpa_list, nr_pages), + }; + u64 ret; + + do { + /* + * The TDX module overwrites RCX to track progress when this + * SEAMCALL leaf is interrupted. Use seamcall_ret() to save and + * pass the updated value back on retry. + */ + ret =3D seamcall_ret(TDH_EXT_MEM_ADD, &args); + } while (ret =3D=3D TDX_INTERRUPTED_RESUMABLE); + + if (ret !=3D TDX_SUCCESS) { + pr_err("TDH.EXT.MEM.ADD failed: 0x%016llx\n", ret); + return -EIO; + } + + return 0; +} + +static __init int tdx_ext_mem_setup(void) +{ + unsigned int required_pages =3D tdx_sysinfo.ext.memory_pool_required_page= s; + struct tdx_hpa_list *hpa_list; + unsigned int added_pages; + struct page *page; + int ret; + + /* + * TDX module uses the metadata memory_pool_required_pages to indicate + * how much memory is still needed. This value decreases each time + * memory is added via TDH.EXT.MEM.ADD. + * + * On first time initialization, a value of 0 before any memory is + * added is unusual. But host makes no assumptions. Skip the memory + * setup and let subsequent steps catch any actual errors. + */ + if (!required_pages) + return 0; + + /* + * Allocate the container page for the HPA_LIST. tdx_hpa_list is + * guaranteed to be page-sized by static_assert(), so kzalloc() + * guarantees the page alignment. + */ + hpa_list =3D kzalloc_obj(*hpa_list); + if (!hpa_list) + return -ENOMEM; + + /* + * Memory for TDX module extensions is never reclaimed and can be tens + * of megabytes. Allocating a physically contiguous chunk is a simple + * way to avoid permanent memory fragmentation: requiring the full size + * to be contiguous is more expensive than needed but should be good + * during the boot time. + */ + page =3D alloc_contig_pages(required_pages, GFP_KERNEL, numa_mem_id(), + &node_online_map); + if (!page) { + ret =3D -ENOMEM; + goto out_free_hpa_list; + } + + added_pages =3D 0; + while (added_pages < required_pages) { + unsigned int chunk_pages =3D min(required_pages - added_pages, + TDX_HPA_LIST_MAX_NR_PAGES); + struct page *chunk =3D page + added_pages; + unsigned int i; + + for (i =3D 0; i < chunk_pages; i++) + hpa_list->phys[i] =3D page_to_phys(chunk + i); + + ret =3D tdx_ext_mem_add(hpa_list, chunk_pages); + if (ret) { + /* + * This SEAMCALL leaf shouldn't fail, and if it does, + * things are broken enough that complex error handling + * isn't worth it. Intentionally leak all pages, + * including un-added pages. + */ + WARN(1, "Fatal: TDX module rejected memory for extensions, stranded all= pages\n"); + break; + } + + added_pages +=3D chunk_pages; + } + + /* Print the amount so users know the cost. */ + pr_info("%lu KB allocated for TDX module extensions\n", + required_pages * PAGE_SIZE / 1024); + +out_free_hpa_list: + kfree(hpa_list); + + return ret; +} + static __init int init_tdx_module_extensions(void) { int ret; @@ -1200,9 +1330,7 @@ static __init int init_tdx_module_extensions(void) if (!tdx_sysinfo.ext.ext_required) return 0; =20 - /* TODO: add the extensions enabling steps here */ - - return 0; + return tdx_ext_mem_setup(); } =20 static __init int init_tdx_module(void) diff --git a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c b/arch/x86/virt/vm= x/tdx/tdx_global_metadata.c index b9e1c011a990..720cdaf76492 100644 --- a/arch/x86/virt/vmx/tdx/tdx_global_metadata.c +++ b/arch/x86/virt/vmx/tdx/tdx_global_metadata.c @@ -137,6 +137,12 @@ static __init int get_tdx_sys_info_ext(struct tdx_sys_= info_ext *sysinfo_ext) int ret; u64 val; =20 + ret =3D read_sys_metadata_field(0x3100000200000000, &val); + if (ret) + return ret; + + sysinfo_ext->memory_pool_required_pages =3D val; + ret =3D read_sys_metadata_field(0x3100000000000001, &val); if (ret) return ret; --=20 2.25.1 From nobody Fri Sep 25 07:56:00 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8FE5E47FAF7; Tue, 15 Sep 2026 10:27:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468048; cv=none; b=pejueU3S2s3Yq4Sq1sNuS8BvQK3k9PEz7xOTMh7r3AdmgG8eMYVdtYsyn9WR00fG+yfn1Tb9KcW0D7XrzOo+0ZbQTv77gGN0gg8f3p4eg/CWJ0a9uoCvshqYC+KEX/t5yxZeHMDJXXDVSzq/xfLFM0yeRKvy9XkiG/U9Eo+jTa4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789468048; c=relaxed/simple; bh=Q5oJx8j/BEat4lOv1uqOd7HBNDZ++onw3m/mth5NeSM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=B/fHVhEDCzWWgCVy3Iw3c7q3kSeo+3BBB3xwmTQ3hsHJMJG6IOvDURk1AZ4lJCFNQbK4KCAqs9IAYWKpsClFdS3KH425rssMm4XAGuBOMxUBMDtRAKYRXTg6WWFXF4SsYGP4rOo59fRkhNSzV4tCi2VakBh45IQUQ7KPMDnEXeo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=VYNfKx92; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="VYNfKx92" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1789468047; x=1821004047; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Q5oJx8j/BEat4lOv1uqOd7HBNDZ++onw3m/mth5NeSM=; b=VYNfKx92ZQRE7whIhl0HIXlbrCXMsJRCW1mvlv5Wkd8iYsQmSy7qCGRk DKrKS9TaXdgkagsv7qh/Vl/Y6XN7tlpAAxt7eeN56gt+mRowk9TSNOupB QtfA1m9T9BJegRcx0nhsso+wOsItY42jEMW49xTaXTQshjmBiQMuWNgnK 0fv4uwOofnais+oPfozZzsikhWxAd4w4H533a+4UG3fMPQGCjmmkN1cuj qaotYVG5aLkm6jyFYH5muIyzUPJWD2RqHSXQLjJHAiMxOqO2rcUoFO24J LzHNANXe4zy9B2LC+i6tz+7TdnhZWOO8sdC6IQ5x8V3okOnp3dOhcUceW A==; X-CSE-ConnectionGUID: +IWhsaMHSUamn5RBXaD2ng== X-CSE-MsgGUID: VKMknzP9QdGnAR4+35xDiA== X-IronPort-AV: E=McAfee;i="6800,10657,11905"; a="115362218" X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="115362218" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2026 03:27:26 -0700 X-CSE-ConnectionGUID: lZT+1WUeR0K9tasPjvW2eQ== X-CSE-MsgGUID: OpDH6L2ZQCWzeH2RVThocg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.27,103,1787036400"; d="scan'208";a="277085341" Received: from yilunxu-optiplex-7050.sh.intel.com ([10.239.47.46]) by orviesa005.jf.intel.com with ESMTP; 15 Sep 2026 03:27:22 -0700 From: Xu Yilun To: x86@kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org Cc: kas@kernel.org, rick.p.edgecombe@intel.com, yilun.xu@intel.com, yilun.xu@linux.intel.com, xiaoyao.li@intel.com, sohil.mehta@intel.com, adrian.hunter@intel.com, kishen.maloor@intel.com, tony.lindgren@linux.intel.com, peter.fang@intel.com, baolu.lu@linux.intel.com, zhenzhong.duan@intel.com, chao.gao@intel.com, artem.bityutskiy@linux.intel.com, kvm@vger.kernel.org, nik.borisov@suse.com Subject: [PATCH v2 5/5] x86/virt/tdx: Make TDX module initialize the extensions Date: Tue, 15 Sep 2026 18:26:58 +0800 Message-Id: <20260915102658.713079-6-yilun.xu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260915102658.713079-1-yilun.xu@linux.intel.com> References: <20260915102658.713079-1-yilun.xu@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" TDX module extensions need memory for their execution environment to serve SEAMCALL leafs. Several add-on features depend on the extensions to execute their SEAMCALL leafs. After providing all required memory to the TDX module, initialize TDX module extensions via TDH.EXT.INIT, then those add-on features can use their SEAMCALL leafs normally. Signed-off-by: Xu Yilun Reviewed-by: Xiaoyao Li Reviewed-by: Tony Lindgren Reviewed-by: Adrian Hunter --- v1: - Fix return value for SEAMCALL wrappers (Chao) - Print SEAMCALL error code for SEAMCALL wrappers (Xiaoyao) - Changelog & code comments --- arch/x86/virt/vmx/tdx/tdx.h | 1 + arch/x86/virt/vmx/tdx/tdx.c | 23 ++++++++++++++++++++++- 2 files changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/x86/virt/vmx/tdx/tdx.h b/arch/x86/virt/vmx/tdx/tdx.h index 52888424fe7d..1f43d2eb2345 100644 --- a/arch/x86/virt/vmx/tdx/tdx.h +++ b/arch/x86/virt/vmx/tdx/tdx.h @@ -48,6 +48,7 @@ #define TDH_SYS_CONFIG 45 #define TDH_SYS_SHUTDOWN 52 #define TDH_SYS_UPDATE 53 +#define TDH_EXT_INIT 60 #define TDH_EXT_MEM_ADD 61 #define TDH_SYS_DISABLE 69 =20 diff --git a/arch/x86/virt/vmx/tdx/tdx.c b/arch/x86/virt/vmx/tdx/tdx.c index 3cdc5ba8e2ad..2d42191a56e6 100644 --- a/arch/x86/virt/vmx/tdx/tdx.c +++ b/arch/x86/virt/vmx/tdx/tdx.c @@ -1311,6 +1311,23 @@ static __init int tdx_ext_mem_setup(void) return ret; } =20 +static __init int tdx_ext_init(void) +{ + struct tdx_module_args args =3D {}; + u64 ret; + + do { + ret =3D seamcall(TDH_EXT_INIT, &args); + } while (ret =3D=3D TDX_INTERRUPTED_RESUMABLE); + + if (ret !=3D TDX_SUCCESS) { + pr_err("TDH.EXT.INIT failed: 0x%016llx\n", ret); + return -EIO; + } + + return 0; +} + static __init int init_tdx_module_extensions(void) { int ret; @@ -1330,7 +1347,11 @@ static __init int init_tdx_module_extensions(void) if (!tdx_sysinfo.ext.ext_required) return 0; =20 - return tdx_ext_mem_setup(); + ret =3D tdx_ext_mem_setup(); + if (ret) + return ret; + + return tdx_ext_init(); } =20 static __init int init_tdx_module(void) --=20 2.25.1