From nobody Fri Sep 25 12:05:54 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6F0A45D900 for ; Tue, 15 Sep 2026 07:16:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456591; cv=none; b=eOL1ZxecHVd0+XAJaHervroHWD7JtrtOO8eq6NrckAXAEpleXlKgQux6t4fzpXyUnmiM0Rs9xdROKsE08X1TolrZV/5xSwpPNJFPVsrlf5rLC5uIu+mRCql6xOQ2q7BD4TDizwooStDwTPSBeLRkNMpBpDvTCMB9EKvj/8kdAwI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456591; c=relaxed/simple; bh=g0000I+DC3GVL5uQMPqM8ZxRlBzHUYe2tmfWKb6JLfo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Ns0c+R5gUdSA4OF0yF6O3osAZjjqeBKbBMm2cxU0NLW0zmN2lN9dpOBFWwyKxk4xzAI2pK69EAAPvDhotBisxGh7Btmb88acKhQCCnHskVw45G+5YawyYNZNgsF61BOali33tyfWwZWOETaspxWEtJUOGrrfNXzAtTgra5xQ+Ns= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=IBc6+HsK; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=NcAeAYhT; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="IBc6+HsK"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="NcAeAYhT" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZOc31661451 for ; Tue, 15 Sep 2026 07:16:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= w8H+zzcJemHKwC42SEXR3fCJz082yfrkBm0HUs7XWSU=; b=IBc6+HsKihcEDmd5 ox8MGmbFbJrX8D8CBk0EN7QInqjeIzNUfqaSmKpBB0VINyiru9wAFL7JWhBWpXRp ptJx/fP5Zs/bCfBrIXk/pj3lhu8GJvTpqYYWtPhcjX8CQBG1ki5fXhqvVgXKnyHm 64VhbktvYuzd4YD/7TaqJo+tmSPFjLkE5rnqOgPry4aQdlJYUVdTF2p6rRAoCsiT Ul0iF3vdrtSxbgsCkVEINA5AJtmcx8CQChYzaz/58/xNBzKv5Pe+rnpwAvcPmmI4 KPMHU1QgTEpqcDSd1Jx2Io/6xb8YB0X+ykOn7302JvC7LZsHzXwX3FiujkJa6Y4b Lb9S7g== Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpergcg0f-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:16:26 +0000 (GMT) Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-cbedbd182f5so593651a12.1 for ; Tue, 15 Sep 2026 00:16:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456586; x=1790061386; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=w8H+zzcJemHKwC42SEXR3fCJz082yfrkBm0HUs7XWSU=; b=NcAeAYhTqwcDREz4uEsI1vmVPjwF4wZx5reS1NXGP5jBpgkxUCvXAslhiwrEo5xl97 S/rPVOaAd7GQU/Fdjv+XQT6eU2O3VDUAoOHGdTWQ1ScfOkmT+M1xkx2FgksCwoyupC+l 84cXH8iqNsB3aeQJ99vIb+UeFi7iDDe1ah+j9Rg9o0wC83D5a8JsV/SQn3nbGZ0KaAXl 6cLcX81hRhkI2Cf1QuozI8uUCKNs6I+qu3HojSGwR1nbx5riyc67twMLa6vHD1sQnU6L HLhPzGnDDEfxzHrbThsSoFy+Qt9XFoOnP4O6zb25plTwSqWu9EFOLu8nuz1mkNAqNfLL 0Orw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456586; x=1790061386; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=w8H+zzcJemHKwC42SEXR3fCJz082yfrkBm0HUs7XWSU=; b=p1juupMX404+b43LL0ziOhJQT7orpavCBJxLeVb18OQmdahmKvd3eVDVgP4DGCAo4b kZMsGe3N93LxZbN4XI10FpKluUTooAG1bVAcJLuz/cBv4HM2+TZdmmgRD76xcgI8QGU8 9BJ40cfedWCQe/zKRftpE9kc4m86N8f/6knnw9YY9HlhqhEiZX1wIJoLXolNKPF10W+n dMtI4PUE/AV9x3a+yc2FKTDUuvF2XpDZAYOnOcaABs762uv9rJfB0Lj2wgO7fGSWSgou zC49O9d6ZjIeV2W/se9iGTqJ2j+mQgwXjB9hfghUlf39i9BOeuxFV2tQbLYllqExy8Iz 7ZXQ== X-Forwarded-Encrypted: i=1; AKwUvByapdfTWV2MSEvy8LS7Sx/DOug30ibrZ0hfvybv7MblPAEZUypYSiR4R05vADesklwKrGepWnUEeUMJegE=@vger.kernel.org X-Gm-Message-State: AFuF++mZ1D+VPdXsVGKEckDme49CLS7Uzs8D4H6BqH+5BF3J8txAyFfg O3oUVrBkIEiypcfaxlguGCPToDXbsSRSFUmI2zKHvJZKbACVbEjaYdihO2grjCL4KJ6kwvoND/Q ZcEBXUHhF8ippRjNT1urxtfgUfgCyYcpxfy7QGuX0y3UFzyKraJlnUbyZjtH37U27d5o= X-Gm-Gg: AYBFou0mwv/1C+aQBC9/EPiPI4tqy3u6BvINwse+VJ9PxzZ+5Tr03/mUzTmobNBjJlD yI872lwr7xyShaixTPzD7CmsaUe3pECkffWm97FV8tnDfxFQbPDq2VxS9iGZ2h7UNLe+re5+Y/b q811AXAWYc4+5XbBUnO6rptJF/dL/80oVMHsfKrP8J8ftbZHJx8wQiXLrYafbXnuUn3z+PyUbSe yBnH8dYIson/ayzjCoWslRraccrl4PX5VEOHGJA7tNHTNkDpO0aiqNkqiiYiCYlFSkqVyKedtjv OjQU8De2etXyqNUTXMQ769n686M4ykcgpxMqGn0wc2cMrmHfszZ9glfI0QF2 X-Received: by 2002:a17:90a:1188:b0:39d:fea0:33f3 with SMTP id 98e67ed59e1d1-39dfea036c4mr1722365a91.2.1789456585797; Tue, 15 Sep 2026 00:16:25 -0700 (PDT) X-Received: by 2002:a17:90a:1188:b0:39d:fea0:33f3 with SMTP id 98e67ed59e1d1-39dfea036c4mr1722329a91.2.1789456585264; Tue, 15 Sep 2026 00:16:25 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.16.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:16:24 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:27 -0400 Subject: [PATCH v7 01/11] riscv: Add B to hwcap and hwprobe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-1-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Andrew Jones , Conor Dooley X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5564; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=79VdSxhAJWwAJ2I3+EjaPF/Oe48XuOikMy17edoXtOM=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVHzZ7XlB2klL+cJM5+EIBW9PrsE1vFgba1TX7HDfO/ P5rKp9uRykLgxgXg6yYIsvhoy3ZW1/5RPs+5/wBM4eVCWQIAxenAEzk7UWG/1mdh2ot/6ffa7pQ IX+wpW6q/JQHWqtefQj8kJ53pf/BzV8M/x2LuxmOXvzzt/NV7FSLvV8mqnS2fnd4++Xo1Ab/qxv MhBkB X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Authority-Analysis: v=2.4 cv=QK/91QLL c=1 sm=1 tr=0 ts=6aa8f0ca cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=XYAwZIGsAAAA:8 a=mioeM4dCHJ9OQqhfmfYA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 a=E8ToXWR_bxluHZ7gmE-Z:22 X-Proofpoint-GUID: WtrQDYp0uAV5Bpcc0yumCWvaDRaj3PH8 X-Proofpoint-ORIG-GUID: WtrQDYp0uAV5Bpcc0yumCWvaDRaj3PH8 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX62eX9tdrZ51l CULGHi7epiH2RAJhuxcvCMlZwwk5whH4xomih/q8RWkQSbEotD/BiGA7anlUoU3zAuPy3yRBR9n ZEQBkP8W4qf7GQH0IrFBmZWrSdiRyWrekKsfk57NZGQvGt7qtUHtoO9npFi5Ohgb+ZwxaiRQP/e nS4keUmZ0BXpHvKLaUaXxEcKL1QOzvt83Doo9NcIVm7ou/VUwOiWyeeKPXg8OI5kF0ZP+sLLOmt o49BlI+Kl6nIkzLVk1wuImUAArFgev0RKXMMekh+8blK/oT5ESfLPfmmQC1SC3kpjZPXvXhKJqf Oq10l4uDvyloJnSsxdtPuLqjjypr9Ee+OMlT3LQCzo73DEt1R22daHgBtqgKXozvUcXKbghZpCt a3iARiBhYPRgpr5PXYJbyQ9R8bW8zYjBelSAfrjRC5SLjPNfhjWaf6RAk2OqPkvX8h+XEuqHD2/ iUIr9q8BiYXm6CInTaw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX8Dn2MwpP5v5W 7EthJ2y+wAjQ6g2/0dFn6yAzJSnp2Ac0foxA6KPId4QTuZW7MSfqERmrlIG/Fhq62J2H4qIfkaa lZpuxWKb3xJq73eL3Ne2sPKLD4M964E= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 adultscore=0 bulkscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 From: Andrew Jones Add B to hwcap and ensure when B is present that Zba, Zbb, and Zbs are all set. Also expose B via hwprobe (RISCV_HWPROBE_EXT_B in RISCV_HWPROBE_KEY_IMA_EXT_1) so that userspace can probe B directly, mirroring the F/D/C/V pattern where each is reported via both hwcap and hwprobe. Reviewed-by: Conor Dooley Signed-off-by: Andrew Jones [Add B to hwprobe] Signed-off-by: Guodong Xu --- v7: No change. v6: Rebase onto riscv/for-next: define RISCV_HWPROBE_EXT_B in the _BITULL() style of commit 8da45c93dfa9. v5: Collected Reviewed-by from Conor Dooley. v4: No change. v3: - Indent the added hwprobe.rst entry to match the normalized style. - Rebased onto v7.1-rc6: index isa2hwcap[] via RISCV_ISA_EXT_B to match the macro-ization in commit 41337097f2823. v2: - Rebased to v7.1-rc2 - Add B to hwprobe (RISCV_HWPROBE_EXT_B at IMA_EXT_1 bit 6) and document it in hwprobe.rst, so userspace can probe B directly. --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/kernel/cpufeature.c | 8 ++++++++ arch/riscv/kernel/sys_hwprobe.c | 1 + 6 files changed, 16 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/risc= v/hwprobe.rst index 893e1a1215d23..fc68dea397aae 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -421,3 +421,7 @@ * :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_1`: A bitmask con= taining additional * :c:macro:`RISCV_HWPROBE_EXT_ZA64RS`: The Za64rs extension is supported, as defined in the RISC-V Profiles specification starting from commit b1d80660 ("Updated to ratified state.") + + * :c:macro:`RISCV_HWPROBE_EXT_B`: The B extension is supported, as defin= ed + in version 1.0 of the Bit-Manipulation ISA extensions, and implies the + presence of the Zba, Zbb, and Zbs sub-extensions. diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index f8db798b2654b..6a693210b2519 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -11,6 +11,7 @@ #include =20 #define RISCV_ISA_EXT_A ('a' - 'a') +#define RISCV_ISA_EXT_B ('b' - 'a') #define RISCV_ISA_EXT_C ('c' - 'a') #define RISCV_ISA_EXT_D ('d' - 'a') #define RISCV_ISA_EXT_F ('f' - 'a') diff --git a/arch/riscv/include/uapi/asm/hwcap.h b/arch/riscv/include/uapi/= asm/hwcap.h index c52bb7bbbabe9..96b7cf854e090 100644 --- a/arch/riscv/include/uapi/asm/hwcap.h +++ b/arch/riscv/include/uapi/asm/hwcap.h @@ -21,6 +21,7 @@ #define COMPAT_HWCAP_ISA_F (1 << ('F' - 'A')) #define COMPAT_HWCAP_ISA_D (1 << ('D' - 'A')) #define COMPAT_HWCAP_ISA_C (1 << ('C' - 'A')) +#define COMPAT_HWCAP_ISA_B (1 << ('B' - 'A')) #define COMPAT_HWCAP_ISA_V (1 << ('V' - 'A')) =20 #endif /* _UAPI_ASM_RISCV_HWCAP_H */ diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uap= i/asm/hwprobe.h index e6a394fbe7fce..9323feb7c3c81 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -122,6 +122,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZICCIF _BITULL(3) #define RISCV_HWPROBE_EXT_ZICCRSE _BITULL(4) #define RISCV_HWPROBE_EXT_ZA64RS _BITULL(5) +#define RISCV_HWPROBE_EXT_B _BITULL(6) =20 /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ =20 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index d2ec968434561..7f615d1a175b9 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -471,6 +471,12 @@ static const unsigned int riscv_c_exts[] =3D { RISCV_ISA_EXT_ZCD, }; =20 +static const unsigned int riscv_b_exts[] =3D { + RISCV_ISA_EXT_ZBA, + RISCV_ISA_EXT_ZBB, + RISCV_ISA_EXT_ZBS, +}; + /* * The canonical order of ISA extension names in the ISA string is defined= in * Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged I= SA @@ -519,6 +525,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] =3D { __RISCV_ISA_EXT_DATA_VALIDATE(d, RISCV_ISA_EXT_D, riscv_ext_d_validate), __RISCV_ISA_EXT_DATA(q, RISCV_ISA_EXT_Q), __RISCV_ISA_EXT_SUPERSET(c, RISCV_ISA_EXT_C, riscv_c_exts), + __RISCV_ISA_EXT_SUPERSET(b, RISCV_ISA_EXT_B, riscv_b_exts), __RISCV_ISA_EXT_SUPERSET_VALIDATE(v, RISCV_ISA_EXT_V, riscv_v_exts, riscv_ext_vector_float_validate), __RISCV_ISA_EXT_DATA(h, RISCV_ISA_EXT_H), @@ -1145,6 +1152,7 @@ void __init riscv_fill_hwcap(void) isa2hwcap[RISCV_ISA_EXT_F] =3D COMPAT_HWCAP_ISA_F; isa2hwcap[RISCV_ISA_EXT_D] =3D COMPAT_HWCAP_ISA_D; isa2hwcap[RISCV_ISA_EXT_C] =3D COMPAT_HWCAP_ISA_C; + isa2hwcap[RISCV_ISA_EXT_B] =3D COMPAT_HWCAP_ISA_B; isa2hwcap[RISCV_ISA_EXT_V] =3D COMPAT_HWCAP_ISA_V; =20 if (!acpi_disabled) { diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprob= e.c index bd6ca7d769da7..12ea4f39a8381 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -207,6 +207,7 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair, EXT_KEY(isainfo->isa, ZICCIF, pair->value, missing); EXT_KEY(isainfo->isa, ZICCRSE, pair->value, missing); EXT_KEY(isainfo->isa, ZA64RS, pair->value, missing); + EXT_KEY(isainfo->isa, B, pair->value, missing); } =20 /* Now turn off reporting features if any CPU is missing it. */ --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7EFFE38423A for ; Tue, 15 Sep 2026 07:16:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456597; cv=none; b=tSVVY+w7tfzoSxnguFdDj8008gKFz8iaDZscp+0ujNEuo6jiuM2IyyOF54UwNDB/4DkW5koX4v9RN3RD5lAlTF49vbyvSnRH3fNtjktHmoIPeNPq6IVIe/GTEdn+ewIPQaJd5Ot1IcTw+jaiaADnkhcklOYE5vyOJQWKuXBEF6c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456597; c=relaxed/simple; bh=NF3ddzUfo/3eIQKDC/wsRnOuXvG5lgOW1mkc/KT7w9Y=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Bg/RrAWQuCa0/P73JrPTcNIGly1ucVqCCSB02WhN5tabDqufaNe/6VgwrlgkWHvQWYQbVQxwqLKZ/gEVE3LUJpvYdsigLrzoWFoou80CwIsp4FtqFbfo6GnUhH7dFfPHcFQfpSZ1WwDUJ50stgAfwBADyl9N/xhTltI3XhUxKOM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=VfUftpWX; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=g/lMlBvQ; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="VfUftpWX"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="g/lMlBvQ" Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZbaP3824012 for ; Tue, 15 Sep 2026 07:16:34 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 0qgmlv3XWxHqYEcDtaQStAaCiJTua/7d1HfjcjuBqWI=; b=VfUftpWXJpGHZevx 5UfeudRRRp4y2BVM5eZc9U3nHz0ehqU78Sh1jKTgPHEW5q+rJYa/fQdS6WoQMULf 228jVwdemQSI0HtwEmMO0WuFqWoW6lKplxl9ezpgy+GBmQnYiJuPSQSbTVGGmMW8 0GcCCjp7yKqEHSSMNiYNKn4x4gD23uNYzUiuF8KcDLQWyfgIzpswozAnLjAMV/x6 42hwBQ4W4vYFcM+UtAPrDWc1YvfV0vtYz7CIvXIg3fRAeezfDyU53t9hPUN95JUv 0+/A29x44bgmraiQLwp9PTWvelYo7Rd9cEIRXZ5+R8HkkCeYxXxDVqrcAvNhe53D FBPN+w== Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpn41u0nr-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:16:34 +0000 (GMT) Received: by mail-pj1-f72.google.com with SMTP id 98e67ed59e1d1-39de4e72b33so3141131a91.2 for ; Tue, 15 Sep 2026 00:16:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456594; x=1790061394; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=0qgmlv3XWxHqYEcDtaQStAaCiJTua/7d1HfjcjuBqWI=; b=g/lMlBvQxislesSKnATRFOLvLlRTy/TD55bJvkJQ8LCRkir9zIjNs4GiHf/PTwcYLV xzPaodhOYPWaYKkMXPDLLGvhUxgGPOZ1rDiH8Ar8se786W1eT019NS2MpGoEsJdyq+/n Eni8ysRPik/+EX29JeNZP1FEra4ol5+kh9AI9mIiimINMHpsCHRIqt2d5+pKuuLKcJRe 4pX1WSRFbjPCpCEnLlUg7YnluYQn6LUmW+Aa1aUes2rk2ueOY1/CveWagCRFslhMnEXa CIDftTg+P9bC98GGeXfpKhy5OCvun8yCsatOcO7UnlBfBimLzLjNa92Vmps/sBRlqOE0 D23Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456594; x=1790061394; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=0qgmlv3XWxHqYEcDtaQStAaCiJTua/7d1HfjcjuBqWI=; b=J3ojBuOM/aU/3k1PKVbXPsAlZb3PLPOg1JGdpDB6egVQzbeTGtrLMLClfsP8MeDhMu xTxLm+jIt+mBztKjh08H9kfZ9q/YT/58aUoksqNQCOSG2vIm+PBHuus4N4UX6rHHUiFo DelLJfNgteln1lGWHOsdqG5VupGyvGJDOhE7wxDw0BJriStTMjg7sqAkcprW+JbP5Fej nXw5DVcglwqIk/ADRmR0OntXiyTcWuGadNaPPi5vpt8yg4mgI8+VWjsPIBz07ucgblgr cGs3PgISHRHovQQyHrn5/REpnd99w9gzfuozIPDRQUEO9QRmqKzwLU6QO6oEW/Py1lRN O9MA== X-Forwarded-Encrypted: i=1; AKwUvBynnE5bQcMDmPCJQ/CH4rvuBIkwocSnAOJiJBnAShob5uGtAvImzIROQwszZBVT48vptXeUuUYnz3qpAFk=@vger.kernel.org X-Gm-Message-State: AFuF++nAMY3CasvC7aVOKNKGKqNLlcHfB+/4ZqGpSJzZXCZ5fYcLgXyU Cog7WRLiac0fj2yIaKl8oowegbGZBwHfqyiiq5sdD185fZZRzPHmEkkejMQJEyPrn9Wnky4CshU Ci7ofPKducFhqKcW1pPU+kAC59X/8p3WLewNjzr0e3I6Y9QafM3yDSTDn/nggu9enb5U= X-Gm-Gg: AYBFou08pff11OABexsprpxtm0x0Cktbfz3OrctWVxq7dJ3QlBRNk3zxH+ssMZxhsOa hIjCauRyKyV4db9Bn8YTmC9kk2h4bAgM9HWvUOuNqUo5DNKvCJ5MwfZFS5efGNb0J+O40NmdsHS 9Dp1ura3pSwHPl0e8ApxEHj3UDCZutDCwFTAem9slayb/s/7jQmt5gzwg391tT7OoB/C0sVrKJs Tg7zeFvc0e3oGKDgwDyq9tEjFKwEcWh5TO4vC5Q2hBhaD+aCTLFQ1BB7ZkFdL9h91TIA02sqKXB QN3kgtJLHdc3HGOIMNGzT0dgE5giBj4ikj19CouvV0G88RDnOcgfFvLgoo4I X-Received: by 2002:a17:90b:2d85:b0:39d:f247:bab with SMTP id 98e67ed59e1d1-39df2470c15mr9173001a91.6.1789456594021; Tue, 15 Sep 2026 00:16:34 -0700 (PDT) X-Received: by 2002:a17:90b:2d85:b0:39d:f247:bab with SMTP id 98e67ed59e1d1-39df2470c15mr9172925a91.6.1789456593323; Tue, 15 Sep 2026 00:16:33 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.16.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:16:33 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:28 -0400 Subject: [PATCH v7 02/11] dt-bindings: riscv: Require block-size for Zicbom, Zicbop, and Zicboz Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-2-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Conor Dooley X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2144; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=NF3ddzUfo/3eIQKDC/wsRnOuXvG5lgOW1mkc/KT7w9Y=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVHzZ/n6Trr5fvI564+4nNYeGWkuYyO99AjSSOC9LtS fy32g51lLIwiHExyIopshw+2pK99ZVPtO9zzh8wc1iZQIYwcHEKwEQEtzL8M71hEnLuQoO9upod l829vIBZyU1mC7U8ls91zHLd5GCjw8iwuozTenZW2cvGB/xhk4Ky6zR41rBdPMvi9/bcxhMVC0/ xAwA= X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfXw/t+1DBJ348d GUynIonpj5q8fZdEKvY3XCB2qmGsxnFAl17YzdNTQNTkfxP6jhC8Kt+S4bXaBMH32ilyot1+0Qs 7/E0oM8xmD6mvEra//i1vpInCOP8WwEofIMO81Smush8ynwbS6Ewn+90jKkbQHPwP5Xck+4MuD5 3w9LsTDrVnxfIH37BYY0oGxiu2/LbbtvVDf/O2mMJzhVvuXd/Fr7EsbQaSAWUoI/VLal9JJtO1C 1HV5lb3JfWT7f86e/qxlkMAdpngVsDUOPJxufRAfsP/Sus2yDzL7VDlGPePoqnSU+j301SFRibz 5ZT1A5EvOA7s1vhUvuUZbgPADEvxDgY+8n2kT/R3DgMMAD7VUvQXP72c8d5eqtpb/lqjmcOSFYb 3oK+sKnssfwGjkVNbVX5w/mKqHTqXevUsFKCVjn8h6NDpmWcOqWUW1vVogbWEhTsDNtxrdBq45B Bqsh/jKkU6dXf0HwAkw== X-Proofpoint-GUID: Czmh_RUi_-LAR3w_MJBFcyP16EISBbXn X-Authority-Analysis: v=2.4 cv=cqQOAF4i c=1 sm=1 tr=0 ts=6aa8f0d2 cx=c_pps a=RP+M6JBNLl+fLTcSJhASfg==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=XYAwZIGsAAAA:8 a=EUspDBNiAAAA:8 a=JwNH_LCS6ezfG0-7a8gA:9 a=QEXdDO2ut3YA:10 a=iS9zxrgQBfv6-_F4QbHw:22 a=E8ToXWR_bxluHZ7gmE-Z:22 X-Proofpoint-ORIG-GUID: Czmh_RUi_-LAR3w_MJBFcyP16EISBbXn X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX5q1OAu10Bae1 APhpXkzun6RPiCZZJl6i2iIKK2p/tJ1DSTbebPykN094zWTUiK66peZpWmXJ8qG0zRRbX7jnJsv DoJ/SqjHWUbw8YeLpmmGXbdyZ2HvODc= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 adultscore=0 phishscore=0 priorityscore=1501 malwarescore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 Zicbom, Zicbop, and Zicboz have no default cache block size, so a devicetree that declares one must also provide the matching riscv,cbom/cbop/cboz-block-size property. Make it required so a missing block-size property can be caught by dtbs_check. Match only nodes that use riscv,isa-extensions, so nodes carrying just the deprecated riscv,isa string are not affected. Suggested-by: Conor Dooley Acked-by: Conor Dooley Signed-off-by: Guodong Xu --- v7: Collected Acked-by from Conor Dooley. v6: Only match nodes that have riscv,isa-extensions, fixing dt_binding_check errors on legacy riscv,isa-only nodes (fix suggested by Conor, breakage reported by Rob's bot). v5: New patch. --- .../devicetree/bindings/riscv/extensions.yaml | 32 ++++++++++++++++++= ++++ 1 file changed, 32 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Docu= mentation/devicetree/bindings/riscv/extensions.yaml index 577d7ae5576b..d4cde2a7b8b2 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -1211,6 +1211,38 @@ - if: not: contains: const: zilsd + # All three Zicbo* extensions require their block size property as there= 's no + # default. + - if: + properties: + riscv,isa-extensions: + contains: + const: zicbom + required: + - riscv,isa-extensions + then: + required: + - riscv,cbom-block-size + - if: + properties: + riscv,isa-extensions: + contains: + const: zicbop + required: + - riscv,isa-extensions + then: + required: + - riscv,cbop-block-size + - if: + properties: + riscv,isa-extensions: + contains: + const: zicboz + required: + - riscv,isa-extensions + then: + required: + - riscv,cboz-block-size =20 additionalProperties: true ... --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5ECBD45D935 for ; Tue, 15 Sep 2026 07:16:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456610; cv=none; b=la8j9a0x0D5EhPKE5r34+zsZ9Oh9BoZqTNIEUcAWeMGlf8bGbIxlU3+sD0ZcJreAZ0/1jOXGYGzowsccExRN+9zjnfLNEEnrBcv9SBkgE45zvUIKxMUB/FR1GOY3BINUMI4KIBDn7w8CVZrqckPkdtU+iD0D5hDKn1tDQEMZCtw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456610; c=relaxed/simple; bh=ly0eko061Qlf/uDE0HQLjreuewjv2PPwW/vrF9/DA5g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rCUVHswappJAI6Uvz6ZqnyJkzY+3Q/mGpSKZwguuMLAjKsjjPrne7zjxnbuT+Dc+Ujg8beZtGqUu4o3XtoKtViYdeIQmErFkqhQOucoJvGkFc3T3XY/X0SZCHhVDY+1XaE96prM3gQEofcYQysRTvHWO2YTPJOoEP9P4IP5Gt7A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=JG0KXhnR; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=bX2MQc3a; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="JG0KXhnR"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="bX2MQc3a" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZOoc1661442 for ; Tue, 15 Sep 2026 07:16:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= fTqVRfaAxudbHUUsHz0djLyzEwtkEiMK6H/EzB30hZM=; b=JG0KXhnRe0WnZHAP iUwfZ62ONv6ZsdeAK6dTLq1BJcen0HiH6g3V1hiQ9+VnZNF13voELp9kDi+kXwCo SUdeDsE6FA+vxtStPRfFq6nRNdHCo9Xd34/Z5yALRpmTjlNwNSSAFTiOixo1iu2K mL8zZXy8vIPJ223PNqJpEZhDQyIb/n1aPh6qWUyMNa9wxpKBPf5taHKAa5nraqB8 jkBUqlL0xzY0FibgASXsziXaHfkUV+aZczhzYtCfP3hYHXJCjyvJbpi/q1AyEuRQ whQ/sMJ2ROYjmH+irENNvIV59lQMzu+weiiE8tfi4TYAukhlnw3uhChigZe37Bon Eaukqg== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpergcg1t-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:16:42 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-39b77130a7fso7707670a91.2 for ; Tue, 15 Sep 2026 00:16:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456602; x=1790061402; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=fTqVRfaAxudbHUUsHz0djLyzEwtkEiMK6H/EzB30hZM=; b=bX2MQc3awKvcgs/OdGpoEyOSzl0T0SzEXMxnq+lhSWFLhxieVgCkGF1Z6w8n3WmKBW 4njIBneY65hh/qwXxZ8OTsBAT+te/ZuuJn/U/07lPB5ImVDKM21ck9m06Fa835Gtah1h l9nv2nU3c2VsbsbK0dxzMz0LgBSByLlBeFOAPmKoYzGgUGtHGRxXPko4uhgrE8DvSnh/ eQ+wEZtwu+60NTMD7ZlSZIq6vuoyGASGD23eXnCFHTmaaModX6TZsv5Gtx7G+/18Lqnp 4wamj1prAgJweNQegZ5/UlufBHudU1VKbgH/6uAYEzbV40bMANF+8ye+w76CkESqmZMU 2poQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456602; x=1790061402; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=fTqVRfaAxudbHUUsHz0djLyzEwtkEiMK6H/EzB30hZM=; b=egr45ksYgDVieLhivpaUhvRJoIj5yQ8CHXNG+9zo3DdI6qf56IdcAEu1i+0m4dbc8r hXjpObR6xPT8lJGpPlL5BxvMrrYmghgELyjrGTmeNtNxE83LR1CGhN5lY6fSaHi+qOmA DkF+eU39tr6iDcRWTAOpklDTntp/ra5EgBDYjH1YgPSeYP9/xazqW9u3wa246Xq5bpos shG9Mis/7OeO4dfPY7hn/VrcuDueNdz6JpWbbdSgtuOEj8DRd+aOOgmrzxKZGYTfG5fZ oVAwMswHfLa2mJ1Qe86XkAL+ARapVt02fn0iAGdAP8u7taiGGZrk53/hwienLmyR7iv+ EvTQ== X-Forwarded-Encrypted: i=1; AKwUvBzUE07PIcdEbwal26pGcuGY6ZS/qEZJ47TDZ9izg/b3E9XXcbzCGG0MppwmynC9tQXVpe2tS3SDLEvVop0=@vger.kernel.org X-Gm-Message-State: AFuF++lvGkTcLZTGTrSkbj0TMZ/18dJBc0maq93heVPqLlOWhXb3FhY0 hc6DVdM2mXeOp6Cd7cQqVmtL61Bai4hqQ8biFhIiPpOPgqtzzNz3sBR59MViW3niunYMtykXl5Y //iA4bmuV1c85EnoeVq6n4daJL8X57pCkMwGDvI9AvWvA86MUOxQiREqoLBQGGwH0+/U= X-Gm-Gg: AYBFou0O1iP8ts7DzPWLDhvq6uGkJY04Zr8hLqqRSDpTLam7cp8jfa/Ez8naFzmj9Ko KhCmz7V33NCjab6EzJicSvQcw/HIDhE9BYH3lCM48IG0/wjqFp3xcCMZOUaBZfBzAZWn3XWyKE/ bH3Qdl5RK9B2rcrEq3GTTVw9Kq+2ljw4qh5yDWhITcRtqFnAFPGev4ZkQLruaxKNLNkTfy1Y8Og dbD0lzVwwhQg4hCZXocruGgJ8Vwr4AYtqb3hXGuKNs7YeE+DRVVCMGvKmzab8FHsGltdqs/Sn+X d45yRIJTFWrhbzy5RAB7tkPA5Ef39kqtyEUELAS7L/VDvH3Ov9jgOlYI+i5w X-Received: by 2002:a17:90b:5102:b0:398:9bd5:490b with SMTP id 98e67ed59e1d1-39dec0bf7b0mr12098918a91.18.1789456601581; Tue, 15 Sep 2026 00:16:41 -0700 (PDT) X-Received: by 2002:a17:90b:5102:b0:398:9bd5:490b with SMTP id 98e67ed59e1d1-39dec0bf7b0mr12098875a91.18.1789456601134; Tue, 15 Sep 2026 00:16:41 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.16.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:16:40 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:29 -0400 Subject: [PATCH v7 03/11] dt-bindings: riscv: Add Zic64b extension description Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-3-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Conor Dooley X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2823; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=ly0eko061Qlf/uDE0HQLjreuewjv2PPwW/vrF9/DA5g=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7bsm35G913HBN81Wzf3a3bs1NpjtdIlcEWMnePXp 2bxH8y+dJSyMIhxMciKKbIcPtqSvfWVT7Tvc84fMHNYmUCGMHBxCsBEVjczMtzMub34xnGn9l7W /zcszmg/suqdseqESdThgMxjHitq5Scx/NNguprSlHnxx8zrkRXyn5eY79dXUuDZkRtiENp39/e 2T4wA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Authority-Analysis: v=2.4 cv=QK/91QLL c=1 sm=1 tr=0 ts=6aa8f0da cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=XYAwZIGsAAAA:8 a=EUspDBNiAAAA:8 a=B0juqsJzrbe9EOqzv1oA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 a=E8ToXWR_bxluHZ7gmE-Z:22 X-Proofpoint-GUID: tMHbBLy8E-i4iVJdazzblD1cF1UcLxPq X-Proofpoint-ORIG-GUID: tMHbBLy8E-i4iVJdazzblD1cF1UcLxPq X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX7VB+uJGalQPm tafj3vXwGjOn14WMeq8MR1Q/3+JvQslm/ZamQR3eYLxAcOlX4Ip51teEaJ/oaX5/noy3W9jbTmR FD/PAAUmH4jBa7SKDDIQJ9ZT1dB19kAHs8eQ52HJuG6S7W40wDicDJSi7kppg9YsmcI+KUhAp02 VbIa8oLlHTpJWVHI699K7mIw4t9CkY6jD+NGGoyIQPMPzYZ/MMCLwtXC284jBvylYKD4dOmM9bj Ucg4ZFtB68lbNUScVitbrkn/hbHY4qAGNXgt6tF7GdM7CkgrOTqGz4JR8M994TYmC5RbMhZVkkh VBy4YUJY8YdOa+QuCzvuQ4OkMEUkV8nHXWb/JJDsfIk2qFRNSXcptI51GsgDuIC1spk+BknVOTk GhaoVS7mDXwnCe4rGVS9+BY79HRKP3ld/c2Qo2f/cgDWlMqDip8z8vTEMV57OJg7LOJXzlDJbOg b7JgiAEO8riYAgL+ezw== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX/qlend0TMqoC svxNyEiWju1xfAgTH+kiMg/k/RhukDlaq46obK56gz3kQI9Gr+59sEsIb4yDUXWapy3Z205xdpW gRCWz7cX1PyjFkC77Z++RyGhoKYoFT4= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 adultscore=0 bulkscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 Zic64b mandates that cache blocks are 64 bytes in size and naturally aligned in the address space. It is a mandatory extension of both the RVA22 (U64/S64) and RVA23 (U64/S64) profiles, ratified with RISC-V Profiles Version 1.0. Document it so it can be described in the riscv,isa-extensions property, alongside the related Zicbom/Zicbop/Zicboz cache-block extensions. Since Zic64b fixes the cache block size at 64 bytes, also add a schema check requiring any present cbom/cbop/cboz block size to be 64. The check matches only nodes that use riscv,isa-extensions, so nodes carrying just the deprecated riscv,isa string are not affected. Acked-by: Conor Dooley Signed-off-by: Guodong Xu --- v7: Collected Acked-by from Conor Dooley. v6: Guard the zic64b rule with required: riscv,isa-extensions so it cannot match nodes using only the deprecated riscv,isa string (same defect class as Rob's bot reported against the Zicbo* block-size patch). v5: Commit message clean up, fix a double space (Conor). v4: Insert zic64b at its sorted position (before zicbom). Update the commit message. v3: New patch. --- .../devicetree/bindings/riscv/extensions.yaml | 22 ++++++++++++++++++= ++++ 1 file changed, 22 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Docu= mentation/devicetree/bindings/riscv/extensions.yaml index d4cde2a7b8b2..79491ef8f86a 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -537,6 +537,12 @@ riscv,isa-extensions: in commit 64074bc ("Update version numbers for Zfh/Zfinx") of riscv-isa-manual. =20 + - const: zic64b + description: + The standard Zic64b extension for 64-byte naturally aligned ca= che + blocks, as ratified in RISC-V Profiles Version 1.0, with commit + b1d806605f87 ("Updated to ratified state.") + - const: zicbom description: The standard Zicbom extension for base cache management operat= ions as @@ -1211,6 +1217,22 @@ - if: not: contains: const: zilsd + # Zic64b mandates 64-byte naturally aligned cache blocks + - if: + properties: + riscv,isa-extensions: + contains: + const: zic64b + required: + - riscv,isa-extensions + then: + properties: + riscv,cbom-block-size: + const: 64 + riscv,cbop-block-size: + const: 64 + riscv,cboz-block-size: + const: 64 # All three Zicbo* extensions require their block size property as there= 's no # default. - if: --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B705A43F8CB for ; Tue, 15 Sep 2026 07:16:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456619; cv=none; b=EGhMt4aoKojppgiQmjtIQzeYBDjkT8XXg3gQEbp9bvUSIWz2k9HhVaTCVvT0SjS2Z7b5t41LXdLLs+tCM2UE5KLlLlJiWjZrEPpY2Kmk91tmH28N3z30BEApaQKYAWFra5CSb1LtU7hTKMnKGr8bW1pR9kkV8LaOUXIPCzT80uw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456619; c=relaxed/simple; bh=feFwK+YKcjxOr/G3tWc50jSg+BloxgqVLDY49oqg3sM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Eky3HIPiGXHna9qxPKfVLfDTIOcFt66FpGZrjcVtWnEHIBX0NozD6PkmyjHWpwMLiB4Jxv6iK9E7Rja51Sf9umyof9VnXnuUx1BI2Wn1jB7/e7kMblIHZN3Zr+x7TdDQDhJvPp0t+C+vI7nEJv5m1/54UhW4ticfTgUEwM8+xhs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=kz5axk0o; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Y1uPnGeh; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="kz5axk0o"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Y1uPnGeh" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZJXm2892739 for ; Tue, 15 Sep 2026 07:16:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Bib1p+BD2+/9MYZY81r3Zrm+xMekme9OPjDE3KXqXYE=; b=kz5axk0oPAa6ORBv oa/GHEOdKUBTGNm4AFvyqqsVFVqOR7BhGAQpklkGwr/AwrcnaiBAAtpGrClwXBBZ h68G400IJZnKemtYIZGPUUSyzxc0u9Q8qcsuI3lMPo/UAMxApjA1EDvzW03j+/5Y AFTMGQqp+9Iym2SoSZEYr97fjsgEDzw6WDe5+ihHi8/wDDp+Bz2UyqIyYj1zaSeq VNZi2Z2BlLiINAM6rDSHJwA2dpYj3eLdwn8KeNhjqKBB6nx1OJbo8l+J0iFhtKIm ahBs4bk6WbQq3YOP37EOTJyCnKTxvkC6l2C/2YqTZ7AhRT9WROX4Md1MNpAMJpBr W1vQFA== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpg2kv8eu-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:16:52 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-38e8e864ef0so7209401a91.0 for ; Tue, 15 Sep 2026 00:16:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456611; x=1790061411; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Bib1p+BD2+/9MYZY81r3Zrm+xMekme9OPjDE3KXqXYE=; b=Y1uPnGehsoIdid8unJsECU0QMdFBKbEhxnH6VJcnYO4itqTMZtbcg7k4YHHpFR+Tzi NhL5KUQ5uNu7xIfR00V0Uu2xslyE6sJXJtHzCtFEs5OVJZpLZeknYqb4jziPhsLN6pDa RWWWZ5FMNTHvkw+8j8LN1apWRUhWLOuPXwceq+eKOlFILuWTq/S9UsQNBLDXoJTXdLO4 w8zGRHv/J7Hf6cvSxqyGbHQv2SIXBusV493LiIGTAqEFgL5G1XYxuqDH7YaPXe+1iqSx +ddgEZ/K4tV8Za67kgHzMDkmaTXHsd8ydrRMNiXG5R0g4tWycMv8eNiDlmcoMeHEzmnD OpSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456611; x=1790061411; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=Bib1p+BD2+/9MYZY81r3Zrm+xMekme9OPjDE3KXqXYE=; b=SN24YKIyO9kvkqqkAY80NxRZDgC53J01jhHs0Pc7OmJ78S3BQyPVR92tuXFlYGuZmw GMGn1LTOi4ja1zReaU0/f0dBezpUkibxrzp88ac8k6nO0yW775fQDoEY9wJDn0LgNaak IJJfjFhMyO9pLGQaeLCP+Utsn1IPLXOJyuuG0UiHgnGc4h7h24b4/tgSuw4tEPq7scm4 nb4Awn5mDZSuSntm2ZV5mYjuQqZLp06W87FDiNgYL2J00Fbu4NF2YdVas/hPBoYlw2Di blzn9HexuDC5hfcH+BlmUOCb+5QHiToeu+pzhvkeBScTAl48SHZq/vYRbV9VhpXJC8R5 axTA== X-Forwarded-Encrypted: i=1; AKwUvBxGphq0LwHPUpaoiaF4PwtxPDTpNHdAJ/jFaoF/FxOxsgfX/QA07nY1O0CCcy5eXt+2hAPsbfU8xFYL9aA=@vger.kernel.org X-Gm-Message-State: AFuF++mSM52HL2IHBbdmccXdsqGTjlqUtLV+/NLfVKGmxiP0dTrbqXVw dP4ooXRcIBvX9xgbYsF+n0IkP2LwRfnG8RdwL8hfJJDOQSqZyCJ3dZNCzhEz1pXYeldO+wtVbR2 V6bB65Z8RCyawDT8SbvMnuQCLGhYt8UUVj1kYwhqfQ7O/lJ9rpNm01nU77Fo9uURdVRI= X-Gm-Gg: AYBFou2cXJRy6vokDNr1Yoccz8OgpvpAie0gKafbul/G6j2qjP9pYZnz+5r63Pc+6yF AiwuMp4w987LRKWZEadQHaFAe8+4dCL16HPlYO0s3cEYNIPX1lNPMLVxQltD1RmJ6B38jF7Ji1O ZqT9Mx1QVc/uCAOhrNX11ocnWPjvpWhx3PM2qElcuuna21TcjN6Qs1WYRmeS34/I7gDG9B0t8KV DHM8cMWIHi7ZSXL+aIvCTLq/KcbtKeDDuOefSQt4RN2Xj5RKdIoCwgbN3etVP2tbdrdEIRqUrac KQioWTfQlUdErYhglRA2x71TeoLrGRTNNyHN1SIbUDAUbtjq+g4nuPUFSN5U X-Received: by 2002:a17:90b:384d:b0:398:dcfe:968e with SMTP id 98e67ed59e1d1-39dec0f7135mr11151414a91.20.1789456610952; Tue, 15 Sep 2026 00:16:50 -0700 (PDT) X-Received: by 2002:a17:90b:384d:b0:398:dcfe:968e with SMTP id 98e67ed59e1d1-39dec0f7135mr11151274a91.20.1789456609849; Tue, 15 Sep 2026 00:16:49 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.16.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:16:49 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:30 -0400 Subject: [PATCH v7 04/11] riscv: Add Zic64b to cpufeature and hwprobe Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-4-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Qingwei Hu , Andrew Jones , Conor Dooley X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5858; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=O11yGb/wRFqA37mTtx66TEu8+w8Pb+GTV3KD9OD/Jlo=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7aI/LjL7XXKLGVebOoDpa7nnYWFTOvm78vsaklNi 0rNUd/XUcrCIMbFICumyHL4aEv21lc+0b7POX/AzGFlAhnCwMUpABMpdGJkeOJ3mPXx/fdPmE9u vV/mtObOk2+PZn1cKhi63GOBfHjAXFmG/2Hv9D/a7BS5EyoiftAjcue1I3PjnD5oLz+g9JJFzee IBi8A X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Proofpoint-ORIG-GUID: xaDxk05urfO8ijdlws4rTrJyLHT901Nf X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX74gZgXBc1hOI 0EuvaUi7Z8Dx6SFV8mCM0PQ7I161t1ACtnjWWnY85SZMeKPLBAYtZdWNPMN8mAY/m4zkqaN8t7g +C6Mmaw7dkbaHeUxWssHJ6BjNjdUdq+oqb1hO/ITqG/h4eQ4+79loq+pNPshMB5Eo9Yi4pYT3Zw QEBbJjDNdvTzaXpMv4jA/zLc4RVpdPCCyKIId7YQ/Vun8iTDPw2cX58dzs1A1PztFq3LXXmTTrx S9B2E56zYIWGKeYdFh6bjvhafimbQ1AWAYab8RsrVsyV/uR374PJqxJHRuEdA743ds57Xf6GUQL +vBz1rlOhfhkkiM9/5WzqTn/sKJcaH5BgfNkQJVm/4MltO1nJ4XsKDU3KaQTFQnaEOf1+qEHJ9o ibGZVunet/GM+uxTUH55gEx0PD8P0+ROYj4UDSvfqhD79lOK9d8FCdi4uXrRdf3cW1LHNqwENYw HnuS96CztVx6TyI5xJQ== X-Proofpoint-GUID: xaDxk05urfO8ijdlws4rTrJyLHT901Nf X-Authority-Analysis: v=2.4 cv=M7TYuCws c=1 sm=1 tr=0 ts=6aa8f0e4 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=HwFc7jivAAAA:8 a=968KyxNXAAAA:8 a=EUspDBNiAAAA:8 a=XYAwZIGsAAAA:8 a=fFnMLytXjIv02VNa_WYA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=kr7TZk85JJIQSqC0cl8G:22 a=E8ToXWR_bxluHZ7gmE-Z:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX9NgNFQd7zigQ yb7wyWg9l4sD8N1Z+NjUUq+tRYDHlTzI8Zm88ySMsaUbl0Wy7onMETmElgnnNB9juVZFA4T+U+M vr+xGZJTQ2r09Ewm97tEWOovBD1z1Fk= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 bulkscore=0 impostorscore=0 suspectscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 From: Qingwei Hu Zic64b mandates 64-byte naturally aligned cache blocks and is a mandatory extension of the RVA22 and RVA23 profiles. Allocate a RISCV_ISA_EXT_ZIC64B id, parse "zic64b" from the ISA string with a validate callback that requires each cbom/cbop/cboz cache block size to be 64 bytes when it is present, and export it through hwprobe. Link: https://lists.riscv.org/g/tech-unprivileged/topic/question_about_zic6= 4b_and/119631059 Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley Signed-off-by: Qingwei Hu Co-developed-by: Guodong Xu Signed-off-by: Guodong Xu --- v7: No change. v6: Rebase onto riscv/for-next: RISCV_ISA_EXT_ZIC64B renumbered 110 to 116; RISCV_HWPROBE_EXT_ZIC64B now uses the _BITULL() style of commit 8da45c93dfa9. v5: - Collected Reviewed-by from Andrew Jones and Conor Dooley. v4: - Credit Qingwei Hu's earlier Zic64b cpufeature patch: set him as author, with Co-developed-by (Guodong Xu). - Validate only the cbom/cbop/cboz block sizes that are present; Zic64b does not imply the CMO extensions (Conor, Qingwei, Greg). - Add a Link: to Greg's confirmation on the tech-unprivileged list. - Add the missing blank line before the ZIC64B hwprobe.rst entry (Andrew). - Did not carry Andrew Jones's v3 Reviewed-by: the validation was rewritten (present block sizes only) and the patch is now authored by Qingwei, so it warrants a fresh review. v3: New patch. --- Documentation/arch/riscv/hwprobe.rst | 4 ++++ arch/riscv/include/asm/hwcap.h | 1 + arch/riscv/include/uapi/asm/hwprobe.h | 1 + arch/riscv/kernel/cpufeature.c | 19 +++++++++++++++++++ arch/riscv/kernel/sys_hwprobe.c | 1 + 5 files changed, 26 insertions(+) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/risc= v/hwprobe.rst index fc68dea397aae..32a14331eb9de 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -425,3 +425,7 @@ * :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_1`: A bitmask con= taining additional * :c:macro:`RISCV_HWPROBE_EXT_B`: The B extension is supported, as defin= ed in version 1.0 of the Bit-Manipulation ISA extensions, and implies the presence of the Zba, Zbb, and Zbs sub-extensions. + + * :c:macro:`RISCV_HWPROBE_EXT_ZIC64B`: The Zic64b extension is supported, + as defined in the RISC-V Profiles specification starting from commit + b1d80660 ("Updated to ratified state.") diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h index 6a693210b2519..b103aaeafa47d 100644 --- a/arch/riscv/include/asm/hwcap.h +++ b/arch/riscv/include/asm/hwcap.h @@ -123,6 +123,7 @@ #define RISCV_ISA_EXT_ZICCAMOA 113 #define RISCV_ISA_EXT_ZICCIF 114 #define RISCV_ISA_EXT_ZA64RS 115 +#define RISCV_ISA_EXT_ZIC64B 116 =20 #define RISCV_ISA_EXT_XLINUXENVCFG 127 =20 diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uap= i/asm/hwprobe.h index 9323feb7c3c81..9a121ee3b4369 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -123,6 +123,7 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_EXT_ZICCRSE _BITULL(4) #define RISCV_HWPROBE_EXT_ZA64RS _BITULL(5) #define RISCV_HWPROBE_EXT_B _BITULL(6) +#define RISCV_HWPROBE_EXT_ZIC64B _BITULL(7) =20 /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */ =20 diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 7f615d1a175b9..de7cff5f48c34 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -136,6 +136,24 @@ static int riscv_ext_zicbop_validate(const struct risc= v_isa_ext_data *data, return 0; } =20 +static int riscv_ext_zic64b_validate(const struct riscv_isa_ext_data *data, + const unsigned long *isa_bitmap) +{ + /* + * Zic64b mandates 64-byte naturally aligned cache blocks; cross-check the + * cbom/cbop/cboz block-size (when declared) device-tree properties to + * avoid inconsistency. + */ + if ((riscv_cbom_block_size && riscv_cbom_block_size !=3D 64) || + (riscv_cbop_block_size && riscv_cbop_block_size !=3D 64) || + (riscv_cboz_block_size && riscv_cboz_block_size !=3D 64)) { + pr_err("Zic64b detected in ISA string, disabling as a CBO block size is = not 64 bytes\n"); + return -EINVAL; + } + + return 0; +} + static int riscv_ext_f_validate(const struct riscv_isa_ext_data *data, const unsigned long *isa_bitmap) { @@ -529,6 +547,7 @@ const struct riscv_isa_ext_data riscv_isa_ext[] =3D { __RISCV_ISA_EXT_SUPERSET_VALIDATE(v, RISCV_ISA_EXT_V, riscv_v_exts, riscv_ext_vector_float_validate), __RISCV_ISA_EXT_DATA(h, RISCV_ISA_EXT_H), + __RISCV_ISA_EXT_DATA_VALIDATE(zic64b, RISCV_ISA_EXT_ZIC64B, riscv_ext_zic= 64b_validate), __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicbom, RISCV_ISA_EXT_ZICBOM, riscv_xli= nuxenvcfg_exts, riscv_ext_zicbom_validate), __RISCV_ISA_EXT_DATA_VALIDATE(zicbop, RISCV_ISA_EXT_ZICBOP, riscv_ext_zic= bop_validate), __RISCV_ISA_EXT_SUPERSET_VALIDATE(zicboz, RISCV_ISA_EXT_ZICBOZ, riscv_xli= nuxenvcfg_exts, riscv_ext_zicboz_validate), diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprob= e.c index 12ea4f39a8381..656cb100ac489 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -208,6 +208,7 @@ static void hwprobe_isa_ext1(struct riscv_hwprobe *pair, EXT_KEY(isainfo->isa, ZICCRSE, pair->value, missing); EXT_KEY(isainfo->isa, ZA64RS, pair->value, missing); EXT_KEY(isainfo->isa, B, pair->value, missing); + EXT_KEY(isainfo->isa, ZIC64B, pair->value, missing); } =20 /* Now turn off reporting features if any CPU is missing it. */ --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6E95244E66D for ; Tue, 15 Sep 2026 07:17:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456625; cv=none; b=RJ6CGmpatHuC+eJewbBPRUitl6RZyq3fwVCYEGm9dbTNE/e1v7b9AFAD979FwhrkTLJI5UCqb3ga9X+oja0mb9L7b75W2M3kU16D941UKeEfGaivZBB8hLFh37NwJ5113GR/wdISFk2rZWXV/kGc1BSbxIrYqb+0A6VpGqZ8Z+s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456625; c=relaxed/simple; bh=eLTEdh5CFvwbPjheikZKqnmvnX76F42E2jbZEEV3dzQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=DEvhUS7uP75NvVmU7t+ctWlUZFksUtWyKgWr9I+X1gp7AkWo1JLUJzxQt4qgobb6BtQt1EIp4EBR1e4y/Z6eUXRL9DEYniKoEqfzoirrZRHSXhG3DFnDLcTwtAcQB4JyH53rjRnm0YUMwkat5WdH1xHQn+LutoSMXPhfJdbRHak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=h7TFToeB; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=LQ/M4Zvg; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="h7TFToeB"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="LQ/M4Zvg" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZTPO3316461 for ; Tue, 15 Sep 2026 07:16:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 03K3JYYH/TI0gehAvshcmsYiXcqyxVgQVe7B5LINZPE=; b=h7TFToeBWimVbRuK QFPpndcbP6SgGwsJyKfEaPXsul2JrcVBIcNFDWAU16XnldGTBc/GnZiRK2vnSLG6 7wwbPz3Wi2NAWZJWM1SFV/31iEand/ozc9DpAHEuoJJJiq7MoakcfNWWz4F/gLkw tPRbOx/qtbg8DYZMg/wdPXij9j5fRp9/tM8DXvW4qXY4hLE5WWDzpFPNEGSshlNW AB+Yt4Zk1gDUeT3FhDXzcABfz8gDLhqrmO66IAkBcoOvmIjea+R6QT0P46JWH03a dyXCdgZ4Qt58mXkX6gF+Ff6/kXnNy4jfm3r/JmOgM2kODDnJXtCHhW6kcb37OFiz r+ohfw== Received: from mail-pg1-f197.google.com (mail-pg1-f197.google.com [209.85.215.197]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpyux0dds-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:16:59 +0000 (GMT) Received: by mail-pg1-f197.google.com with SMTP id 41be03b00d2f7-cc18ced1a5aso7835166a12.1 for ; Tue, 15 Sep 2026 00:16:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456618; x=1790061418; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=03K3JYYH/TI0gehAvshcmsYiXcqyxVgQVe7B5LINZPE=; b=LQ/M4ZvgpR57jNWyTZgrCZZkiVupi49MzN3glQGMLrxc4it+hYeggb+GIb0TnXDRqY 8VLrpo7FY8nt8FUMehI8cRkiuaNBG/ndNTfv8OS5SXD3qfvHa2/Ble3NoD6ZhTzX0qCa WkrI11A4MA3IhtY6LXGl/GGAwEwqAjzsSoCfyQh+psCwpOhjVIT1l4yLyIcmffgxCrMv ojB7p6H/Ab/DsbJ6LFeqGqH4GE+qD/Edx+VeaAgi5K9vxrVD3awGRurZ2dNerPnCzDHo zgq8Q/l3ESoBt4eE8Woig1V+Az5HwnJuDRmvQBXd50U5KxlbWG2vtJRDUT62FNEDFfbt X2zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456618; x=1790061418; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=03K3JYYH/TI0gehAvshcmsYiXcqyxVgQVe7B5LINZPE=; b=asTspfWK2DM7Stj1zYKza0+4zkbCKaWwS2J6h6AUfkAoTNAMxzIfc7IXQc1Bencsxq gafnJuQSO3p8eW/kiIsVvi9G9wYP5NkzYqus/ZUhHx08bpCXtDr+VUtWBb05Gb0gjta6 yp98m4PqHT4lBsRIDBZ6WatSeTvGHW9+LitBvq582iLY1s9ZUZBtRnIZazo2SkK75aks dOK0wcxswNt0WBoVnvl3J4xxN8jILaF0fQwbR5GqvpgH46L+OOsYh+RDb7taPYHC0l31 fPjTtI95ukhEX0HHYXAP+34uua5tT7PdhIQXRUcS8cZrcHmu24LWofC0v7glyZxCqJ4b KvQg== X-Forwarded-Encrypted: i=1; AKwUvBzBREi2o/+MgY3rv4vK+Mkgno9pdA05PkFqSVxuUsG/GVy+Muyt6XBHMG1/d084c4nHXZDriYXbMjUN/v0=@vger.kernel.org X-Gm-Message-State: AFuF++lTsKy8hX/Lfl46hkqcBsh12vaDGC515WhL6HI/zrAznuakUOZL oSFuZ1ZaQK2NqAnhU3vRyyCr2nzX9WskEl3DOfb0FzLe0YdCY7LfqNCGRbc+f86ViE/gShXzpvp cLpQXB0DXgTeJgt1/j//2eLOmL7ED1YqILbPLqquXe3ogXa2CZnbfiobf0V4OVc78REE= X-Gm-Gg: AYBFou1qRW5RXXWC89xwpT5kqE43Mcsos8WjE4CwZT+aRS9luviEbRH25P1ZkPfq8nr Pd51cM11Awz7md1xtbgmGe6SmDsLl3y9RDJ2hDsY2oBb7ua85QkB6HjS0wcPsAa8V0VZz5LOPoS GAY71J+8A0cP6O0PL2hVAVknL/HBBNeGcgfSqkIs8SVeU6Ovv6yC6fiUJx0HzSs+S4d5JKgyw3y TYbU2NBa5SX8CaUDUZ6i0fID/7IgvEuhqOJ0atk+dtorj1XuYFeBDDmGsU8ZFRN32mnZoN9jbZo i98AYP3gJ+wiG1apo9N5/TZg1gZ4tctCdrP5d+ptGs+ov/TWxAGAdh68wAye X-Received: by 2002:a17:90b:224b:b0:39d:e75d:f33 with SMTP id 98e67ed59e1d1-39dec09a541mr11810760a91.19.1789456618115; Tue, 15 Sep 2026 00:16:58 -0700 (PDT) X-Received: by 2002:a17:90b:224b:b0:39d:e75d:f33 with SMTP id 98e67ed59e1d1-39dec09a541mr11810682a91.19.1789456617515; Tue, 15 Sep 2026 00:16:57 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.16.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:16:57 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:31 -0400 Subject: [PATCH v7 05/11] riscv: dts: spacemit: k3: Add Zic64b ISA extension Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-5-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=6899; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=eLTEdh5CFvwbPjheikZKqnmvnX76F42E2jbZEEV3dzQ=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7bcmypqkGf20YnN82XfLzHzWXatfrZ3c/4/mbBK7 bfwhsKmjlIWBjEuBlkxRZbDR1uyt77yifZ9zvkDZg4rE8gQBi5OAZjIq8kM/4xcN083UvR7p3P5 35s7b14WS7no33dp35ez4dLNLnnl63EM/yytdwRN0bh8Kd42Kb7oQUhK4A6Ov3fjOpmrGL633XH pYwUA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX02B1MVVqlHeq 4OZxaeTB9ngRU7fOXyJb96oc/pMEvX16pa6b/Vy4WNOKUGIDTGSC3DrL5Mlow2PEgllUrF6DhGL iCRIbzJrcahB3VKK5JHo9+gsCR79PkQKo1+9uROZLJknQDRRJmWIOCwRfcJJylcWr85V1/LkPA6 JkVRePJgzmKw9VgabhBLBCJckxadvUu4nQxLuz0e4jlZ52EtU6xxjvbAxLkAyjZtfzwWL0EqgZX +e3HDCBFln9tgVMqAU5f8shGeWsqcpdibkqJ2yLuIWry2OHyliymrCLj8iaugDrguTk/AszwojT xMtcBlN4JYz7jI+7fZosqVgI6/TG9L1EE+8Fm+0i9OyagVIoiMHH+8OWeIGo3acmBlFHmCCmpOM VLppKR65u1ZuGEaX5GISi3rn5jNIwnB57pv+zMzHOsjVfZz9LrKwhDHZpmlT1w+UssmXIVUs/Gw eW966Ees4JdmA9wurag== X-Proofpoint-ORIG-GUID: CRAvaFZyMPPN0rBsPjEyREh4nVswwEdK X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX3hhKfn9pGuTb mjQHYRtiOQcUPVtAMLRhnBcKaMhXvxUVPOVAVBo5tWk9N7+lUn45pJ2bnKdExzlliquodekp7oB /88jzHmcRFv2FffJUl5ImkqQ/KuFbpQ= X-Proofpoint-GUID: CRAvaFZyMPPN0rBsPjEyREh4nVswwEdK X-Authority-Analysis: v=2.4 cv=QYLzLcbv c=1 sm=1 tr=0 ts=6aa8f0eb cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=UGsqu9ZSYe-JSgDVrOUA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 The K3 X100 cores have 64-byte cache blocks, already described by their cbom/cbop/cboz-block-size of 64, so they implement Zic64b, a mandatory RVA23 extension. Declare it in each core's riscv,isa-extensions. Reviewed-by: Yixun Lan Signed-off-by: Guodong Xu --- v7: No change. v6: No change. v5: Collected Reviewed-by from Yixun Lan. v4: No change. v3: New patch. --- arch/riscv/boot/dts/spacemit/k3.dtsi | 48 ++++++++++++++++++--------------= ---- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/arch/riscv/boot/dts/spacemit/k3.dtsi b/arch/riscv/boot/dts/spa= cemit/k3.dtsi index c3f2dce0969c..799f0f00288c 100644 --- a/arch/riscv/boot/dts/spacemit/k3.dtsi +++ b/arch/riscv/boot/dts/spacemit/k3.dtsi @@ -38,9 +38,9 @@ cpu_0: cpu@0 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -79,9 +79,9 @@ cpu_1: cpu@1 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -120,9 +120,9 @@ cpu_2: cpu@2 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -161,9 +161,9 @@ cpu_3: cpu@3 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -202,9 +202,9 @@ cpu_4: cpu@4 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -243,9 +243,9 @@ cpu_5: cpu@5 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -284,9 +284,9 @@ cpu_6: cpu@6 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", @@ -325,9 +325,9 @@ cpu_7: cpu@7 { "svinval", "svnapot", "svpbmt", "za64rs", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", "zcmop", "zfa", "zfbfmin", - "zfh", "zfhmin", "zicbom", "zicbop", "zicboz", - "ziccamoa", "ziccif", "zicclsm", "ziccrse", "zicntr", - "zicond", "zicsr", "zifencei", "zihintntl", + "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", + "zicboz", "ziccamoa", "ziccif", "zicclsm", "ziccrse", + "zicntr", "zicond", "zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", "zimop", "zkt", "zvbb", "zvbc", "zvfbfmin", "zvfbfwma", "zvfh", "zvfhmin", "zvkb", "zvkg", "zvkn", "zvknc", --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BC4E46A5E1 for ; Tue, 15 Sep 2026 07:17:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456630; cv=none; b=plvgW9F5Ix15FtCiIvM4vflCAQY99qRY6dNG06EfJAlicrCTDJjZv2j1osfpSbBQZHHbmx15xKT5hy21WlMpVQAwH9de6xIoeQXe1Kqzzg6o3GiVMqMRYi9efutZebbB8h81Z0qtRtKp+p/jhqL+VuVTZjM2OvtlcWej8eeODkQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456630; c=relaxed/simple; bh=/bdHVT19+Gg3CIpKwikMFbUnLqQOlahzHepUFXFmpKU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rYGj1Du2ji4mjbY8R4eoudyfQEdb/vtO3/sU1IFs/vcqLFruzxrFcFcyCsBwLZz/yErQCfLhIHCR0UfKWoplIB+4VO//4vu12xAzrnAgVuOUDqZE/HI1+cRs0556ojqlGuOEWRom98NdiLqDYTeOl0YJl13BRj26PY4gTwi54ZY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=d9GXO6vF; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=CslJA8yj; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="d9GXO6vF"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="CslJA8yj" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6YsjQ4048595 for ; Tue, 15 Sep 2026 07:17:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= A12QGBXThDHXy9BHdQjUCypSnvxRfAI6MUwDrx/7tNw=; b=d9GXO6vFu7CucDWZ 0lxtLdT4AErXo3u3joBcOp4v7idv2k0bs914FxscUfsFgcZdbJEL/CUISE88od/F kK90OmWBZ9bGRk1OgO+hq8v7joViyzryV1i6F9xetmrhL+8av6WT4aM1/sLyJWvI fWF5ly52VrwkopcnRdueC90ouiBdBCYgg5WS9WbITGWB3YhtVtED2TIcXFvvuiDJ BQkU3nh4aQoE8OzlBfqh97VBeenu1vQiqlSYCOji7F0lXnVqGQqFRDa0e9Clq4CY LFcGp0BjhfmHKPO/RVhazf4bg77TFhRPV9tjPUdjQqc8BK5Gw9h1WMBMFG3wpmnX 5xKQ5g== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpyea0hcs-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:17:07 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-39b6416441eso8010107a91.1 for ; Tue, 15 Sep 2026 00:17:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456627; x=1790061427; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=A12QGBXThDHXy9BHdQjUCypSnvxRfAI6MUwDrx/7tNw=; b=CslJA8yjQzSUk+ZvVKQrhwc59EgdrXG2svqHMbpm5Ib+0P6Q127ALK7rkhgg3a7ApP Xc7yUWqvWo0NdFgNyCYJi01b4l0p3nlnDLXOa1sxCdljkQCepim0JnLhcQvpKEozCYes vMNZ2ZYqV0dPNBgK+yJuGjxQyh0jL3Mm353MMhSBevu6cYozCiRUdGNKXZVQzcdFedmj vFz3H+TtdDcMCuFH1fOMG0J7nCerS45pTF8Fv2JkJK2zFZVhKiNVOGGBDK70KDTVjyJ1 7enDzQg7Eb/i3Nlja+hag0/EYMnt1BSjV2STUykqvHh1d+rmBAYKzkuVdV9qPfRTIEmL xRFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456627; x=1790061427; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=A12QGBXThDHXy9BHdQjUCypSnvxRfAI6MUwDrx/7tNw=; b=nt/9PWg87lQLpJ0epccOF6EVUuA2AgdN0piGSeEV4B3I9NpE+6xJiItnGFupVn1cNx DzLPmKmMyEG3nHlL6pUxy+0gsmHrZAeixEPUf1Y3h9C3sXpjUHcqTrwhij9xbfsoiEh+ 9cvyQNstzJQecs4sQWRChwDXCHXMvApi9/mRZ4NB7q1JkuhrbZz+BMrybK1/M5GqV6XV H5fRlutosxEE6ez/XHX5N66rFuNNVgZis78ejNtHZpyaKq3IitIK73F/lL9wMmP8woaf GZGPAzBRr/FstHApiC9Lt63xxvbqrOYxHeMDt8RKA9FchLeizPkbFi7QBadEKi+jIhjC nqsw== X-Forwarded-Encrypted: i=1; AKwUvBx/XrtyYJGBjYbY9BgmnPqPLW3Ygxd84+7u15kn7c4X3n68TyaOyqCT7o5CjqUSSPaROdnnqBDMs1/txFE=@vger.kernel.org X-Gm-Message-State: AFuF++mB09W1s96xriYIVgYaU0MH5ix40/hLHZG52xIFw/tEZt2jLSTb hRXZOWdEQlVcfiILIxV33IvaHA58Svjj33XGA4oRIvrr4wrHq8mMK3q61obm3MmLvtwqB4GU3kA FHPpmd/XxxkTVFINDdKtXCFCZqvXaEFyWfjSUt2shVqFYYz7OnyiQeC87q9ohTmV4HAc= X-Gm-Gg: AYBFou0r4jbIEH83JjWZtbwdO4YVMeN/tVX126qVphbn43GnphGsQs9uzM78NBK2hmY D4ROvcuPAKbUEdak06Ou/1sIaUosUwO0oQi2m0++gnGc2ediQthXTDLfJLvQ0+f4ZNbHZR2DBx2 xzo1YtZlYwmv/Ct2TQE6Fn+MuZ9bCL2j3AV57PAOtVomuw98yukQ6+T1pbrMt2aBZmHtnIlUlju txc6f3lN64mCytArQ4DdSsS+Nv7JCvRZ8Hh8jFvb4/7PJWV6VcKKLPtIc/oBaJVzOY/l5xj6jIu wj2kCBIuSqUsQdN+Nb/TBvYjlhGqaGQAsv5EeARYNn4vw5aH/dElJx5weLnz X-Received: by 2002:a17:90b:4d07:b0:39d:f6a6:60d8 with SMTP id 98e67ed59e1d1-39df6a66122mr8234757a91.3.1789456626560; Tue, 15 Sep 2026 00:17:06 -0700 (PDT) X-Received: by 2002:a17:90b:4d07:b0:39d:f6a6:60d8 with SMTP id 98e67ed59e1d1-39df6a66122mr8234683a91.3.1789456625915; Tue, 15 Sep 2026 00:17:05 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.16.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:17:05 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:32 -0400 Subject: [PATCH v7 06/11] riscv: dts: spacemit: k1: Add Zic64b ISA extension Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-6-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=10167; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=/bdHVT19+Gg3CIpKwikMFbUnLqQOlahzHepUFXFmpKU=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7ZOvR11rk9k8deL1q+SHq1PE1FuLF/sd7j3+pqKD q2Js/oWdJSyMIhxMciKKbIcPtqSvfWVT7Tvc84fMHNYmUCGMHBxCsBE7BkY/un7p235fCFg3+F5 rkV7LE/xTLoUaRWo7/TX/9b0L25cIiUM/4uaUhzawtb7XA7NkOA4laH+e8mfO4V3lvp4VV3f0H6 jiAcA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Proofpoint-ORIG-GUID: gAxRFztS5v3aOSzTGxQOnAFzZGp--a2o X-Authority-Analysis: v=2.4 cv=cehHPXDM c=1 sm=1 tr=0 ts=6aa8f0f3 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=tnVZVcqGRelvdznDbj8A:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-GUID: gAxRFztS5v3aOSzTGxQOnAFzZGp--a2o X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX1MAgMVfTvzhp NVTvGPyM638Oy/68yGVn9mzh/bHLEpNM/KIdsF3R6ybqZ91Vpu/DkIL/Af2xk8641RNV5e/NAaw 3ebudBbwHwlYx7YXNl67KF7tWQUeH10= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfXx6oTqLtWvkfn Lud9Am3OPPJo20m7mUCK5vOZAof+HqH+/mbKWg/UXW2PKNXLcuNGD/lH/MT4mIGQeqfwNjjbjp9 qOZ2DRurYSVoV602QPz3AjyLI2sya+nHa63iOvCb9Np+6hcJvaSmjIrUd9drrIABCGy/YGLwEuF i9ea1FQdOWGaYoFPagUBSrGyPN6t1U3VM9x4LdA5pVHo3SlN2qRo1fOfSVV2TEBeBWiL5GvOVR3 LY48ZJq76js0FpUzs4pMHUM6wEwdMjvDn+oYZl/9Mfv9y4pDQPUThc8YG7N1ZZspRfMT3owypZ0 pKYTYY6HzmPSVwhGGhKZbP5EoNFN0JZQyn5IQWEe+Vl8sDsYkMIUiR8Tb/F0fbM/WU0gAuf2Se+ 4QSOR69ENmvjW4duWzxXcEXvASMj0BGv6yJoeDcjP34amZznFBJQed6hqv2qMrmWEoJF3hxu+Ki wnGidxnEOdsr9+JFmKA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 lowpriorityscore=0 bulkscore=0 clxscore=1015 impostorscore=0 spamscore=0 phishscore=0 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 The K1 X60 cores have 64-byte cache blocks, described by their cbom/cbop/cboz-block-size of 64, so they implement Zic64b. Declare it in each core's riscv,isa-extensions and in the deprecated riscv,isa string. Signed-off-by: Guodong Xu --- v7: No change. v6: No change. v5: No change. v4: No change. v3: New patch. --- arch/riscv/boot/dts/spacemit/k1.dtsi | 80 ++++++++++++++++++--------------= ---- 1 file changed, 40 insertions(+), 40 deletions(-) diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spa= cemit/k1.dtsi index 3fabfd34114b..542bfc0d19f5 100644 --- a/arch/riscv/boot/dts/spacemit/k1.dtsi +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi @@ -57,12 +57,12 @@ cpu_0: cpu@0 { device_type =3D "cpu"; reg =3D <0>; clocks =3D <&syscon_apmu CLK_CPU_C0_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -88,12 +88,12 @@ cpu_1: cpu@1 { device_type =3D "cpu"; reg =3D <1>; clocks =3D <&syscon_apmu CLK_CPU_C0_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -119,12 +119,12 @@ cpu_2: cpu@2 { device_type =3D "cpu"; reg =3D <2>; clocks =3D <&syscon_apmu CLK_CPU_C0_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -150,12 +150,12 @@ cpu_3: cpu@3 { device_type =3D "cpu"; reg =3D <3>; clocks =3D <&syscon_apmu CLK_CPU_C0_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -181,12 +181,12 @@ cpu_4: cpu@4 { device_type =3D "cpu"; reg =3D <4>; clocks =3D <&syscon_apmu CLK_CPU_C1_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -212,12 +212,12 @@ cpu_5: cpu@5 { device_type =3D "cpu"; reg =3D <5>; clocks =3D <&syscon_apmu CLK_CPU_C1_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -243,12 +243,12 @@ cpu_6: cpu@6 { device_type =3D "cpu"; reg =3D <6>; clocks =3D <&syscon_apmu CLK_CPU_C1_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; @@ -274,12 +274,12 @@ cpu_7: cpu@7 { device_type =3D "cpu"; reg =3D <7>; clocks =3D <&syscon_apmu CLK_CPU_C1_CORE>; - riscv,isa =3D "rv64imafdcbv_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zi= fencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_sstc_sv= inval_svnapot_svpbmt"; + riscv,isa =3D "rv64imafdcbv_zic64b_zicbom_zicbop_zicboz_zicntr_zicond_z= icsr_zifencei_zihintpause_zihpm_zfh_zba_zbb_zbc_zbs_zkt_zvfh_zvkt_sscofpmf_= sstc_svinval_svnapot_svpbmt"; riscv,isa-base =3D "rv64i"; - riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zicbo= m", - "zicbop", "zicboz", "zicntr", "zicond", "zicsr", - "zifencei", "zihintpause", "zihpm", "zfh", "zba", - "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", + riscv,isa-extensions =3D "i", "m", "a", "f", "d", "c", "b", "v", "zic64= b", + "zicbom", "zicbop", "zicboz", "zicntr", "zicond", + "zicsr", "zifencei", "zihintpause", "zihpm", "zfh", + "zba", "zbb", "zbc", "zbs", "zkt", "zvfh", "zvkt", "sscofpmf", "sstc", "svinval", "svnapot", "svpbmt"; riscv,cbom-block-size =3D <64>; riscv,cbop-block-size =3D <64>; --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE7E8463B96 for ; Tue, 15 Sep 2026 07:17:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456640; cv=none; b=s3DWDxcer3DT9Kuc4bCFCCTefj1cSsZxj1tjOCs4mLUurDvUk/Vq2hiam+AeWyy0l+7KC34S2g35Wg8ymK1Bj9p7/SVJJ0B5l++5T0VefOqTbaGn95euayjlPlyi1EXFYV89dPtY7eqrcqr1oKVfK2bW7U8Iwxmpbo3zc/Ri4D8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456640; c=relaxed/simple; bh=yq7S6R8PxPg8U1OJ/GAnLc0WhV4sKlaZgE74Pzvauug=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=hbO1pBgUbNADZ7RMoKphGGUD6k9yGmN8dF953UBF9ThKJLutEH3ZOmuJsIjDaAP/InJCIhvwoILyOqC2MOmxjEpjJiY4U5nULA4f1XjTDRrE0qSGGUD6R4a8cwsKrMOzDy2zOEEFacFEFvrg1+NvLDktAaXayoh+Ovvi97hgCiE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ADnAiIUq; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=Mtl1qnHf; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ADnAiIUq"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="Mtl1qnHf" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6Ze8W3126427 for ; Tue, 15 Sep 2026 07:17:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= Qe2zzmLjAMpTnuktqaiYBaQR3/jluvVlK+0yiGzu5Pw=; b=ADnAiIUqoJBtN4E+ Gk30HHfu7xuo6vpCUbR3A69DfiJ0x+KRsGI4ohhnf36p4L03l81APQlDy6v44u6z SgdVyxNqwX6meCpi9IOOQdEwcZgJS3cEn/+GU0sqdBNoKQn4CxdxN9AEOQk9/RBp I/3d6efiOhVRTfiHs2pH5ZwGe+thND8p4Qx+JYvyE9TGWVPiwYTkdtknpNsNkq5v w20ymBtrgDHc2JnqQ2aXeoxxcqvvN9FaojfyqOCpz2+DKfYXJ1DTpLuZnCynJwH6 UaT7ZpfMpDQ+5+q7hxQGYiycz3gJOJyBpNtqLRc6IFrbwpNhSnBz/aN7TAFPd1aG EMx3wA== Received: from mail-pj1-f70.google.com (mail-pj1-f70.google.com [209.85.216.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpmx9u1yj-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:17:16 +0000 (GMT) Received: by mail-pj1-f70.google.com with SMTP id 98e67ed59e1d1-385d2703b64so705599a91.1 for ; Tue, 15 Sep 2026 00:17:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456635; x=1790061435; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=Qe2zzmLjAMpTnuktqaiYBaQR3/jluvVlK+0yiGzu5Pw=; b=Mtl1qnHf05gXKS6BVRMLp+3KhgxucRkz0ydP9LtJXnXVWqq5j6wDNT4Gr3x5XK8KxD hYm3jCjHc9i9MR3Xd4YFprl85uub/7OBaqdlxyDrL9tga7qVdo4kKVvcvkqvnxcaJi0S GxA1/fRG0Dr/36F8I1NJ42iW/m5/hASP253o0JzB4wu50YOJb+9d4J9iuK+JWIcplKMD fRfxILOR1ncq5/DsTPxyo8qUtCqFSiwo/LX8PXqw+se+7NH8Q3F117kd1A9Sjgp/99Yk qWzPgbbWzavBRkiGpWTIN7XKsJN5otSnans/JTpdSHevIdUtdh+uBnxotoHLiygven91 GjUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456635; x=1790061435; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=Qe2zzmLjAMpTnuktqaiYBaQR3/jluvVlK+0yiGzu5Pw=; b=JHXJ2Gg6imvkUT2d5ALHqNsQO/TOYvMGqMp44IEibbneaEAyzuZLd4HtUbnvI+Hb43 8Yhc3bQe7c2dvs8hOqOJmOADYrSj1RW+/2Yb3zGcUq8zvznc7NuerJBmb4Sg/rlC8ekw k5b5jg2/SHkq7zX09SqpRJJZ4RQpfN2QVCuksxGIxqHJP5NBfLdj3saC8q9FKSazaHIc VY+AxTVqidk179vH9Im/nAzAwCcqB6UZeAX2vDy0T8L70Z73xvmqgBGPLE0WPH6WGd6R Kgux5HK6G+yYrzcjtJR1yoGR8Uuc+807pOOBycutiuuxR0ZzNECK5RXTG4GkFyWXGGlj FF7A== X-Forwarded-Encrypted: i=1; AKwUvBzc4k6w2DwH1OySO+8DtzA2Zx/Tdl4qS+ZCSNbzBbrAWZ5bKSgtQEExUGRMOc5fSApowptmgrMYv/bWvE8=@vger.kernel.org X-Gm-Message-State: AFuF++nfM+JtrgRkc4f4PDKmG+E2oaKzONWhW+UZzXJz339K1Bt/xiLZ 67V+rRNd5zOiTpomavemhiviUFiaRfV29AR+hyMITsy/P9zi2elN4jEUStYg7p12kRLu8pSp2hr pIswV4Wv6BrvXNRPhcHSsvc6sC+EcIjRW+cYRXn88LtO9fQQ80xr8yLvxfjH2H9irlKU= X-Gm-Gg: AYBFou29vUpSE67cyP9nPGwQLFy30sN7PhG7ix9WTmk5NQzgrDGkVU5gXdd1wyUMEVM LXDvi058Gba7aYUydKI1IeECMLms2yGljW5l3RiVpwN0u+DicBw9WCnzrr22B5UvI7fmxzF7c+t 22jl2NoQQY2gmIYeHk3RfEhZb5S+w/815WgjdGw+PXLh3Vx3ZJU74m9+12HUdbtmH7Shx5a/myB Ydl9Cp4AiSDKKNE/pO5TxM4CPUwfu75M5FYJ2OOQ7GZtQFNhL0AW+UZpWcegwq+DuKWZe8jtImz FBk8dMt+jJBktv8k8zfQHHqpYp6y7TsVrdDq3H9wOnsruSnt81jINkl9O2oy X-Received: by 2002:a17:90b:5348:b0:398:baa7:4c2f with SMTP id 98e67ed59e1d1-39dfe0471d3mr3083558a91.5.1789456634708; Tue, 15 Sep 2026 00:17:14 -0700 (PDT) X-Received: by 2002:a17:90b:5348:b0:398:baa7:4c2f with SMTP id 98e67ed59e1d1-39dfe0471d3mr3083509a91.5.1789456634032; Tue, 15 Sep 2026 00:17:14 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.17.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:17:13 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:33 -0400 Subject: [PATCH v7 07/11] riscv: dts: sophgo: sg2044: Add Zic64b ISA extension Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-7-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=28800; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=yq7S6R8PxPg8U1OJ/GAnLc0WhV4sKlaZgE74Pzvauug=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7Ym8pSGX1h2fWZZ61uFpk2nZa/tPLxU/CdH8Lunr oL/JCNCO0pZGMS4GGTFFFkOH23J3vrKJ9r3OecPmDmsTCBDGLg4BWAiOZsYGZ6edQ96Xmp8WLuH 4WlQ8L49B3V0hHSbOzfvn7P6yPSrW/cxMpwIc1StrS47YVsbeDclZtYkF6ZlrP8qN3t5ae7RDF2 ygQkA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Authority-Analysis: v=2.4 cv=G+KJgNk5 c=1 sm=1 tr=0 ts=6aa8f0fc cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=WzeAf3B23z0EryTBMFwA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX4i6uBbmZPIXN gBacar+Nt20ID70qcl8+CHA3d1bTfz5RHXkR5jAhlqCWsCXV3RZc93g0WdZ9UIpPeVDCJONNZfa O19DNpflMLG5YBZ5BxA+7MNz0TK/VtAOh+Wy+1BJwW4ewfLUh34sNJ5YJGDjlrWXtfl9dva3Fr/ CbvkCSL/KR6MWNZKrylAoEEtmr7bAHSYcDyGyMeSoEZRXbyCmKIBEDcOthD6qzs9WAGOwXzaU0k GX0160bDEXumQd42NPG78jXUjI3nky2Cl9f66bc77ElUJZ1G+d3ZLNGpWWi1ESV6abqSAdcuxvs KwY6SYXGvqkVSQ/+xmiAZPdAMlASIe/34goyL247FMuhU+rTMoFW1qZnlMkBhuNFZM6tHd/k/+x QmxbNwo+d5/5BC5vcZLWYq70NsCjTr3LqqiYb45rzScLd7p0jjDS0tnY9KhPUcq8HiEshf5RgPe fk/L6nA3W/93kekTqEg== X-Proofpoint-GUID: JUZ_Ij741kUB6ebicrfblfvXvPLYQt0k X-Proofpoint-ORIG-GUID: JUZ_Ij741kUB6ebicrfblfvXvPLYQt0k X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX3p5QOY+ehLyp CcnX06FIbMpcDg699xuB63k/D3+YTJClJuBS7roa6bEvXU9edp5Phj9yOunX35vZuvtgIwuVivI 4WWDclhdh47EQrNwUobUHtOgYxgjrWg= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 impostorscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 The SG2044 cores have 64-byte cache blocks, described by their cbom/cbop/cboz-block-size of 64, so they implement Zic64b. Declare it in each core's riscv,isa-extensions. Acked-by: Inochi Amaoto Signed-off-by: Guodong Xu --- v7: No change. v6: No change. v5: No change. v4: Add Inochi Amaoto's Acked-by. v3: New patch. --- arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi | 128 ++++++++++++++----------= ---- 1 file changed, 64 insertions(+), 64 deletions(-) diff --git a/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi b/arch/riscv/boot/= dts/sophgo/sg2044-cpus.dtsi index f66a382c95bd9..5943407020e32 100644 --- a/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi @@ -31,7 +31,7 @@ cpu0: cpu@0 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -67,7 +67,7 @@ cpu1: cpu@1 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -103,7 +103,7 @@ cpu2: cpu@2 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -139,7 +139,7 @@ cpu3: cpu@3 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -175,7 +175,7 @@ cpu4: cpu@4 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -211,7 +211,7 @@ cpu5: cpu@5 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -247,7 +247,7 @@ cpu6: cpu@6 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -283,7 +283,7 @@ cpu7: cpu@7 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -319,7 +319,7 @@ cpu8: cpu@8 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -355,7 +355,7 @@ cpu9: cpu@9 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -391,7 +391,7 @@ cpu10: cpu@a { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -427,7 +427,7 @@ cpu11: cpu@b { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -463,7 +463,7 @@ cpu12: cpu@c { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -499,7 +499,7 @@ cpu13: cpu@d { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -535,7 +535,7 @@ cpu14: cpu@e { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -571,7 +571,7 @@ cpu15: cpu@f { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -607,7 +607,7 @@ cpu16: cpu@10 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -643,7 +643,7 @@ cpu17: cpu@11 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -679,7 +679,7 @@ cpu18: cpu@12 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -715,7 +715,7 @@ cpu19: cpu@13 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -751,7 +751,7 @@ cpu20: cpu@14 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -787,7 +787,7 @@ cpu21: cpu@15 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -823,7 +823,7 @@ cpu22: cpu@16 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -859,7 +859,7 @@ cpu23: cpu@17 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -895,7 +895,7 @@ cpu24: cpu@18 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -931,7 +931,7 @@ cpu25: cpu@19 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -967,7 +967,7 @@ cpu26: cpu@1a { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1003,7 +1003,7 @@ cpu27: cpu@1b { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1039,7 +1039,7 @@ cpu28: cpu@1c { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1075,7 +1075,7 @@ cpu29: cpu@1d { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1111,7 +1111,7 @@ cpu30: cpu@1e { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1147,7 +1147,7 @@ cpu31: cpu@1f { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1183,7 +1183,7 @@ cpu32: cpu@20 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1219,7 +1219,7 @@ cpu33: cpu@21 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1255,7 +1255,7 @@ cpu34: cpu@22 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1291,7 +1291,7 @@ cpu35: cpu@23 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1327,7 +1327,7 @@ cpu36: cpu@24 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1363,7 +1363,7 @@ cpu37: cpu@25 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1399,7 +1399,7 @@ cpu38: cpu@26 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1435,7 +1435,7 @@ cpu39: cpu@27 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1471,7 +1471,7 @@ cpu40: cpu@28 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1507,7 +1507,7 @@ cpu41: cpu@29 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1543,7 +1543,7 @@ cpu42: cpu@2a { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1579,7 +1579,7 @@ cpu43: cpu@2b { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1615,7 +1615,7 @@ cpu44: cpu@2c { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1651,7 +1651,7 @@ cpu45: cpu@2d { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1687,7 +1687,7 @@ cpu46: cpu@2e { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1723,7 +1723,7 @@ cpu47: cpu@2f { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1759,7 +1759,7 @@ cpu48: cpu@30 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1795,7 +1795,7 @@ cpu49: cpu@31 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1831,7 +1831,7 @@ cpu50: cpu@32 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1867,7 +1867,7 @@ cpu51: cpu@33 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1903,7 +1903,7 @@ cpu52: cpu@34 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1939,7 +1939,7 @@ cpu53: cpu@35 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -1975,7 +1975,7 @@ cpu54: cpu@36 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2011,7 +2011,7 @@ cpu55: cpu@37 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2047,7 +2047,7 @@ cpu56: cpu@38 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2083,7 +2083,7 @@ cpu57: cpu@39 { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2119,7 +2119,7 @@ cpu58: cpu@3a { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2155,7 +2155,7 @@ cpu59: cpu@3b { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2191,7 +2191,7 @@ cpu60: cpu@3c { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2227,7 +2227,7 @@ cpu61: cpu@3d { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2263,7 +2263,7 @@ cpu62: cpu@3e { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", @@ -2299,7 +2299,7 @@ cpu63: cpu@3f { "svinval", "svnapot", "svpbmt", "zawrs", "zba", "zbb", "zbc", "zbs", "zca", "zcb", "zcd", - "zfa", "zfbfmin", "zfh", "zfhmin", + "zfa", "zfbfmin", "zfh", "zfhmin", "zic64b", "zicbom", "zicbop", "zicboz", "ziccrse", "zicntr", "zicond","zicsr", "zifencei", "zihintntl", "zihintpause", "zihpm", --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 754154657E5 for ; Tue, 15 Sep 2026 07:17:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456647; cv=none; b=EnsMGaOzZ39tYR7/Td0OeZvsiYVW69egswIFahiBYBtwd4FaMq5Y64VnYtb7WYXq6Aol8mcDQOhETjSx2zlFU951bDpwntv9VnE5gVNbLqVfo0SZ2b/H6P8H2j0U8Lpu6+iiOXQK2x5iGQhyVloKn1lZ/3XTvKPE96NKU03NLT8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456647; c=relaxed/simple; bh=kukhi/WZWswDj0RguMnTyGaUm1wiOQMTwL4qZT9oHT4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VrUqQPb0JyclN8dtRxmzrTce24mGllsvHrRdL0BiFObghzj+iM7lBm+fvd86IPmGD2Y5KQNpAsRMBTG/Kgp+uokZB9uKCNZXzsSDZLovWDkvQ8m04qzhkUqNtKTiVpWNwJS5CMjl5mKELMxWCSOgMAvfrM8p59Pn6Cd+lqCES7s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=izyFaTsp; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=M/57NKQJ; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="izyFaTsp"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="M/57NKQJ" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZTAM3316526 for ; Tue, 15 Sep 2026 07:17:24 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= yLaRf5MNT6bdfuQJzz0+hxaTdxUHjMAv6d0xpyWSYCo=; b=izyFaTspFQkNFXi9 dw0DL/rx7ZAfUbaRUECkHMm3rNOX4BlZzrNk/6RUE5fPrUmQ1WxVkxfeuFaHLMqR wbrzpMg0+OH0+S0gUTJyJEYpp9KwPvKg0gIOotDUn7B7vcDs0j4+EtYw5gSYERlr vB/ZSxokxxXP2K0ZPwTT/CmPx4U5KGwZLcXdb7Zwe0tlIRc/Ig6zVXHhZfGAklU4 0rC1kAxsq7bVL59qteRPtXkl2RQKLe/cx4dOrLPXkfoopqVsU1NdJnjI56jCxMWG j/1OWL08HNumdXlIGblNANDdjgBSJ4OSLwUv8aQjPIjcCOOOgMAA9V7ahKXB3bWJ SWqZpg== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpyux0dg6-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:17:24 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-39533bb224cso5283149a91.3 for ; Tue, 15 Sep 2026 00:17:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456643; x=1790061443; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=yLaRf5MNT6bdfuQJzz0+hxaTdxUHjMAv6d0xpyWSYCo=; b=M/57NKQJjOzLYmk92LWn2YErmLkhOC9Cafx1dgqf1UtsATGAysvYsVF5B6e2Cn/WXS dHJQmL+gl1KfEFNba+hsLQFT97mYxNdiVEpP5Kutn1Z/ri6xX6p17M9uZSYKpKYBJtHT aSL0Y32xvrq4XRIVejFiuLDodkYwVGkgReN783EDahMgJujRJ6HSTz/ot3xaPN7lMLUo za7ABaI6Q4lep8k+mal28TfLBzdW38OVty0ykFQc7KPK31o3IN/Q7UJn18Qn+dzVUcWf eOsjD4L70E3BB+PRSVKp2cIS908+J0WeeRfpAgbbuyoQgCJV4hH1yRsiKOExGipksx+l q44w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456643; x=1790061443; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=yLaRf5MNT6bdfuQJzz0+hxaTdxUHjMAv6d0xpyWSYCo=; b=SpHjUwn6VbR2W2pvKFAtf/uo1ioKhW9D9/09JQmSzuD3FcqqCoEqneL2hF+pAo5B0u 2wgTk8lYdXibOhpBLINVWL8XKftnnHyXRRFsjIX0eqhy3CrHBfvWLlTyMP2+g6I/PY+e 0xi5CwG/9fBAS6+Zm4nk7C8QtGQrCpdA5u/k4YvDclsJJa6OFd6fWymCx/A1YoAdAWh4 XMZO8/KX3zPAoAoILFt02qp9NYiQtOjNjG9niesD1fa2OcAwOPughL+QI7yqRl7Z8/Uo CWFIPQAuKpnEnu5Osx51PRrH6qkFRteq3Bs4VU823rKKeahGiE1DscT4/ypZ+TEseOGC Jl1w== X-Forwarded-Encrypted: i=1; AKwUvBzHBNFrZIqDAYithr+3kwyXw2zGAJVe6I3cCz8UfjQMpSJ7z38hZmCgqkojyal0GUbPteEa8/24a8EEoYg=@vger.kernel.org X-Gm-Message-State: AFuF++lzohW8RqBjN6rHkoeDfg7SR5G/dEi6ZHUWRTl5JFuFXubkgEOR kpdtVwgDPHdPPSzAyA0hLCqzLGpfMZmQMARvcYfIeNG3mhGKx5fLjOjv34JFwTkwARYaA2/mZd+ 6y2bfSXFiba2CUlQtRUgLqNqbDULoN2Os5cdwFQAuP/mFiEy2COqFODgj6He525HBgF8= X-Gm-Gg: AYBFou1xYwSbszxJFN+TvzlsnuSEFFxxhEvoiSyCqIV8FGsBiL+/vimTXvLJqCQV63E sDQD6/EoV3xS6QnsWQz9j1HLgjMhS+J3jqQvg+igUjhtVEIeNhTr95ZIwStCLXo0pHD8epyd3bj sWtUFA5YSnIuQ6SAcyuTvbeeKCfWmi+yk7d1UzDQ6m2B2t3q31UylzaudOyP7FL4hBkplfJK8RX gf4LvFE5rwOOOaaWyU/bBZcoi+WbL8b4z9vgk6KFu5OjL41O+KERP0M02I6qUAlQoqQMJW626TV Qk8fInr7ZfJjLaftSQ3cmxBGV++OtoZ1kxRNUlzxPZ46Mkj+khEh/U6epSEO X-Received: by 2002:a17:90b:4f45:b0:37d:f983:7b5 with SMTP id 98e67ed59e1d1-39debf925c1mr11925810a91.9.1789456643027; Tue, 15 Sep 2026 00:17:23 -0700 (PDT) X-Received: by 2002:a17:90b:4f45:b0:37d:f983:7b5 with SMTP id 98e67ed59e1d1-39debf925c1mr11925727a91.9.1789456642507; Tue, 15 Sep 2026 00:17:22 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.17.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:17:22 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:34 -0400 Subject: [PATCH v7 08/11] riscv: Add a getter for user PMLEN support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-8-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Andrew Jones X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=1982; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=rqiM95uXML2sMynfTJbBvcXeaGjmecCzWZWIwJqroOo=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7bOfaP34dHv5gAH59qrglKXfygfk51TXp0uM+PCl xc5tixMHaUsDGJcDLJiiiyHj7Zkb33lE+37nPMHzBxWJpAhDFycAjCR82mMDBc+l8+0+eBeGXT0 o8WDvP1zkoPFOBbPUplaee/kt9OaLKcZGeb6PmSvmKhW+jl0w9p9hvfVNvX9YmiPDKvpvHbO7ne WMzcA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX3dSsZFRuZj13 ar72z1ulIf4RoKEG7uU/4kPSD2z0JpHXtRWwR4jg4k070ItkSKyyOSz1KEkrvEfWscu9nyiBbKH P74UHgSW35IUocn34Pifu84vTZkQHmE3eWtFGRPvpy0cqUoJVGDAwhnA9d1vy/HYZk04J9TCCGt RWldX7OfZxi0fqGii7xTYEGN0FeHD/vlwFOA1mGAAogEuRSBsmYM1xUF7dhyOkRgIf9+HcjFDpY wkBqAAH7QO0hmouScL0cD2tSDLH3KyhVIxokaozblzypBJYGmFAPjRws3pa5etRFQIigb/l0RIH /94UEAkWwXzqByOh7kHdlVxZ43Mvu+hfryechbifEnYRL3Gz32j7mSRJbPfEWE/R2x6kmTPTOza SECl+xmAW3stLZMo1GG0IHI9MhZ5IH17UCVz0pBXhRC2nqV33aPs0wJCAVJ4sSBalzQXaTQLZtg uYAP3BfMflbky+IH1rg== X-Proofpoint-ORIG-GUID: ZcicKtq9Re0LfXY3Jr-wimXxqfC2XW6Y X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX0O6TD3/kb6kB Xu9jTl1RQoZBiXSCVBlaW5P9LqHfw5FAbJyIFq8GA9kiFjRONGP2qNl6Qx7rYx4I6ahhvY0cAdP +LAAeUecTnz9nAu3sJwYK/3ANKh262c= X-Proofpoint-GUID: ZcicKtq9Re0LfXY3Jr-wimXxqfC2XW6Y X-Authority-Analysis: v=2.4 cv=QYLzLcbv c=1 sm=1 tr=0 ts=6aa8f104 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=A_72rIs-Kagud5g8OzcA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 clxscore=1015 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 From: Andrew Jones Querying whether a given user PMLEN is supported is needed for RVA23U64 base detection from outside arch/riscv/kernel/process.c. Add riscv_have_user_pmlen() to expose this. Link: https://lore.kernel.org/linux-riscv/rfuwa7a3ebe76udmnwyrssjy7shkkgxnt= vhwzn6oquysj4tuyp@xzvpylcfhz53/ Signed-off-by: Andrew Jones [Guodong: replace exported booleans with getter per Andrew's suggestion] Signed-off-by: Guodong Xu --- v7: No change. v6: No change. v5: No change. v4: No change. v3: No change. v2: Add a getter for user PMLEN. --- arch/riscv/include/asm/processor.h | 4 ++++ arch/riscv/kernel/process.c | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/pr= ocessor.h index 49a386d74cd3f..da9089695ed6a 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -217,6 +217,10 @@ long set_tagged_addr_ctrl(struct task_struct *task, un= signed long arg); long get_tagged_addr_ctrl(struct task_struct *task); #define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg) #define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current) + +bool riscv_have_user_pmlen(u8 len); +#else +static inline bool riscv_have_user_pmlen(u8 len) { return false; } #endif =20 #endif /* __ASSEMBLER__ */ diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index b2df7f72241a5..5d9cb108a6232 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -302,6 +302,18 @@ enum { static bool have_user_pmlen_7; static bool have_user_pmlen_16; =20 +bool riscv_have_user_pmlen(u8 len) +{ + switch (len) { + case PMLEN_7: + return have_user_pmlen_7; + case PMLEN_16: + return have_user_pmlen_16; + default: + return false; + } +} + /* * Control the relaxed ABI allowing tagged user addresses into the kernel. */ --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 850ED45D1A8 for ; Tue, 15 Sep 2026 07:17:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456655; cv=none; b=GFlwF83Hs2A5nnCpHw6N6nS3uNBF6lMqoWWN9F6BAdx0DYNZO4P3XyT2NqJuap8w+96CbN9skE6AxRdtuwvKlGelSzu7mPx+d71jSN9vSfyEceC/sL7+X1d05Bi72Zd0++KWgKTUIV2XCqKRQwQ9k0+LQA7t6N1MVrbsKEBtR7g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456655; c=relaxed/simple; bh=AWqWG6VxlflSFSzoqp4jCeQqQPDGRE6cdtAKV5mteNc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=KsZaAefuPRqgrBZW9yG494b2mcTq6OApim5qbil5kKQaJl+lGw7ln5/ElVnzdNj9PVimPsIDqIh/ZfPoABMLLT746DDx9xEzFl3ngGHX0ZvOghjC41eh1aaE0srCgGr1gTH23I41k+IkK6syNuS7+GLXKvpWd3LLD6sPf21beT0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=SPWks4+r; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=DLEauS/+; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="SPWks4+r"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="DLEauS/+" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6ZOcA1661451 for ; Tue, 15 Sep 2026 07:17:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= eeFOyk3q/BZvRjuJEhvKLX8LBrKipvgEIaJeKKaoEy0=; b=SPWks4+rEr9I5TSa SWGU3hX0SYmhaht54r/fN5dYD/cVd5yZKTpVs4v18l1jx1EC2SFEFnRRz8fEYmRR fQ+/fqN6cyeHl7BxRNmbGLUB8X8nRZPIF3J6ztoNsoJGWvCsiybqgToK44hfGDEd Awrrvh2w/aVw9ZqTTJoxuFFHGVDjJVqbqKITulrHife/nDHxxUAa/ucme6GHRMM6 3X1yxct5UtAkIt7wqMqiNpNyzY9ZK5Ky+NgsoJQsqfpgBCzxFRUslMkHswkUK2KO NxpjAIqYL/V4AUIKGleXZuS8PzJtH9fRT+lAMZAPf+tNvS6+/Oiwt/TaVwq5Lc2W D+1xAw== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpergcg5p-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:17:32 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-38ecc48b3c2so6947886a91.1 for ; Tue, 15 Sep 2026 00:17:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456652; x=1790061452; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=eeFOyk3q/BZvRjuJEhvKLX8LBrKipvgEIaJeKKaoEy0=; b=DLEauS/+YNf3GfbhABu8BrFNgHomyzrQg3ihmPuVpVYixgNO1/myOh5N0QbxNpZCwo f1BxwkKdpgfU2Uh68I6X8V5GpdGXervChd6nmfOlkb8V5ycQesK9WrckdHszNOPlak+F EpbMNWN0fQ7lNrGa/A46+MAVARfX+ok+3iraE8fFUiNiWzzIlQWFAUI3szWOs9TMBc90 LLRl8l6gbAtTP9f2gvuxPQQRLcf/eaZ4wldfRUI1QP/bKXqtSVz6yhAhPkHY5sdeAZC0 vn2cdQSeebBxVkSgrSEdsdu82L1WyBSikWqV327gsiyds6TXStBHBW1JDqPAbMCTfWiF drZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456652; x=1790061452; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=eeFOyk3q/BZvRjuJEhvKLX8LBrKipvgEIaJeKKaoEy0=; b=KlgcXty3HwplReGgF5L0834OuUXycqZsXs/kAYIWHdp387bLc0IqCFISIKWeQRdVtL XPEla9uRgOlxxEzfZ1lP1keRc6Ob5L2C6lLPquDRIVoKD3RslXyGnt8z2iWkQIx/P9jS 8tyRuGeHRsaDgV8LaJ0QsAZBsPkepvC+xtRNaj0/4ZOwRssQul7Oz2Tes1z0sQYXnXzj godXNrE/EY1kAcT3O0vz7C8rktffet8rhXbXXyEPn289V1X3PEWh0FZkqm6qHH0uWkmD G1/1pfJFPwM6J3+i2wRZ0Cy77xBMHWEDevM8OGXxJpUuQiap1eXTEiPsxUuhFRT03EOF uFRQ== X-Forwarded-Encrypted: i=1; AKwUvBwDVFVFxX95Q6q9cAP3VLErIPscD6U+PeO1HjqfJa1CZEldAIDjXP4Q/w0spNIe8zhDyfZQLcOjgnZJRHA=@vger.kernel.org X-Gm-Message-State: AFuF++mBNtvDX3VJ1Y2P/b7S24nxSulU6Xsk4Dgke9+u9XeRIR1dd04z p0TeW9ov1nd36Qx353v5LpfUb3GSjAvMgzxfBFXhoN0vArekacUkMzg4DtIaD4sjnlfPCLq0Ta5 xmPqBYiw6njEeSxo/6CUlg7PSCiPLnlQdiVG1udtKuZpTbvhusQ5T2kLN5DoViJ9q9i0= X-Gm-Gg: AYBFou1/en7KhzcHlgBLnrvmNV572GMajJDPi6ya1h/xm/bAiRvmTCf4UTO0wbYTj60 ZibPKbOqEAzE3iY3SC8WFmeBIxxcS0mQ3m0R7XJgbMxNdwdwed2+tYzBcuvk9Aka055Dy7mHZiN Ua2hnAF4la3N8VFKqgde6ah1VFduzLaPtF79MuAlzhKeYJh+PhFR4byvj4Dt4mg+AlmzkurIIQO 3pTGm/biADQk7zmNNUjm2GwAGcwZ9exAd7GqzG6lUu4JNtfAvlhwxy3JsxKn32sQuoDhBRYxxU1 3Z/g++fjVuShOxXvZGQzANDKoY7to/ghM9qqYBflsSvmmlP0HjwsZSJqSHa2 X-Received: by 2002:a17:90b:3cc7:b0:39e:d2a:e272 with SMTP id 98e67ed59e1d1-39e0d2aee44mr279569a91.5.1789456651491; Tue, 15 Sep 2026 00:17:31 -0700 (PDT) X-Received: by 2002:a17:90b:3cc7:b0:39e:d2a:e272 with SMTP id 98e67ed59e1d1-39e0d2aee44mr279516a91.5.1789456650899; Tue, 15 Sep 2026 00:17:30 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.17.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:17:30 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:35 -0400 Subject: [PATCH v7 09/11] riscv: cpufeature: Introduce ISA bases bitmap and rva23u64 detection Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-9-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Andrew Jones X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=7799; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=AWqWG6VxlflSFSzoqp4jCeQqQPDGRE6cdtAKV5mteNc=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7bN2ca5v8e1OveLfdXJGnaNPYtSvE7u0ZfaLu3r+ bZ34wedjlIWBjEuBlkxRZbDR1uyt77yifZ9zvkDZg4rE8gQBi5OAZjIPA5GhvsT2X3ONTgYht2w PFdV7GCv2d72e6N528HrD34qfV4scZPhf1iB0fEZn53Sf//4G7ZHWFPCPPPUzfk2N9SfBk7cbHz /Ci8A X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Authority-Analysis: v=2.4 cv=QK/91QLL c=1 sm=1 tr=0 ts=6aa8f10c cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=EUspDBNiAAAA:8 a=8k0796NHAHKl4oQHd1QA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-GUID: 7jiZ686i4wfStm0QVyPhg_ng3mzvwuQ5 X-Proofpoint-ORIG-GUID: 7jiZ686i4wfStm0QVyPhg_ng3mzvwuQ5 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX3ANmwhUfCEbA wxjA9Df3CINjpyWkOJrkqHG4rmbiWHJOq3b6USevXIFdYGrC8Ma60I0rrbUIj5mOAUJsP4m0Nso ceW4oT+r/q2ESxUbE59EU3qYun2zA+V3SZRktC76ZVXUIvDsFZ2q3D5HYJEX7LOg77BkuNEgWoF toiUtf8NYAyET1KzkNF7JZrbmUboZvt2sEozXp9iay69octXaJgZd1Bi4EMh9JZfPtm2eZfoUbs 6RmQDrWTmgswGt6MeWfLJu8OGvSBKOINoQnsH6ZMYnp+eVhuD3Nt4VqhZ8R+3PSERrxlSNHP7W6 M9pOp6OsF39bC14+uqzgPQSTg9wch+NVs/E+y277lh6qgZiDmrGMtGCwkfbJ/92MErsXb9SQApN hR4wzoWuGELeOp/xmJD2MT2zPsLIVHLhTIduLV14BCxrNNJFu1Y55hF6Qc6ficuc86zo+it6P3Y Vn26fbc+EBB77G5iBWQ== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX+L9a3WTWL9au pSroBrxMZDIdis9fUa8Rv5vw3fk89L4VYCjjJYUrJCXTQs05QTVj1T8UQc2d/Tr1jz+poVZawzL RGzgrqeuo4IE3+ADhgNNsnt9sVYDjaI= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 adultscore=0 bulkscore=0 clxscore=1015 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 Introduce a per-hart and host-wide bitmap of conformant ISA "bases" (named profile-class sets such as IMA and RVA23U64), computed at init time by riscv_init_isa_bases(). Register riscv_init_isa_bases() as an arch_initcall. That is late enough that core_initcall(tagged_addr_init) has probed senvcfg.PMM and populated have_user_pmlen_*; without that ordering, riscv_have_user_pmlen(7) would still return its default false and the RVA23U64 detection path would always bail. It is also early enough that arch_initcall_sync(init_hwprobe_vdso_data) finds the bases populated when it snapshots the hwprobe values into the vDSO data page. Consider this as the cache that subsequent consumers (hwprobe's RVA23U64 base behavior bit, /proc/cpuinfo's "isa bases" lines, etc.) can read without recomputing, which keeps them consistent with each other. Signed-off-by: Andrew Jones Signed-off-by: Guodong Xu --- v7: - Register riscv_init_isa_bases() at arch_initcall, ahead of the vDSO hwprobe snapshot at arch_initcall_sync; v6 returned 0 for RISCV_HWPROBE_KEY_BASE_BEHAVIOR through the vDSO. - Keep riscv_isa_bases static; add riscv_isa_base_available(). v6: No change. v5: No change. v4: - In riscv_set_isa_base(), reorder those __setbit(RISCV_ISA_EXT_X,m) lines to make them conform to the order they appear in the RVA23 1.0 Profile. v3: - Add a blank line before the subsys_initcall() registration (Andrew). - Set the local ext_mask with __set_bit() and test the mandate set with !bitmap_subset() (Sashiko). - Require the Zic64b ISA extension in the RVA23U64 mask, instead of open-coded cache block-size check. (New, thoughts from Andrew) v2: - Implement riscv_init_isa_bases() that runs at system init time, after tagged_addr_init() populates have_user_pmlen_*. - Split RVA23S64 placeholder into a future patch. --- arch/riscv/include/asm/cpufeature.h | 13 +++++ arch/riscv/kernel/cpufeature.c | 113 ++++++++++++++++++++++++++++++++= ++++ 2 files changed, 126 insertions(+) diff --git a/arch/riscv/include/asm/cpufeature.h b/arch/riscv/include/asm/c= pufeature.h index 739fcc84bf7b2..89c64d42ee745 100644 --- a/arch/riscv/include/asm/cpufeature.h +++ b/arch/riscv/include/asm/cpufeature.h @@ -25,8 +25,20 @@ struct riscv_cpuinfo { unsigned long mimpid; }; =20 +enum { + RISCV_ISA_BASE_IMA, + RISCV_ISA_BASE_RVA23U64, + RISCV_NR_ISA_BASES, +}; + +/** + * struct riscv_isainfo - per-hart ISA state + * @isa: bitmap of ISA extensions this hart implements + * @isa_bases: bitmap of profile bases this hart conforms to + */ struct riscv_isainfo { DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX); + DECLARE_BITMAP(isa_bases, RISCV_NR_ISA_BASES); }; =20 DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo); @@ -130,6 +142,7 @@ extern const size_t riscv_isa_ext_count; extern bool riscv_isa_fallback; =20 unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap); +bool riscv_isa_base_available(const unsigned long *isa_bases, unsigned int= base); static __always_inline bool riscv_cpu_has_extension_likely(int cpu, const = unsigned long ext) { compiletime_assert(ext < RISCV_ISA_EXT_MAX, "ext must be < RISCV_ISA_EXT_= MAX"); diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index de7cff5f48c34..f88031660e6fc 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -41,6 +41,9 @@ unsigned long elf_hwcap __read_mostly; /* Host ISA bitmap */ static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly; =20 +/* Host ISA bases bitmap */ +static DECLARE_BITMAP(riscv_isa_bases, RISCV_NR_ISA_BASES) __read_mostly; + /* Per-cpu ISA extensions. */ struct riscv_isainfo hart_isa[NR_CPUS]; =20 @@ -81,6 +84,26 @@ bool __riscv_isa_extension_available(const unsigned long= *isa_bitmap, unsigned i } EXPORT_SYMBOL_GPL(__riscv_isa_extension_available); =20 +/** + * riscv_isa_base_available() - Check whether a given ISA base is + * available or not + * + * @isa_bases: ISA bases bitmap to use + * @base: bit position of the desired ISA base + * Return: true or false + * + * NOTE: If isa_bases is NULL then the host ISA bases bitmap will be used. + */ +bool riscv_isa_base_available(const unsigned long *isa_bases, unsigned int= base) +{ + const unsigned long *bmap =3D isa_bases ? isa_bases : riscv_isa_bases; + + if (base >=3D RISCV_NR_ISA_BASES) + return false; + + return test_bit(base, bmap); +} + static int riscv_ext_f_depends(const struct riscv_isa_ext_data *data, const unsigned long *isa_bitmap) { @@ -1334,3 +1357,93 @@ void __init_or_module riscv_cpufeature_patch_func(st= ruct alt_entry *begin, } } #endif + +/* + * Compute the set of profile bases (IMA, RVA23U64, ...) a hart + * conforms to, given its resolved ISA bitmap. + * + * If @isa_bitmap is NULL, the host ISA bitmap (the AND across all harts) = is + * used. + */ +static void riscv_set_isa_bases(unsigned long *bases, const unsigned long = *isa_bitmap) +{ + const unsigned long *isa =3D isa_bitmap ? isa_bitmap : riscv_isa; + DECLARE_BITMAP(ext_mask, RISCV_ISA_EXT_MAX) =3D { 0 }; + + /* IMA */ + __set_bit(RISCV_ISA_EXT_I, ext_mask); + __set_bit(RISCV_ISA_EXT_M, ext_mask); + __set_bit(RISCV_ISA_EXT_A, ext_mask); + + if (!bitmap_subset(ext_mask, isa, RISCV_ISA_EXT_MAX)) + return; + + set_bit(RISCV_ISA_BASE_IMA, bases); + + /* RVA23U64 */ + + /* Supm with PMLEN=3D7 */ + if (!riscv_have_user_pmlen(7)) + return; + + __set_bit(RISCV_ISA_EXT_F, ext_mask); + __set_bit(RISCV_ISA_EXT_D, ext_mask); + __set_bit(RISCV_ISA_EXT_C, ext_mask); + __set_bit(RISCV_ISA_EXT_B, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICSR, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICNTR, ext_mask); + __set_bit(RISCV_ISA_EXT_ZIHPM, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICCIF, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICCRSE, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICCAMOA, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICCLSM, ext_mask); + __set_bit(RISCV_ISA_EXT_ZA64RS, ext_mask); + __set_bit(RISCV_ISA_EXT_ZIHINTPAUSE, ext_mask); + __set_bit(RISCV_ISA_EXT_ZIC64B, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICBOM, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICBOP, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICBOZ, ext_mask); + __set_bit(RISCV_ISA_EXT_ZFHMIN, ext_mask); + __set_bit(RISCV_ISA_EXT_ZKT, ext_mask); + __set_bit(RISCV_ISA_EXT_V, ext_mask); + __set_bit(RISCV_ISA_EXT_ZVFHMIN, ext_mask); + __set_bit(RISCV_ISA_EXT_ZVBB, ext_mask); + __set_bit(RISCV_ISA_EXT_ZVKT, ext_mask); + __set_bit(RISCV_ISA_EXT_ZIHINTNTL, ext_mask); + __set_bit(RISCV_ISA_EXT_ZICOND, ext_mask); + __set_bit(RISCV_ISA_EXT_ZIMOP, ext_mask); + __set_bit(RISCV_ISA_EXT_ZCMOP, ext_mask); + __set_bit(RISCV_ISA_EXT_ZCB, ext_mask); + __set_bit(RISCV_ISA_EXT_ZFA, ext_mask); + __set_bit(RISCV_ISA_EXT_ZAWRS, ext_mask); + __set_bit(RISCV_ISA_EXT_SUPM, ext_mask); + + if (!bitmap_subset(ext_mask, isa, RISCV_ISA_EXT_MAX)) + return; + + set_bit(RISCV_ISA_BASE_RVA23U64, bases); +} + +/* + * Populate the host ISA bases bitmap (riscv_isa_bases) and each + * hart's per-cpu isa_bases. + */ +static int __init riscv_init_isa_bases(void) +{ + int cpu; + + for_each_possible_cpu(cpu) + riscv_set_isa_bases(hart_isa[cpu].isa_bases, hart_isa[cpu].isa); + + riscv_set_isa_bases(riscv_isa_bases, NULL); + return 0; +} + +/* + * Registered as arch_initcall: late enough that + * core_initcall(tagged_addr_init) has populated have_user_pmlen_*, + * and early enough that arch_initcall_sync(init_hwprobe_vdso_data) + * finds the ISA bases populated when it snapshots the hwprobe + * values into the vDSO data page. + */ +arch_initcall(riscv_init_isa_bases); --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68DF745C6F8 for ; Tue, 15 Sep 2026 07:17:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456664; cv=none; b=NsRHNcCTxGZi0NamNQChkRDDB4y9u/iGi3yY4xCTGxMaFdPPQ8NfxeN4He971cuo5QpgTNe2qGPwmRCSGjg4trcBADVQSmq5z8R1n+CD34wgPx2pDEx+GNV1+7aNa/8A3uCB6+YVKMbezglzowd4n3sES0yutD3kWIFTbZwr8AA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456664; c=relaxed/simple; bh=MFEXerAp8YkUeh1632oAcakBkgoa+iIvn8OYQFJJq/g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gi4Q6C6X1jeQijYx5BC+69vUqOQRv3j8IOY0g2uoO81bZJbz0/GFSaXy4R5VKPe2e1tNHOWwFZFmyI+qWajGEGR35/Ev/wjIqXbbZd5UVvnnCvoH22WgW+w1l1MSWt0aTa6O/L9splHL9kbDbdXijSjI6l7khIqc05o4Mxl5/Xg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ljcbxh5g; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=HN130mgF; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ljcbxh5g"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="HN130mgF" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6Z8Tg2892414 for ; Tue, 15 Sep 2026 07:17:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= bl9v/AgdP0OwD+z9bA97aQ99CJ8kyJB54LPdNFAL3Tc=; b=ljcbxh5gBgC5LYEh mseWdzdISqshcJZLWNVvf9ju2i3w8FWfDrKb9DcuIPRj0u1JpTht2dqfbYnJVnlP 7qKI7IE/NicBdV5NDBMtIb9jvQLz7vncAQmsc/GuhP/KM+i+wLk9/uBpeoDX9OCg KbsTLB1GKVEz4ViTD/wgCd4ojrjxl5Mqgxf7echK7ORomS52oGF44xZhBKQF88zK 74sR56TwfOf/6yEydMj1N4dWUqYZ3caGzi7s8+MP/6YNaB2niqaPzco24wRrFeiU 9Ku+z2kFa8Lxc7BhlRJQt7UpQHR91n4i/h37wTuh9lwwn7g57S7wOtik8vCSuQR5 WY7m7w== Received: from mail-pj1-f69.google.com (mail-pj1-f69.google.com [209.85.216.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpg2kv8jb-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:17:40 +0000 (GMT) Received: by mail-pj1-f69.google.com with SMTP id 98e67ed59e1d1-3965ba1ba3eso5088647a91.2 for ; Tue, 15 Sep 2026 00:17:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456660; x=1790061460; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=bl9v/AgdP0OwD+z9bA97aQ99CJ8kyJB54LPdNFAL3Tc=; b=HN130mgFi29D2gXKcQDGpiRGY/ILDEKyOJkXt/tlg0kip7Q9BwWs+XngoT2SMnKsa4 27mlN0v4p8TRBuvT6V2qkWljwVC86QO/RcLlJwlNbvKmMrTCUiUMzxzTTy+QiHAdQfrS XY2DHp/eMnkDQyduHCgAO/X6/FL404AoLAhUCY81Tvl6XiVaw/ZSJ8PwcKM7/oQ+jRDq DLh7DJgxlmyDeeSWBzxTYCNI5Mx7kg80Ri/fGBmS5XRbII9qeg+zhmMpOhXRlMsegeKl oyeoF1a3fRAF88k3SAwKgUwVvGkBKSeEfpZ29Id8qOlt8TVZdWKuqQkTcx3zzvr2qoJ5 ryxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456660; x=1790061460; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=bl9v/AgdP0OwD+z9bA97aQ99CJ8kyJB54LPdNFAL3Tc=; b=SAfEU5a8ByCoyQimlcecyiCugLVgrX+/9lo4b/MOe3kNZbKKxtbzhpFEkZUSU4x4T7 1nK74Ex4grMvuyXjjtqAikWbU4dZVUUuDYg3VlMXpo17RP7ZFCmT32+D5YaeXpOklOdP 1R37MtgeE/xHha2LoytORdUrF6MKwKGxArvu3htLopN7Bj99Nu0EFt49eSyLejgSXBZU CNjftw3sqmIxnYDDPD+4ruNJ+JIzTERF7sIB2MlV11Ph7ADlZm5jzC6nsQ7o2eCw/kI7 N66EildwxgZz+SX8RJjnohtUIfcKoWUOueUe88biygCHpKQkB6Pqu6/9GddXLRlhyKWx 9eig== X-Forwarded-Encrypted: i=1; AKwUvBwaSIIot2FEW3r0HgXtXELiq+frKlgxVpAVr2C/Ide3i0/nYHwrHs/9he0PM8uSx0GwHDPOYI2719wAc0E=@vger.kernel.org X-Gm-Message-State: AFuF++mXwE1/nSCs8Wn6QrWW2t+43pVkRF5G3u4FeNHyGrsRNt0KKjuv 1oJlWkXxhcpWgdBgyyahtobiOVyfAilrMwKytZdZS5zi3VMx9MvyDeUtL3zvC/xZaCiAwWArwYf XAvd4e0OIIUD7BLqYwYzWkp8UHtaPFwhWlhhiz98mZaWiryr8LxUPgkMZlpMvud1z830= X-Gm-Gg: AYBFou1rlZ0ibAzcjmDtTfsZeptpBmqO/a/roZT0ZZVwhY2yL/Axer1TKAywB+yVWY1 Y9v2V36Q2xFfkDdu7ZZtluYAKc5+ae6ICFn226XBxFb08GpV2uvZLJOaIxRYgiMfISh7iVjvqFx 4h0UxtIzBDg74kqXoaYPky/34Sh1hYp+MwUqk7PxqacdshdvjDX7//HhQCiQrk+woPToFY0S8p9 PKvbNMrcEUfxZgD8gyqNgd09L3wELZ87hZNjKnn7M8p/EJlSjGdkqpRXyHDtgeDHzuBKmyaKxOO FIMckNZjfRXLkDNORxZeuySOPAriY+mnBW/pUraXrTgNq7qxDRt3KXIBPhTB X-Received: by 2002:a17:90a:f16:b0:39e:b7:cbe8 with SMTP id 98e67ed59e1d1-39e00b7d278mr3590029a91.5.1789456659731; Tue, 15 Sep 2026 00:17:39 -0700 (PDT) X-Received: by 2002:a17:90a:f16:b0:39e:b7:cbe8 with SMTP id 98e67ed59e1d1-39e00b7d278mr3589957a91.5.1789456659306; Tue, 15 Sep 2026 00:17:39 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.17.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:17:38 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:36 -0400 Subject: [PATCH v7 10/11] riscv: cpu: Output isa bases lines in cpuinfo Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-10-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Andrew Jones X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=2779; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=MFEXerAp8YkUeh1632oAcakBkgoa+iIvn8OYQFJJq/g=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7bZ1ogEmMSfY9Oy1bh0rMZyYUpccPK+Cxpmlw4ec vA5ZXS1o5SFQYyLQVZMkeXw0Zbsra98on2fc/6AmcPKBDKEgYtTACai1sjIcHHTx/Qdf29cUxGf ub15s/LP7Vcnhl451Wpyr6pCXqNSeA0jQ1c54/Xc1X+3zqv7LLRrbsfJd0tXmJUKx3aq7blcoqT 8mxsA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Proofpoint-ORIG-GUID: rzuXs_JCkeFwOqM1zbLLpYZ9_Bjca0IT X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX1kUPo/LqSyJx GyLDhEv8J9GSqXeNXFYCqcaJ7Z5/FAyaRhI4b2Z04LuKmzE3L4CtzBStvcKNnG7td6jgu88j+Nk OeQ+xsYKS3Mmcbes77XwEy8aHHtEql3MufmNI9byNDkeScIWeAMm7XOYb1CdiwVRUN+Ru1vGTN0 B4xBrARJD6oPvelCrVzQXAiTXkH8CqeyI0TgpYp9hBdqfbKU0C3I0Tg3imkw0Er/K44rTmVHPwR RXVmmUO0CezrI5QM5m221lBMkPD4jF8a19Ro9VHLyr+weSjlagHZsXNC78No++GW/e2HCjZ6flb y2lgJksR6TSNW0HBl2piS4SJym0J3dYMWQI5b6s1L/X0F99vBFGkoda91fFQwcGDxdh7L3GmxbR xesijsVoCKvJwNy1P7Y3bPppmTht8Z6BfVsBFZw1zuiZArWfP6beHuVeWLFS9RndHWJePxpr17b RU03yWxOJtGd6Zps1jg== X-Proofpoint-GUID: rzuXs_JCkeFwOqM1zbLLpYZ9_Bjca0IT X-Authority-Analysis: v=2.4 cv=M7TYuCws c=1 sm=1 tr=0 ts=6aa8f114 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=iQKFDb15jVzJNXG1q_sA:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX5G6KG6QexcNl UD+4QSSDvIgnmNjUY5KKPqdCdfZIqxykqSE6PX8ePsv0DC2HmuqE3nA1SkaMo78Nv5xkHDwPSh0 KOdYtYXCXeivijB0+XXZ76+159qdcnA= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 bulkscore=0 impostorscore=0 suspectscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 The "isa" line in /proc/cpuinfo lists a hart's extensions as concatenated string, but not which profile base it satisfies. Add two lines that report them directly: isa bases : hart isa bases : Example output on qemu booted with -cpu rva23s64,sv39=3Don,pmp=3Don: processor : 0 hart : 4 isa bases : rv64ima rva23u64 isa : rv64imafdcbvh_zicbom_zicbop_... ... hart isa bases : rv64ima rva23u64 hart isa : rv64imafdcbvh_zicbom_zicbop_... Signed-off-by: Andrew Jones Signed-off-by: Guodong Xu --- v7: Use riscv_isa_base_available(). v6: No change. v5: Simplified the commit message. v4: No change. v3: No change. v2: - Read from the cached riscv_isa_bases and hart_isa[cpu_id].isa_bases bitmaps populated by riscv_init_isa_bases() at init time. --- arch/riscv/kernel/cpu.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 3dbc8cc557dd1..d06824048aa25 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -305,6 +305,26 @@ static void print_mmu(struct seq_file *f) seq_printf(f, "mmu\t\t: %s\n", sv_type); } =20 +static const char * const riscv_isa_base_names[] =3D { +#ifdef CONFIG_32BIT + [RISCV_ISA_BASE_IMA] =3D "rv32ima", +#else + [RISCV_ISA_BASE_IMA] =3D "rv64ima", +#endif + [RISCV_ISA_BASE_RVA23U64] =3D "rva23u64", +}; + +static void print_isa_bases(struct seq_file *m, const unsigned long *isa_b= ases) +{ + unsigned int i; + + for (i =3D 0; i < RISCV_NR_ISA_BASES; i++) { + if (riscv_isa_base_available(isa_bases, i)) + seq_printf(m, " %s", riscv_isa_base_names[i]); + } + seq_puts(m, "\n"); +} + static void *c_start(struct seq_file *m, loff_t *pos) { if (*pos =3D=3D nr_cpu_ids) @@ -336,6 +356,9 @@ static int c_show(struct seq_file *m, void *v) seq_printf(m, "processor\t: %lu\n", cpu_id); seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id)); =20 + seq_puts(m, "isa bases\t:"); + print_isa_bases(m, NULL); + /* * For historical raisins, the isa: line is limited to the lowest common * denominator of extensions supported across all harts. A true list of @@ -360,6 +383,9 @@ static int c_show(struct seq_file *m, void *v) seq_printf(m, "marchid\t\t: 0x%lx\n", ci->marchid); seq_printf(m, "mimpid\t\t: 0x%lx\n", ci->mimpid); =20 + seq_puts(m, "hart isa bases\t:"); + print_isa_bases(m, hart_isa[cpu_id].isa_bases); + /* * Print the ISA extensions specific to this hart, which may show * additional extensions not present across all harts. --=20 2.43.0 From nobody Fri Sep 25 12:05:54 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 217FF45C6F8 for ; Tue, 15 Sep 2026 07:17:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456672; cv=none; b=FKt7ExxN9RzK7NiYhRK+CmgtB/+zVmrLseng2rklek3XOAyALmr7WB9pJd8sK6TSFdKCvERc/ZVL1vjZSd5eelbJ5/XsyuqO0xKcIc7ehiCRLS6RMpt0K56G02iOgt7efp5iIj3OADGb+sAMF1SDX5pwvrqyeXNNuJFWYwZuKQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1789456672; c=relaxed/simple; bh=hAXGf3fwKFEiB3f4/YXlhsIaiotd9AUAeVeNMwuOMCQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MNWkPC+n1AEQodMIL7gmsvVK2l37QZUdSNcBq4rWhhVfAYeNUR5LbHN0WCjF3rQrye5t9uFxi55BfWWPF/FyIc6cdaxuaEM1fgUndzkxDT0tceUvb+SUH8GTt0gMrRFyUJK76o1hMVhoRbPPdKSnXVNkEd2ARMemfMaqTTq6S9o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=UIhqtdmh; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=SOUpZoXE; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="UIhqtdmh"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="SOUpZoXE" Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 68F6Zf2B3126464 for ; Tue, 15 Sep 2026 07:17:49 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= xlfk++XyU1ksGb867DX9M/DYidhT/J3K0XN0SWFOlDU=; b=UIhqtdmhYfZGZQJA FBERNDICmZ+DiCoaE9/9Ba+de1bRnGJNuXWg2e80AqWSEGjWYed7uG00K43AAi3c f5VZ9xpVDpLt6q4bBxqCA6b6mM2rKD/rC3SY4qVqqoHU6AuSraDcAVinEykwFpSH PsUdmTwe+dW/tGfuInRYMtebxkJCy6ErmQwc1yX1lQlFtkOuZmwlJR1BJecyv75l TMAYbg2dmQP39DS9KpeeNgIGHoTlgEF05UC1HAmh1gmvio/PLtODyk95lK++O9XJ P5K9yzTaDX8zvpgkfGQBT4QdNNiHmBHXybD9Yx37U21U2R4yN2V+MRXZi6A/JNjo imPlwA== Received: from mail-pj1-f71.google.com (mail-pj1-f71.google.com [209.85.216.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4gpmx9u23t-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Tue, 15 Sep 2026 07:17:49 +0000 (GMT) Received: by mail-pj1-f71.google.com with SMTP id 98e67ed59e1d1-39de4a68f7cso3048384a91.1 for ; Tue, 15 Sep 2026 00:17:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1789456669; x=1790061469; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=xlfk++XyU1ksGb867DX9M/DYidhT/J3K0XN0SWFOlDU=; b=SOUpZoXE8K2LQQD8p1g91cqWygvVYsUIjbfdWP3cSnfTe4jvZ7sl1Er3b1rRukg6X0 FxTHvMUzp3cogkOE8YMU1RmyHeR1SlI6GbGF5HuIgmg+yPFTWxs65+ORaSCRdURpSkzk /KXCEBT5nfnYQZNzxQXSzKNOGLCM98yZB9BvIOog17Hn6uiSbP0al2BSi/0JctAYLPMB WQqB4NkgwTied71qiFEeLE1psh9bYzx3ygaqTRPE6GC87d8qOVgikO9vdNE45IDCeH/O vyrSHt1sGesAqcg/62oXsrj6/dA+otNZiEh9tIFOO1TBb2GClbiRd2R502K8Oy3xlLvG mACQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20260707; t=1789456669; x=1790061469; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :content-type:mime-version:subject:date:from:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to :content-type; bh=xlfk++XyU1ksGb867DX9M/DYidhT/J3K0XN0SWFOlDU=; b=P0aR6bYyjEXr6VJ1zmRrSJNjoXP1F6tYn5ayZgdHBHuPWkNwp4ACMHFEhHtKDth3vc 1BsKO6kziiUvlNUufXSuuqZcuIlNrzTTwGzhx+v/E2odbd0mSn0MUz50pJNBghNuOkOY zOOtRtuctlyGaIfyPndGDfizTtYehHjDs+2oE1xgGrzYA+/ZuOQdOqTfJkEemGcRTQ+G nz4tnr6OFI0IqJxn+4o0KSkaCpQPHttSKhBpw57bpsnVY3ib6eh2l78l+cMg8MY6hLmu Xq3WMaR1lNUsQMq08tocivNNIU6Jkr3S2nYW68bXGgwQc+lmuVEC2h5Cl6eUYneWR4C+ UiyQ== X-Forwarded-Encrypted: i=1; AKwUvBzOzb0G1dcOlrectPofed6AP2cptQWmJ8YLSwneZzkHYBJcGfEBXX+VulF+ft7tUxJFna+lZZKCrZe0fBk=@vger.kernel.org X-Gm-Message-State: AFuF++kOfLUnZE8wgivpA258fhHMlF5fPL0GgI4oeSA01G643DaW4G09 4aCpliqGqZhhMvqqqaRDFfr9kBsbGqwhKVGB5HObAFC69miBxX4FoKnI6pXhx1eHNQO3wQT9vZD MSVqqBC4+b/aGBalPYqIEywvXCBQlKEhUj3MnyPZcYyeK1S0qQh9r6kpnPCxfxYmStXg= X-Gm-Gg: AYBFou3LOOWFAnlOT/6mGa18A2A57PYaxzSuf4pqME4I6jxiHkFk3a0N7g2kqEej7Jn hDeNK6pIX64MVXMKhTcn7jUbbzcMC2UeNVgMCLj/hSKWaYEHEb+dbqmp5gevVp2XCvIpi0Gd7wg qWVuhEOSxMezsUzMAn4FTdXgo4rtN3FcnD7+8j1BWeQCvrJ9zD7OJLEG4TP/iUauDY2W+OEKcoQ ze5nmmcw5RjUbikc9j7KphGF92XK0C4J7mrA31kQODBOvBfuR8ETfKE47jDxLaUezfUMcdijI7q SEdCuomCPeAFgE9r2rn/aebkCIzIApQFwYhN+WGXI230lmFlunE7C2UgffTm X-Received: by 2002:a17:90b:3e50:b0:39e:2f2:214b with SMTP id 98e67ed59e1d1-39e02f221afmr4277489a91.16.1789456668470; Tue, 15 Sep 2026 00:17:48 -0700 (PDT) X-Received: by 2002:a17:90b:3e50:b0:39e:2f2:214b with SMTP id 98e67ed59e1d1-39e02f221afmr4277428a91.16.1789456667863; Tue, 15 Sep 2026 00:17:47 -0700 (PDT) Received: from [127.0.1.1] ([2a12:a305:4::30fb]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39dfdaccc0fsm3447120a91.15.2026.09.15.00.17.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 00:17:47 -0700 (PDT) From: Guodong Xu Date: Tue, 15 Sep 2026 03:15:37 -0400 Subject: [PATCH v7 11/11] riscv: hwprobe: Introduce rva23u64 base behavior Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260915-rva23u64-hwprobe-v2-v7-11-aa35ebd9ae96@oss.qualcomm.com> References: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> In-Reply-To: <20260915-rva23u64-hwprobe-v2-v7-0-aa35ebd9ae96@oss.qualcomm.com> To: Jonathan Corbet , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Yixun Lan , Chen Wang , Inochi Amaoto , Randy Dunlap Cc: linux-doc@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Paul Walmsley , Conor Dooley , devicetree@vger.kernel.org, spacemit@lists.linux.dev, sophgo@lists.linux.dev, linux-kselftest@vger.kernel.org, Palmer Dabbelt , Andy Chiu , Florian Weimer , Peter Bergner , Zihong Yao , Mark Harris , Aurelien Jarno , Guodong Xu , Andrew Jones X-Mailer: b4 0.15.1 X-Developer-Signature: v=1; a=openpgp-sha256; l=5107; i=guodong.xu@oss.qualcomm.com; s=default; h=from:subject:message-id; bh=hAXGf3fwKFEiB3f4/YXlhsIaiotd9AUAeVeNMwuOMCQ=; b=owGbwMvMwCXWtEl1Z3CGpCDjabUkhqwVH7YpVSuJte9Zvqye67H+4vxXO2sv8DXe11vvPKvAz K5jldmljlIWBjEuBlkxRZbDR1uyt77yifZ9zvkDZg4rE8gQBi5OAZjI9yBGhifdP94cOHHwtdIF NvV1l00OBU1YXDvX8duRD6KLxEN1krgZGR7811SWUZ3wqXElB7PmRZ5JE2Yy20bnNv1eNPOccrF 8GBMA X-Developer-Key: i=guodong.xu@oss.qualcomm.com; a=openpgp; fpr=90B1DC3DF0BD10FD1227BD6344F254AF42F143EE X-Authority-Analysis: v=2.4 cv=G+KJgNk5 c=1 sm=1 tr=0 ts=6aa8f11d cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=EUspDBNiAAAA:8 a=jBCMAwuHs6T3S2td1yAA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX+LR6rwq6IoYe 6A9+otnGb+5KKFr0HOFud2Q/kr0f6SqXbJKrUZEri86q0RAXbIBTRDVzbMXQNTiUuxleAQWFyB1 XtLu12DFI/7pj+HamBa1wNFgmTrpKhWINyX0bd0PBsYQ0qylt0rDrDa28w6Fao2XGH5zfqYLHOf NnlTfzxbYm6HYdvyPBTxPK7b1TyjbjYfV7XufjvLA0f4j4MJpazHv7gJ9RcrHl2W1bW8aZHokXU XuZCqwSX7Mnzarm//P5a+R8mS378T2y2ZM/AdPLUZGG90WSw24lqVKzY4B0iNwWLtEafeTsl869 7yZPKH8aOwNXp9md7QUllgv3sr+ZZHgFWgVO4HAvZVE2HQ+yoKdri/3rIsGE9DnGXOWqFEz7vAJ 7FFxK4PC+v2f5CQfQ/pHEgfc3NArvdSRoP84nxyW4vEkmV5LiUN4MRrQdiDG/X38MZhKU+MB0SP hQFpKRxV558RJk34/mQ== X-Proofpoint-GUID: SHF8Oms7iOLWAKtdO8LRJ1MzrL7Pw-xg X-Proofpoint-ORIG-GUID: SHF8Oms7iOLWAKtdO8LRJ1MzrL7Pw-xg X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDEwMiBTYWx0ZWRfX8JKcXDQHFZEH VtMuac51aGP9YAtkfGetWbTKeeN+GBC7/GjH+UiTJ/u8bANn8HeTiUQoYdybXZVHuEO33H5sTnN d7YXbtSxtKCIpTkrQh8arWnPAMSfZsk= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_02,2026-09-14_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 impostorscore=0 malwarescore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150102 Provide a hwprobe base-behavior bit so userspace can check RVA23U64 support in one call. Without it, a consumer needs five hwprobe calls and four prctl calls, which is error-prone to require of every caller. Most software treats RVA23U64 as a new base anyway, so expose it directly. Signed-off-by: Andrew Jones Signed-off-by: Guodong Xu --- v7: Use riscv_isa_base_available(). v6: Rebase onto riscv/for-next: define RISCV_HWPROBE_BASE_BEHAVIOR_RVA23U64 in the _BITULL() style of commit 8da45c93dfa9. v5: No change. v4: No change. v3: No change. v2: - Detect RVA23U64 by reading from the cached hart_isa[].isa_bases bitmap populated by riscv_init_isa_bases() at init time, sharing one source of truth with /proc/cpuinfo. --- Documentation/arch/riscv/hwprobe.rst | 8 ++++++++ arch/riscv/include/uapi/asm/hwprobe.h | 3 ++- arch/riscv/kernel/sys_hwprobe.c | 23 +++++++++++++++---= ---- tools/testing/selftests/riscv/hwprobe/which-cpus.c | 2 +- 4 files changed, 27 insertions(+), 9 deletions(-) diff --git a/Documentation/arch/riscv/hwprobe.rst b/Documentation/arch/risc= v/hwprobe.rst index 32a14331eb9de..dc70470093b1b 100644 --- a/Documentation/arch/riscv/hwprobe.rst +++ b/Documentation/arch/riscv/hwprobe.rst @@ -67,6 +67,14 @@ * :c:macro:`RISCV_HWPROBE_KEY_BASE_BEHAVIOR`: A bitmask = containing the base programs (it may still be executed in userspace via a kernel-controlled mechanism such as the vDSO). =20 + * :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_RVA23U64`: Support for all manda= tory + extensions of RVA23U64, as defined in the RISC-V Profiles specification + starting from commit 0273f3c921b6 ("rva23/rvb23 ratified"). + + The RVA23U64 base is based upon the IMA base and therefore IMA extensi= on + keys (e.g. :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`:) may be used to pro= be + optional extensions. + * :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`: A bitmask containing extensions that are compatible with the :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior. diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uap= i/asm/hwprobe.h index 9a121ee3b4369..4f5d51788c416 100644 --- a/arch/riscv/include/uapi/asm/hwprobe.h +++ b/arch/riscv/include/uapi/asm/hwprobe.h @@ -22,7 +22,8 @@ struct riscv_hwprobe { #define RISCV_HWPROBE_KEY_MARCHID 1 #define RISCV_HWPROBE_KEY_MIMPID 2 #define RISCV_HWPROBE_KEY_BASE_BEHAVIOR 3 -#define RISCV_HWPROBE_BASE_BEHAVIOR_IMA _BITULL(0) +#define RISCV_HWPROBE_BASE_BEHAVIOR_IMA _BITULL(0) +#define RISCV_HWPROBE_BASE_BEHAVIOR_RVA23U64 _BITULL(1) #define RISCV_HWPROBE_KEY_IMA_EXT_0 4 #define RISCV_HWPROBE_IMA_FD _BITULL(0) #define RISCV_HWPROBE_IMA_C _BITULL(1) diff --git a/arch/riscv/kernel/sys_hwprobe.c b/arch/riscv/kernel/sys_hwprob= e.c index 656cb100ac489..51a85e61088bf 100644 --- a/arch/riscv/kernel/sys_hwprobe.c +++ b/arch/riscv/kernel/sys_hwprobe.c @@ -223,6 +223,17 @@ static bool hwprobe_ext0_has(const struct cpumask *cpu= s, u64 ext) return (pair.value & ext); } =20 +static bool hwprobe_has_isa_base(const struct cpumask *cpus, unsigned int = base) +{ + int cpu; + + for_each_cpu(cpu, cpus) { + if (!riscv_isa_base_available(hart_isa[cpu].isa_bases, base)) + return false; + } + return true; +} + #if defined(CONFIG_RISCV_PROBE_UNALIGNED_ACCESS) static u64 hwprobe_misaligned(const struct cpumask *cpus) { @@ -305,14 +316,12 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pa= ir, case RISCV_HWPROBE_KEY_MIMPID: hwprobe_arch_id(pair, cpus); break; - /* - * The kernel already assumes that the base single-letter ISA - * extensions are supported on all harts, and only supports the - * IMA base, so just cheat a bit here and tell that to - * userspace. - */ case RISCV_HWPROBE_KEY_BASE_BEHAVIOR: - pair->value =3D RISCV_HWPROBE_BASE_BEHAVIOR_IMA; + pair->value =3D 0; + if (hwprobe_has_isa_base(cpus, RISCV_ISA_BASE_IMA)) + pair->value |=3D RISCV_HWPROBE_BASE_BEHAVIOR_IMA; + if (hwprobe_has_isa_base(cpus, RISCV_ISA_BASE_RVA23U64)) + pair->value |=3D RISCV_HWPROBE_BASE_BEHAVIOR_RVA23U64; break; =20 case RISCV_HWPROBE_KEY_IMA_EXT_0: diff --git a/tools/testing/selftests/riscv/hwprobe/which-cpus.c b/tools/tes= ting/selftests/riscv/hwprobe/which-cpus.c index 587feb198c049..f8c797b1d0fd9 100644 --- a/tools/testing/selftests/riscv/hwprobe/which-cpus.c +++ b/tools/testing/selftests/riscv/hwprobe/which-cpus.c @@ -105,7 +105,7 @@ int main(int argc, char **argv) pairs[0] =3D (struct riscv_hwprobe){ .key =3D RISCV_HWPROBE_KEY_BASE_BEHA= VIOR, }; rc =3D riscv_hwprobe(pairs, 1, 0, NULL, 0); assert(rc =3D=3D 0 && pairs[0].key =3D=3D RISCV_HWPROBE_KEY_BASE_BEHAVIOR= && - pairs[0].value =3D=3D RISCV_HWPROBE_BASE_BEHAVIOR_IMA); + (pairs[0].value & RISCV_HWPROBE_BASE_BEHAVIOR_IMA)); =20 pairs[0] =3D (struct riscv_hwprobe){ .key =3D RISCV_HWPROBE_KEY_IMA_EXT_0= , }; rc =3D riscv_hwprobe(pairs, 1, 0, NULL, 0); --=20 2.43.0